TWI387420B - 切邊定位型銲接結構及防止引腳偏移的方法 - Google Patents

切邊定位型銲接結構及防止引腳偏移的方法 Download PDF

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TWI387420B
TWI387420B TW099119883A TW99119883A TWI387420B TW I387420 B TWI387420 B TW I387420B TW 099119883 A TW099119883 A TW 099119883A TW 99119883 A TW99119883 A TW 99119883A TW I387420 B TWI387420 B TW I387420B
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solder
pads
pins
trimming
circuit board
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TW201201647A (en
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Hsiang Chih Ni
Ching Feng Hsieh
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Askey Computer Corp
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Priority to DE102010038492A priority patent/DE102010038492B4/de
Priority to JP2010172284A priority patent/JP2012004521A/ja
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09381Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/0939Curved pads, e.g. semi-circular or elliptical pads or lands
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/048Self-alignment during soldering; Terminals, pads or shape of solder adapted therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49169Assembling electrical component directly to terminal or elongated conductor

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Description

切邊定位型銲接結構及防止引腳偏移的方法
本發明係關於一種切邊定位型銲接結構及防止引腳偏移的方法,尤指在複數銲墊之至少二銲墊分別設有至少二切邊者。
現今電子產業蓬勃發展,大量的電子設備或產品因應而生,其中為提高電子設備或產品的產能,表面黏著技術(Surface Mount Technology,SMT)便由業者開發加入製程。第1圖至第3圖分別為習知電子元件銲接於電路板之分解圖、組合圖及電子元件銲接於電路板時引腳、銲料及銲墊之俯視圖,如圖所示,電路板9上設有複數銲墊8,電子元件6具有複數引腳61,該等銲墊8的尺寸分別大於該等引腳61的尺寸,銲料7分別塗佈於該等銲墊8。當銲接電子元件6於電路板9上時,電子元件6先藉由該等引腳61插接於該等銲墊8上的銲料7,之後再將電路板9送進回銲爐加熱熔解銲料7,接著讓電路板9的溫度降回室溫,使銲料7凝固以固定電子元件6的該等引腳61。然而,銲料7熔解後係呈液狀,且該等銲墊8的尺寸分別大於該等引腳61的尺寸,其使得銲料7在凝固的過程中,電子元件6的該等引腳61會在該等銲墊8上平移,待銲料7確實凝固後,便產生電子元件6的該等引腳61相對於該等銲墊8偏移的型態(如第3圖所示)。上述結果不僅會使得後續製程產生問題,降低製程效率,而且不良品又需再製,增加製造成本。
因此,如何發明出一種切邊定位型銲接結構及防止引腳偏移的方法,以使其可提高製程效率,及降低製造成本,將是本發明所欲積極揭露之處。
有鑑於習知技術之缺失,本發明之目的在於提供一種切邊定位型銲接結構及防止引腳偏移的方法,以使其可提高製程效率,及降低製造成本。
為達上述目的,本發明之第一態樣為一種切邊定位型銲接結構,係包括複數個設在電路板上之銲墊,用於接合具有複數個引腳的SMT電子元件,該銲墊之尺寸係大於該引腳,其特徵在於:各該銲墊位於該電路板之一排列方向上,其中至少二銲墊分別設有至少二切邊,該等切邊係位在對應該引腳外圍之區域,以供該引腳的周緣對齊而限制其位移。
本發明之第二態樣為一種防止引腳偏移的方法,係應用在電路板上銲接具有複數個引腳的SMT電子元件,該方法包含下列步驟:在電路板上形成複數個位於一排列方向上的銲墊,該銲墊的尺寸係大於該引腳,且至少二銲墊分別設有至少二切邊,該等切邊係位在對應該引腳外圍之區域;以及使用銲料接合對應之各該銲墊與引腳,並藉該等切邊使該引腳的周緣對齊而限制其位移。
藉此,本發明之切邊定位型銲接結構及防止引腳偏移的方法可提高製程效率,及降低製造成本。
為充分瞭解本發明之目的、特徵及功效,茲藉由下述具體之實施例,並配合所附之圖式,對本發明做一詳細說明,說明如後:第4圖至第6圖分別為本發明較佳具體實施例之分解圖、組合圖及引腳、銲料及銲墊之俯視圖,如圖所示,本發明之第一態樣為一種切邊定位型銲接結構,係包括複數個設在電路板5上之銲墊3,用於接合具有複數個引腳11的SMT電子元件1,該銲墊3之尺寸係大於該引腳11,該等引腳11的形狀可為圓形且數量可為二或以上,圖式中以三引腳11為例,該等銲墊3的數量對應於該等引腳11的數量,本發明之切邊定位型銲接結構的特徵在於各該銲墊3位於該電路板5之一排列方向4上,,其中至少二銲墊3分別設有至少二切邊31,該至少二銲墊3可為最左及最右的銲墊3、左邊二銲墊3、右邊二銲墊或三銲墊3,圖式中以最左及最右的銲墊3為例,切邊31的數量可為二或以上,圖式中以二切邊31為例,該等切邊31在銲接過程中係位在對應該引腳11外圍之區域,以供該引腳11的周緣對齊而限制其位移。
當該電子元件1的該等引腳11欲銲接至該電路板5上時,該等銲墊3上需先塗佈銲料2,其可以具有複數貫孔(圖未示)的模板(圖未示)先覆蓋於該電路板5上,該等貫孔的位置對應該等銲墊3的位置,該等貫孔的形狀及大小與該等銲墊3相同,之後再以銲料,例如錫膏,塗佈於該等貫孔,待移除該模板後,該等銲墊3上便塗佈有銲料2,且銲料2的形狀及大小與該等銲墊3相同,亦具有切邊21;接著將該電子元件1的該等引腳11插接於該等銲墊3上的銲料2,之後再將該電路板5送進回銲爐(圖未示)加熱熔解銲料2,接著讓該電路板1的溫度降回室溫,以使銲料2逐漸凝固,在銲料2凝固的過程中,由於該等銲墊3的切邊31外不具有銲料,其使該電子元件1的該等引腳11不會朝該等切邊31外平移,意即該等切邊31限位該電子元件1的該等引腳11,因此銲料2凝固的過程中,該電子元件1的該等引腳11便不會相對於該等銲墊3平移,直至銲料2凝固後固定該電子元件1的該等引腳11於該等銲墊3上,且不會造成偏移。
另外,由於該等銲墊3的尺寸分別大於該等引腳11的尺寸,因此該等銲墊3上銲料2的尺寸亦分別大於該等引腳11的尺寸,當該電子元件1的該等引腳11銲接至該電路板5上時,位於該等引腳11下的銲料2係用以黏合該等引腳11,位於該等引腳11外的銲料2則用以包覆該等引腳11,以使該等引腳11銲接得更加牢固。
上述銲墊3之至少二銲墊3(圖式中以最左銲墊3及最右銲墊3為例,其亦可為左邊二銲墊3,或右邊二銲墊3)分別設有至少二切邊31,該等切邊31位於該排列方向4的二側,例如在該等銲墊3的對角線上。如圖所示,位於該排列方向4二側的該等切邊31使得該電子元件1的該等引腳11無法上下或左右平移,且亦無法相對於該等銲墊3轉動,意即該電子元件1的該等引腳11不會相對於該等銲墊3偏移。
第7圖為本發明另一較佳具體實施例的引腳、銲料及銲墊之俯視圖一,如圖所示,至少二銲墊3’(圖式中以最左銲墊3’及最右銲墊3’為例,其亦可為左邊二銲墊3’,或右邊二銲墊3’)分別設有至少三切邊31’,其中二切邊31’位於該排列方向4上,其餘切邊31’位於該排列方向4的二側。如圖所示,位於該排列方向4上及位於該排列方向4二側的該等切邊31’使得該電子元件的該等引腳11無法上下或左右平移,且亦無法相對於該等銲墊3’轉動,意即該電子元件的該等引腳11不會相對於該等銲墊3’偏移。
第8圖為本發明較佳具體實施例之流程圖,請同時參考第4圖至第6圖,如圖所示,本發明之第二態樣為一種防止引腳偏移的方法,係應用在電路板5上銲接具有複數個引腳11的SMT電子元件1,該等引腳11的數量可為二或以上,圖式中以三引腳11為例,該等引腳11與該等銲墊3的數量相同,該方法包含下列步驟:在該電路板5上形成複數個位於一排列方向4上的銲墊3,該銲墊3的尺寸大於該引腳11,且至少二銲墊3分別設有至少二切邊31,該等切邊31係位在對應該引腳11外圍之區域,該至少二銲墊3可為最左及最右的銲墊3、左邊二銲墊3、右邊二銲墊3或三銲墊3,圖式中以最左及最右的銲墊3為例,切邊31的數量可為二或以上,圖式中以二切邊31為例;以及使用銲料2接合對應之各該銲墊3與引腳11,該等切邊31在銲接過程中使該引腳11的周緣對齊而限制其位移。
當該電子元件1的該等引腳11欲銲接至該電路板5上時,該等銲墊3上需先塗佈銲料2,其可以具有複數貫孔(圖未示)的模板(圖未示)先覆蓋於該電路板5上,該等貫孔的位置對應該等銲墊3的位置,該等貫孔的形狀及大小與該等銲墊3相同,之後再以銲料,例如錫膏,塗佈於該等貫孔,待移除該模板後,該等銲墊3上便塗佈有銲料2,且銲料2的形狀及大小與該等銲墊3相同,亦具有切邊21;接著將該電子元件1的該等引腳11插接於該等銲墊3上的銲料2,之後再將該電路板5送進回銲爐(圖未示)加熱熔解銲料2,接著讓該電路板1的溫度降回室溫,以使銲料2逐漸凝固,在銲料2凝固的過程中,由於該等銲墊3的切邊31外不具有銲料,其使該電子元件1的該等引腳11不會朝該等切邊31外平移,意即該等切邊31限位該電子元件1的該等引腳11,因此銲料2凝固的過程中,該電子元件1的該等引腳11便不會相對於該等銲墊3平移,直至銲料2凝固後固定該電子元件1的該等引腳11於該等銲墊3上,且不會造成偏移。
另外,由於該等銲墊3的尺寸分別大於該等引腳11的尺寸,因此該等銲墊3上銲料2的尺寸亦分別大於該等引腳11的尺寸,當該電子元件1的該等引腳11銲接至該電路板5上時,位於該等引腳11下的銲料2係用以黏合該等引腳11,位於該等引腳11外的銲料2則用以包覆該等引腳11,以使該等引腳11銲接得更加牢固。
上述步驟中,使該等切邊31位於該排列方向4的二側,例如在該等銲墊3的對角線上。如圖所示,位於該排列方向4二側的該等切邊31使得該電子元件1的該等引腳11無法上下或左右平移,且亦無法相對於該等銲墊3轉動,意即該電子元件1的該等引腳11不會相對於該等銲墊3偏移。
請參考第7圖及第8圖,上述步驟中,使至少二銲墊3’(圖式中以最左銲墊3’及最右銲墊3’為例,其亦可為左邊二銲墊3’,或右邊二銲墊3’)分別形成至少三切邊31’;且使二切邊31’位於該排列4方向上,其餘切邊31’位於該排列方向4的二側。如圖所示,位於該排列方向4上及位於該排列方向4二側的該等切邊31’使得該電子元件的該等引腳11無法上下或左右平移,且亦無法相對於該等銲墊3’轉動,意即該電子元件的該等引腳11不會相對於該等銲墊3’偏移。
本發明在上文中已以較佳實施例揭露,然熟習本項技術者應理解的是,該實施例僅用於描繪本發明,而不應解讀為限制本發明之範圍。應注意的是,舉凡與該實施例等效之變化與置換,均應設為涵蓋於本發明之範疇內。因此,本發明之保護範圍當以下文之申請專利範圍所界定者為準。
1...電子元件
11...引腳
2...銲料
21...切邊
3...銲墊
3’...銲墊
31...切邊
31’‧‧‧切邊
4‧‧‧排列方向
5‧‧‧電路板
6‧‧‧電子元件
61‧‧‧引腳
7‧‧‧銲料
8‧‧‧銲墊
9‧‧‧電路板
第1圖為習知電子元件銲接於電路板之分解圖。
第2圖為習知電子元件銲接於電路板之組合圖。
第3圖為習知電子元件銲接於電路板時引腳、銲料及銲墊之俯視圖。
第4圖為本發明較佳具體實施例之分解圖。
第5圖為本發明較佳具體實施例之組合圖。
第6圖為本發明較佳具體實施例的引腳、銲料及銲墊之俯視圖。
第7圖為本發明另一較佳具體實施例的引腳、銲料及銲墊之俯視圖一。
第8圖為本發明較佳具體實施例之流程圖。
1...電子元件
11...引腳
2...銲料
21...切邊
3...銲墊
31...切邊
4...排列方向
5...電路板

Claims (2)

  1. 一種切邊定位型銲接結構,係包括複數個設在電路板上之銲墊,用於接合具有複數個引腳的SMT電子元件,該銲墊之尺寸係大於該引腳,其特徵在於:各該銲墊位於該電路板之一排列方向上,其中至少二銲墊分別設有三切邊,二切邊位於該排列方向上,其餘切邊位於該排列方向的二側,該切邊係位在對應該引腳外圍之區域,以供該引腳的周緣對齊而限制其位移。
  2. 一種防止引腳偏移的方法,係應用在電路板上銲接具有複數個引腳的SMT電子元件,該方法包含下列步驟:在該電路板上形成複數個位於一排列方向上的銲墊,該銲墊的尺寸係大於該引腳,且至少二銲墊分別形成三切邊,二切邊位於該排列方向上,其餘切邊位於該排列方向的二側,該等切邊係位在對應該引腳外圍之區域;以及使用銲料接合對應之各該銲墊與引腳,並藉該等切邊使該引腳的周緣對齊而限制其位移。
TW099119883A 2010-06-18 2010-06-18 切邊定位型銲接結構及防止引腳偏移的方法 TWI387420B (zh)

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DE102010038492A DE102010038492B4 (de) 2010-06-18 2010-07-27 Anordnung und Verfahren zum Anlöten eines elektronischen SMT-Bauelementes mit kreisrunden Kontaktfüßen
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