WO2013027718A1 - 部品実装プリント基板及びその製造方法 - Google Patents
部品実装プリント基板及びその製造方法 Download PDFInfo
- Publication number
- WO2013027718A1 WO2013027718A1 PCT/JP2012/071052 JP2012071052W WO2013027718A1 WO 2013027718 A1 WO2013027718 A1 WO 2013027718A1 JP 2012071052 W JP2012071052 W JP 2012071052W WO 2013027718 A1 WO2013027718 A1 WO 2013027718A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electrode
- electronic component
- component
- mounting
- base material
- Prior art date
Links
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- 229910052738 indium Inorganic materials 0.000 description 1
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Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/145—Organic substrates, e.g. plastic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1258—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by using a substrate provided with a shape pattern, e.g. grooves, banks, resist pattern
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
- H05K3/305—Affixing by adhesive
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49894—Materials of the insulating layers or coatings
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10719—Land grid array [LGA]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/0108—Male die used for patterning, punching or transferring
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
- H05K2203/1469—Circuit made after mounting or encapsulation of the components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0014—Shaping of the substrate, e.g. by moulding
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
Definitions
- An object of the present invention is to provide a component-mounting printed board that can solve the above-described problems caused by the prior art, can be reduced in height, and can be mounted at high density, and a method for manufacturing the same.
- the component mounting printed board according to the present invention is a component mounting printed board on which an electronic component is surface-mounted, and includes a resin base material, an electronic component mounted on at least one surface of the resin base material, and the electronic component.
- a through-hole electrode formed through the resin base material at a position corresponding to the electrode of the electronic component, the electrode of the electronic component and the through-hole electrode are directly bonded, and the electronic component of the resin base material
- the electrode pad of the through-hole electrode is formed on the surface opposite to the mounting surface side in a state of being embedded in the resin base material.
- the electrodes of the electronic component mounted on the mounting surface of the resin base material and the through-hole electrodes formed on the resin base material are directly joined, solder bumps are provided. Therefore, the height can be reduced and high-density mounting can be achieved as compared with the case where these are joined together.
- the electrode pad of the through-hole electrode is embedded in the resin substrate on the surface opposite to the mounting surface side of the electronic component of the resin substrate, the electrode pad is formed on the surface of the resin substrate. It is possible to reduce the height as compared with the case where the is formed.
- the electrode of the electronic component is embedded in the resin base material. By doing so, it is possible to further reduce the height.
- a circuit formed on the mounting surface side of the electronic component of the resin base material is further provided.
- an adhesive layer is formed between the electrode forming surface of the electronic component and the mounting surface of the resin base material.
- the adhesive layer is formed only in the lower region of the electronic component.
- an adhesive layer is formed in a region where the electrode is not formed on the electrode forming surface of the electronic component.
- the adhesive layer is formed such that its surface is recessed toward the electrode forming surface side of the electronic component rather than the electrode surface of the electrode of the electronic component.
- the height can be reduced and high-density mounting is possible.
- the electronic component 20 is a semiconductor component such as an IC chip, and a plurality of mounting electrodes 21 are formed on an electrode forming surface 21b opposite to the mounting surface 10a of the resin base material 10, and electrode surfaces 21a parallel to the electrode forming surface 21b are provided. It is formed in preparation.
- the through-hole electrode 12 and the backside wiring 13 are made of a conductive paste filled in a concave circuit pattern including a through-hole 19 formed by pressing imprint-type irregularities against the resin substrate 10.
- the conductive paste is, for example, at least one kind of low electrical resistance metal particles selected from nickel, gold, silver, zinc, aluminum, iron, tungsten and the like, and at least one kind selected from bismuth, indium, lead and the like. Low melting point metal particles.
- the conductive paste is made of a paste in which tin is contained as a component in these metal particles and a binder component mainly composed of epoxy, acrylic, urethane, or the like is mixed.
- the conductive paste configured as described above can form an alloy by melting the contained tin and the low melting point metal at 200 ° C. or less, and particularly can form an intermetallic compound with copper or silver. With characteristics.
- the conductive paste can also be formed of a nanopaste in which fillers such as gold, silver, copper, and nickel having a nanometer particle size are mixed with the binder component as described above.
- the conductive paste can also be composed of a paste in which metal particles such as nickel are mixed with the binder component as described above. In this case, the conductive paste has a characteristic that electrical connection is made when metal particles come into contact with each other.
- the through-hole electrode 12 includes an electrode 12a formed on the mounting surface 10a side of the resin base material 10 and an electrode pad 12b formed on the back surface 10b side opposite to the mounting surface 10a of the resin base material 10.
- the back surface wiring 13 includes a wiring main body portion 13 a formed on the back surface 10 b side of the resin base material 10, and an interlayer connection portion 11 for interlayer connection between the wiring main body portion 13 a and the surface layer circuit 14.
- An electrode 11 a connected to the surface layer circuit 14 is provided on the mounting surface 10 a side of the interlayer connection portion 11.
- the surface layer circuit 14 is formed of a conductive member such as copper patterned on the mounting surface 10a of the resin base material 10 after mounting the electronic component 20 by a method such as photolithography, printing, or inkjet.
- the resin substrate 10 and the electronic component 20 are connected by an adhesive layer 30 formed between the mounting surface 10a and the electrode forming surface 21b.
- the adhesive layer 30 is formed by filling an underfill made of, for example, a composite resin containing an epoxy resin as a main component between them.
- the soldering resist for protecting the back surface wiring 13, the contact bonding layer 30, the mounting surface 10a of the resin base material 10, the back surface 10b side, etc. may be formed.
- the solder resist is formed by a method such as photolithography.
- the component-mounting printed circuit board 100 according to the first embodiment is configured in this way, so that the electrode 21 of the electronic component 20 and the electrode 12a of the through-hole electrode 12 are directly joined without using a solder bump or the like. The For this reason, the overall height of the component-mounting printed board 100 can be reduced, and the arrangement pitch of the electrodes 21 and 12a can be reduced, so that high-density mounting is possible.
- FIG. 2 is a flowchart showing a manufacturing process of the component-mounting printed board.
- FIG. 3 is a cross-sectional view showing the component-mounting printed board in the first manufacturing process order.
- an imprint mold 40 of a mold having a convex circuit shape pattern or protrusions and a resin base material 10 made of a thermoplastic polyimide resin film are prepared (step S100). ).
- the imprint mold 40 is pressed against the resin substrate 10 while being heated to a predetermined temperature to transfer a circuit pattern constituted by a circuit shape pattern (step S102).
- the resin substrate 10 and the imprint mold 40 are heated to a temperature at which the resin material constituting the resin substrate 10 becomes soft, and then the circuit pattern is transferred.
- the resin substrate 10 is made of a thermoplastic polyimide resin film
- the electronic component 20 is mounted after being heated to a temperature equal to or higher than the glass transition point, and then cooled after mounting. Thereby, since a part of electrode surface 21a of the electrode 21 and the mounting surface 10a of the resin base material 10 are adhere
- FIG. when the resin base material 10 consists of a thermosetting resin film, resin is hardened by heating and both are temporarily bonded.
- the conductive paste is filled into the circuit pattern 41 from the back surface 10b side of the resin base material 10 by plating, inkjet, printing, etc. And the back wiring 13 are formed (step S108). Thereby, the electrode 21 of the electronic component 20 and the through-hole electrode 12 are directly joined.
- step S108 excess portions of the conductive paste that protrude from the surfaces 10a and 10b of the resin base material 10 are removed by etching or the like. Thereby, the electrode pad 12b of the through-hole electrode 12 and the wiring main body 13a of the back surface wiring 13 can be formed flat with the back surface 10b of the resin base material 10.
- the component-mounting printed circuit board 100 according to the first embodiment manufactured in this way can be reduced in height as described above, and high-density mounting is possible. Note that the processes of steps S110 and S112 may be performed in a reversed order. Moreover, the component mounting printed circuit board 100 may be manufactured as follows.
- the resin base material 10 is inverted with the imprint mold 40 attached, and the electrode 21 is aligned with the through hole 19 to align the electronic component 20 with the resin base material.
- 10 is mounted on the mounting surface 10a, and a part of the electrode surface 21a is bonded to the mounting surface 10a to temporarily bond the electronic component 20 to the resin base material 10.
- the imprint mold 40 is released from the resin base material 10 to form a concave circuit pattern 41, and as shown in FIG.
- the through-hole electrode 12 and the back surface wiring 13 are formed by filling the conductive paste, and the electrode 21 of the electronic component 20 and the through-hole electrode 12 are directly joined.
- the component mounting printed board 100 may have the following structure.
- FIG. 5 is a cross-sectional view showing another structure of the component-mounted printed board
- FIG. 6 is a cross-sectional view showing still another structure of the component-mounted printed board.
- the component mounting printed board 100A of this example does not have the surface layer circuit 14 on the mounting surface 10a side of the resin base material 10, and the back surface wiring 13 and the electrode pads of the through-hole electrodes 12 on the back surface 10b side.
- a so-called single-sided wiring structure in which 12b and the like are formed is employed. If the single-sided wiring structure is used, the interlayer connection portion 11 is also unnecessary, so that the material cost and the number of processes can be reduced, so that low-profile and high-density mounting can be achieved while reducing the cost.
- the electrode 21 of the electronic component 20 is embedded in the resin base material 10.
- the contact area of the electrode 21 of the electronic component 20 that contacts the resin base material 10 is large, the electronic component 20 can be temporarily bonded to the resin base material 10 more reliably.
- the heating temperature and the applied pressure may be appropriately changed when the electronic component 20 is mounted on the resin base material 10.
- FIG. 7 is a sectional view showing the structure of a component-mounting printed board according to the second embodiment of the present invention.
- the component-mounting printed circuit board 100C according to the second embodiment is different from the component-mounting printed board 100 according to the first embodiment in the structure and forming process of the adhesive layer 30. That is, the adhesive layer 30 is formed only in the lower region of the electronic component 20, and the underfill protrudes outside the electronic component 20 like the adhesive layer 30 of the component-mounting printed circuit board 100 according to the first embodiment. There is no.
- an electronic component 20 having a plurality of electrodes 21 formed on an electrode forming surface 21b is prepared.
- an adhesive is applied (or laminated) to the electrode forming surface 21b of the electronic component 20 (step S120).
- the adhesive applied or laminated in step S120 is preferably a liquid or film adhesive made of the thermoplastic resin as described above or a semi-cured thermosetting resin. And as shown in FIG.9 (c), etching, grinding
- the electronic component 20 having the adhesive layer 30 thus formed is prepared.
- the electronic component 20 is mounted on the mounting surface 10a, and one electrode surface 21a of the electrode 21 is placed.
- the electronic component 20 is permanently bonded to the resin base material 10 by the adhesive layer 30 while the part and the mounting surface 10 a of the resin base material 10 are bonded.
- the circuit pattern 41 is filled with a conductive paste to form the through-hole electrode 12 and the backside wiring 13, and the electrode 21 and the through-hole electrode 12 of the electronic component 20 are directly connected. Join.
- FIG. 11 is a cross-sectional view showing the component-mounting printed board in the order of the second manufacturing process.
- This second manufacturing process is characterized in that the order of the release process of the imprint mold 40 and the mounting process of the electronic component 20 in the first manufacturing process shown in FIG. That is, the electronic component 20 on which the adhesive layer 30 is formed is prepared.
- FIG. 11A first, the imprint mold 40 and the resin base material 10 are prepared, and FIG. As shown in FIG. 4, the imprint mold 40 is pressed against the resin base material 10 to transfer the circuit pattern.
- the electronic component 20 is mounted on the mounting surface 10a of the resin base material 10, and a part of the electrode surface 21a is placed.
- the electronic component 20 is permanently bonded to the resin base material 10 by the adhesive layer 30 while bonding the mounting surface 10a.
- the imprint mold 40 is released from the resin substrate 10 to form a concave circuit pattern 41.
- the through-hole electrode 12 and the back surface wiring 13 are formed by filling the conductive paste, and the electrode 21 of the electronic component 20 and the through-hole electrode 12 are directly joined.
- the surface layer circuit 14 is formed on the mounting surface 10 a side of the resin base material 10 to manufacture the component mounting printed board 100 ⁇ / b> C.
- a liquid or film adhesive made of the above-described thermoplastic resin or semi-cured thermosetting resin can be used as the adhesive applied or laminated here. Then, as shown in FIG. 12C, the adhesive layer 30 is prevented from protruding from the side surface of the electronic component 20 by etching, ashing, or the like, and the surface of the adhesive layer 30 is more electrode than the electrode surface 21a of the electrode 21. The adhesive layer 30 is formed so that the electrode 21 protrudes from the formation surface 21b side.
- an imprint mold 40 and a resin base material 10 are prepared, and as shown in FIG. 13 (b), the imprint mold 40 is pressed against the resin base material 10, thereby Transfer the pattern. Thereafter, as shown in FIG. 13C, the imprint mold 40 is released from the resin base material 10 to form a concave circuit pattern 41 on the resin base material 10.
- the resin base material 10 is inverted and the electronic component 20 is aligned, and then the electronic component 20 is mounted on the mounting surface 10 a so that the electrode 21 is embedded in the resin base material 10.
- the electronic component 20 is permanently bonded to the resin substrate 10 by the adhesive layer 30.
- the conductive paste is filled in the circuit pattern 41, the through-hole electrode 12 and the back surface wiring 13 are formed, and the electrode 21 and the through-hole electrode 12 of the electronic component 20 are directly made. Join.
- the surface layer circuit 14 is formed on the mounting surface 10 a side of the resin base material 10 to manufacture the component mounting printed board 100 ⁇ / b> D.
- the height can be reduced similarly to the first embodiment, high-density mounting can be achieved, and the mounting surface can be realized. High-density mounting on the 10a side is also possible.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
図1は、本発明の第1の実施形態に係る部品実装プリント基板の構造を示す断面図である。第1の実施形態に係る部品実装プリント基板100は、樹脂基材10と、この樹脂基材10の少なくとも一方の実装面10aに実装された電子部品20とを備えている。また、部品実装プリント基板100は、樹脂基材10に形成されたスルーホール19内のスルーホール電極12、裏面配線13及び表層回路14を備えている。
図2は、部品実装プリント基板の製造工程を示すフローチャートである。図3は、部品実装プリント基板を第1の製造工程順に示す断面図である。
まず、図3(a)に示すように、例えば凸型の回路形状パターンや突起部を有するモールドのインプリント型40と、熱可塑性のポリイミド樹脂フィルムからなる樹脂基材10を準備する(ステップS100)。
図7は、本発明の第2の実施形態に係る部品実装プリント基板の構造を示す断面図である。第2の実施形態に係る部品実装プリント基板100Cは、第1の実施形態に係る部品実装プリント基板100と、接着層30の構造や形成工程が相違している。すなわち、接着層30が、電子部品20の下側領域のみに形成され、第1の実施形態に係る部品実装プリント基板100の接着層30のように、アンダーフィルが電子部品20の外側にはみ出ることはない。
図8は、部品実装プリント基板の製造工程の一部を示すフローチャートである。図9は、部品実装プリント基板の電子部品を一部の製造工程順に示す断面図であり、図10は、部品実装プリント基板を第1の製造工程順に示す断面図である。
10a 実装面
10b 裏面
11 層間接続部
11a 電極
12 スルーホール電極
12a 電極
12b 電極パッド
13 裏面配線
13a 配線本体部
14 表層回路
19 スルーホール
20 電子部品
21 電極
21a 電極面
21b 電極形成面
30 接着層
31 充填装置
40 インプリント型
41 回路パターン
100 部品実装プリント基板
Claims (10)
- 樹脂基材と、
前記樹脂基材の少なくとも一方の面に実装された電子部品と、
前記電子部品の電極と対応する位置の前記樹脂基材に貫通形成されたスルーホール電極とを備え、
前記電子部品の電極と前記スルーホール電極とが直接接合されると共に、前記樹脂基材の前記電子部品の実装面側と反対側の面に、前記スルーホール電極の電極パッドが前記樹脂基材に埋め込まれた状態で形成されている
ことを特徴とする部品実装プリント基板。 - 前記電子部品の電極が前記樹脂基材に埋め込まれていることを特徴とする請求項1記載の部品実装プリント基板。
- 前記樹脂基材の前記電子部品の実装面側に形成された回路を更に備えることを特徴とする請求項1又は2記載の部品実装プリント基板。
- 前記電子部品の電極形成面と前記樹脂基材の前記実装面との間に接着層が形成されていることを特徴とする請求項1~3のいずれか1項記載の部品実装プリント基板。
- 前記接着層は、前記電子部品の下側領域のみに形成されていることを特徴とする請求項4記載の部品実装プリント基板。
- 樹脂基材にインプリントによってスルーホールを含む回路パターンを形成し、
電子部品の電極を前記回路パターンのスルーホールに合わせて位置合わせをした上で、前記電子部品を前記樹脂基材に搭載し、
前記回路パターンに導電ペーストを充填して前記樹脂基材に前記スルーホールに対応したスルーホール電極を含む配線を形成し、前記電子部品の電極と前記スルーホール電極とを直接接合すると共に、前記樹脂基材の前記電子部品の実装面側と反対側の面に、前記スルーホール電極の電極パッドを前記樹脂基材に埋め込んだ状態で形成する
ことを特徴とする部品実装プリント基板の製造方法。 - 前記電子部品を前記樹脂基材に搭載するときに、前記樹脂基材が加熱されると共に前記樹脂基材の前記電子部品の電極との接触面が加圧されつつ前記電子部品が搭載されることを特徴とする請求項6記載の部品実装プリント基板の製造方法。
- 前記電子部品の電極と前記導電ペーストとの間に金属間化合物が形成されることを特徴とする請求項6又は7記載の部品実装プリント基板の製造方法。
- 前記電子部品を前記樹脂基材に搭載するに先立って、前記電子部品の電極形成面における前記電極が形成されていない領域に接着層を形成することを特徴とする請求項6~8のいずれか1項記載の部品実装プリント基板の製造方法。
- 前記接着層は、前記電子部品の電極の電極面よりもその表面が前記電子部品の電極形成面側に凹んだ状態となるように形成されることを特徴とする請求項9記載の部品実装プリント基板の製造方法。
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CN201280041180.7A CN103748977A (zh) | 2011-08-23 | 2012-08-21 | 部件安装印刷电路基板及其制造方法 |
EP12825526.2A EP2750490B1 (en) | 2011-08-23 | 2012-08-21 | Component-mounting printed circuit board and manufacturing method for same |
US14/186,345 US20140168920A1 (en) | 2011-08-23 | 2014-02-21 | Component-mounting printed board and method of manufacturing the same |
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JP2011-181271 | 2011-08-23 | ||
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US14/186,345 Continuation US20140168920A1 (en) | 2011-08-23 | 2014-02-21 | Component-mounting printed board and method of manufacturing the same |
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US (1) | US20140168920A1 (ja) |
EP (1) | EP2750490B1 (ja) |
JP (1) | JPWO2013027718A1 (ja) |
CN (1) | CN103748977A (ja) |
TW (1) | TWI516180B (ja) |
WO (1) | WO2013027718A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015095562A (ja) * | 2013-11-12 | 2015-05-18 | 日本メクトロン株式会社 | 導電ペーストの充填方法、および多層プリント配線板の製造方法 |
CN105519242A (zh) * | 2013-04-30 | 2016-04-20 | 印可得株式会社 | 黑化导电图案的形成方法及黑化导电油墨组合物 |
WO2024106047A1 (ja) * | 2022-11-15 | 2024-05-23 | カヤバ株式会社 | 回路ユニットの製造方法 |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016066229A1 (en) * | 2014-10-31 | 2016-05-06 | Hewlett-Packard Indigo B.V. | Embossing dies having polymer layers |
US10553557B2 (en) * | 2014-11-05 | 2020-02-04 | Infineon Technologies Austria Ag | Electronic component, system and method |
US10064287B2 (en) | 2014-11-05 | 2018-08-28 | Infineon Technologies Austria Ag | System and method of providing a semiconductor carrier and redistribution structure |
US10192846B2 (en) | 2014-11-05 | 2019-01-29 | Infineon Technologies Austria Ag | Method of inserting an electronic component into a slot in a circuit board |
CN105609484B (zh) * | 2015-12-24 | 2019-03-22 | 通富微电子股份有限公司 | 半导体器件扇出封装结构 |
JP2017126688A (ja) * | 2016-01-15 | 2017-07-20 | 株式会社ジェイデバイス | 半導体パッケージの製造方法及び半導体パッケージ |
JP6953018B2 (ja) * | 2016-03-29 | 2021-10-27 | 積水ポリマテック株式会社 | フレキシブル回路基板及びフレキシブル回路基板の製造方法 |
CN111629519B (zh) * | 2020-05-18 | 2021-04-09 | 微智医疗器械有限公司 | 芯片与电路板的连接方法、电路板组件及电子设备 |
CN113840449A (zh) * | 2021-09-06 | 2021-12-24 | 华为技术有限公司 | 一种基板和电子设备 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0362542A (ja) * | 1989-07-31 | 1991-03-18 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JP2000208675A (ja) * | 1999-01-11 | 2000-07-28 | Matsushita Electronics Industry Corp | 半導体装置およびその製造方法 |
JP2003008178A (ja) * | 2001-06-25 | 2003-01-10 | Sony Corp | 印刷配線板の製造方法 |
JP2003318234A (ja) * | 2002-02-25 | 2003-11-07 | Sony Corp | 電子部品および電子部品の製造方法 |
JP2006049804A (ja) * | 2004-07-07 | 2006-02-16 | Shinko Electric Ind Co Ltd | 配線基板の製造方法 |
JP2011044512A (ja) | 2009-08-20 | 2011-03-03 | Nec Corp | 半導体部品 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11121515A (ja) * | 1997-10-09 | 1999-04-30 | Rohm Co Ltd | 半導体チップの実装方法および半導体装置 |
JP4186756B2 (ja) * | 2003-08-29 | 2008-11-26 | 松下電器産業株式会社 | 回路基板及びその製造方法 |
JP2001168146A (ja) * | 1999-12-09 | 2001-06-22 | Sony Corp | 部品装着装置及び部品装着方法 |
JP2002353595A (ja) * | 2001-05-28 | 2002-12-06 | Matsushita Electric Works Ltd | 電子回路部品及びその製造方法 |
JP4179312B2 (ja) * | 2004-09-15 | 2008-11-12 | セイコーエプソン株式会社 | 半導体装置の実装方法、半導体装置 |
FI119714B (fi) * | 2005-06-16 | 2009-02-13 | Imbera Electronics Oy | Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi |
JP4930204B2 (ja) * | 2007-06-07 | 2012-05-16 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
US20110001222A1 (en) * | 2008-02-18 | 2011-01-06 | Nozomu Nishimura | Electronic device, layered substrate, and methods of manufacturing same |
EP2200412A1 (en) * | 2008-12-17 | 2010-06-23 | Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO | Flexible electronic product and method for manufacturing the same |
JP5168160B2 (ja) * | 2009-01-15 | 2013-03-21 | ソニー株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2011096900A (ja) * | 2009-10-30 | 2011-05-12 | Fujitsu Ltd | 導電体およびプリント配線板並びにそれらの製造方法 |
-
2012
- 2012-08-21 WO PCT/JP2012/071052 patent/WO2013027718A1/ja active Application Filing
- 2012-08-21 EP EP12825526.2A patent/EP2750490B1/en not_active Not-in-force
- 2012-08-21 CN CN201280041180.7A patent/CN103748977A/zh active Pending
- 2012-08-21 JP JP2013530021A patent/JPWO2013027718A1/ja active Pending
- 2012-08-22 TW TW101130415A patent/TWI516180B/zh not_active IP Right Cessation
-
2014
- 2014-02-21 US US14/186,345 patent/US20140168920A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0362542A (ja) * | 1989-07-31 | 1991-03-18 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JP2000208675A (ja) * | 1999-01-11 | 2000-07-28 | Matsushita Electronics Industry Corp | 半導体装置およびその製造方法 |
JP2003008178A (ja) * | 2001-06-25 | 2003-01-10 | Sony Corp | 印刷配線板の製造方法 |
JP2003318234A (ja) * | 2002-02-25 | 2003-11-07 | Sony Corp | 電子部品および電子部品の製造方法 |
JP2006049804A (ja) * | 2004-07-07 | 2006-02-16 | Shinko Electric Ind Co Ltd | 配線基板の製造方法 |
JP2011044512A (ja) | 2009-08-20 | 2011-03-03 | Nec Corp | 半導体部品 |
Non-Patent Citations (1)
Title |
---|
See also references of EP2750490A4 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105519242A (zh) * | 2013-04-30 | 2016-04-20 | 印可得株式会社 | 黑化导电图案的形成方法及黑化导电油墨组合物 |
JP2016526278A (ja) * | 2013-04-30 | 2016-09-01 | インクテック カンパニー, リミテッドInktec Co., Ltd. | 黒化導電性パターンの形成方法および黒化導電性インク組成物 |
CN105519242B (zh) * | 2013-04-30 | 2018-12-28 | 印可得株式会社 | 黑化导电图案的形成方法及黑化导电油墨组合物 |
JP2015095562A (ja) * | 2013-11-12 | 2015-05-18 | 日本メクトロン株式会社 | 導電ペーストの充填方法、および多層プリント配線板の製造方法 |
WO2024106047A1 (ja) * | 2022-11-15 | 2024-05-23 | カヤバ株式会社 | 回路ユニットの製造方法 |
Also Published As
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CN103748977A (zh) | 2014-04-23 |
EP2750490B1 (en) | 2016-11-16 |
JPWO2013027718A1 (ja) | 2015-03-19 |
EP2750490A4 (en) | 2015-05-06 |
US20140168920A1 (en) | 2014-06-19 |
TWI516180B (zh) | 2016-01-01 |
TW201322843A (zh) | 2013-06-01 |
EP2750490A1 (en) | 2014-07-02 |
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