WO2012004927A1 - Dispositif à circuit redresseur - Google Patents

Dispositif à circuit redresseur Download PDF

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Publication number
WO2012004927A1
WO2012004927A1 PCT/JP2011/002996 JP2011002996W WO2012004927A1 WO 2012004927 A1 WO2012004927 A1 WO 2012004927A1 JP 2011002996 W JP2011002996 W JP 2011002996W WO 2012004927 A1 WO2012004927 A1 WO 2012004927A1
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WIPO (PCT)
Prior art keywords
voltage
chopping
phase
period
waveform
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PCT/JP2011/002996
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English (en)
Japanese (ja)
Inventor
吉田　泉
吉朗 土山
京極　章弘
シンホイ 戴
川崎　智広
Original Assignee
パナソニック株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by パナソニック株式会社 filed Critical パナソニック株式会社
Priority to BR112013000139A priority Critical patent/BR112013000139A2/pt
Priority to CN201180033930.1A priority patent/CN103004075B/zh
Priority to JP2012523508A priority patent/JP5830691B2/ja
Priority to KR1020137003271A priority patent/KR20130031379A/ko
Publication of WO2012004927A1 publication Critical patent/WO2012004927A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to a rectifier circuit device and a control circuit for the rectifier circuit device, and in particular, a circuit device for driving a DC load by rectifying a single-phase AC power source such as a home to make it a direct current, and the obtained direct current
  • This is a device that is applied to a device that performs high-efficiency drive control with technology that reduces the burden on the power transmission system by reducing harmonic components contained in the power supply current and improving the power factor.
  • the present invention relates to a rectifier circuit device and a control circuit for the rectifier circuit device.
  • FIG. 20 is a circuit diagram showing a configuration of a rectifier circuit device according to the prior art disclosed in Patent Document 1
  • FIG. 21 is a block diagram showing a detailed configuration of the control unit 13 of FIG.
  • both output terminals of the AC power supply 1 are short-circuited by a semiconductor switch 3c via a rectifier bridge 2 and a reactor 3a, and the reactor 3a is charged with current.
  • the switch 3c is turned off, a current is supplied to the load 4 by the diode 3b so that the power supply current flows even when the instantaneous voltage of the AC power supply 1 is low.
  • the harmonic component of the power supply current is reduced and the power factor is improved.
  • the semiconductor switch 3c is finely turned on / off at a frequency sufficiently higher than the frequency of the AC power supply 1, thereby chopping the AC voltage of the AC power supply 1 (hereinafter, “the semiconductor switch is chopped”) or (Referred to as “chopping by a semiconductor switch”), a current flows through the semiconductor switch 3c, causing a problem of circuit loss.
  • the power is supplied to the smoothing capacitor 3d and the load 4 via the reactor 3a and the diode 3b.
  • the output voltage from the rectifier bridge 2 can be short-circuited by the semiconductor switch 3c via the reactor 3a, thereby forming a rectifier circuit device having a power factor improving function by a known boost chopper circuit 3.
  • the boost chopper circuit 3 detects the input current with the input current detector 6 and the input current detector 10, and the input current has the same shape as the input voltage waveform (power supply voltage waveform) detected by the input voltage detector 11.
  • the semiconductor switch 3c is chopped and the magnitude of the input current is adjusted so that the output voltage becomes a desired voltage.
  • Patent Document 1 proposes a contrivance for reducing the circuit loss by causing the semiconductor switch to perform a chopping operation only in a minimum interval for reducing harmonics.
  • FIG. 21 shows a control method for that purpose.
  • the phase of the power supply voltage is detected by the power supply zero-cross detection means 5, and the chopping operation of the semiconductor switch 3c of FIG. 20 is permitted only for a certain period by the pulse counter 13a, and in the other periods, the semiconductor switch 3c Holds to be off.
  • a low-loss rectifier circuit device can be realized with almost no increase in power supply harmonics.
  • Patent Document 1 requires a waveform of the power supply voltage
  • Patent Document 2 a method for realizing the same operation with a predetermined waveform without using the waveform of the power supply voltage has been proposed (for example, Patent Document 2). reference).
  • Patent Document 3 a simple method that aims at the same effect without having a target current waveform has been proposed (see, for example, Patent Document 3).
  • the input current is substituted with the current after rectification.
  • the absolute value of the input current is obtained and the magnitude of the absolute value is adjusted. It is well known that it is equivalent to adjusting the amplitude of the current.
  • the output voltage is controlled to be constant under the condition where the load is determined, and the period during which the semiconductor switch is chopped is also fixed. For this reason, if there is an error in the detected output voltage, the current waveform changes.
  • the current waveform changes greatly only by changing the direct current voltage by 1V.
  • An accuracy of 1V with respect to a DC voltage of 280V corresponds to 0.3%, and a resistor with very high accuracy is required when the voltage is divided by a resistor to make it a low voltage. For this reason, in consideration of the detection accuracy of the output voltage, it is necessary to set a longer chopping period and to slightly increase the circuit loss so that the harmonics are reduced even in the changed current waveform. Have.
  • Such a control method is generally realized by using a digital computer.
  • the DC voltage is converted into a high resolution, that is, an analog-to-digital conversion (hereinafter referred to as a high bit number). "AD conversion”) is required, which increases the circuit load.
  • AD conversion analog-to-digital conversion
  • the lower the output voltage the smaller the loss.
  • the AC voltage during the period of chopping the semiconductor switch is used. Even if the output voltage is lower than the output voltage, a phenomenon occurs in which the output voltage rises due to the boost operation during the chopping operation of the semiconductor switch, and therefore it is difficult to set a lower output voltage with less loss. Also have.
  • the power supply harmonics generated depending on whether or not the input current has pulsation depending on the electrical characteristics of the connected load are greatly different, and a preset semiconductor
  • control is performed during the chopping period of the switch, switching is performed even in a low power region where the current amplitude is relatively small and the harmonic current is very small, which does not adversely affect peripheral devices and the power supply system.
  • loss as an integrated value increases.
  • the object of the present invention is to solve the above-mentioned problems, the rectifier circuit device capable of reducing the power supply harmonic current and reducing the loss according to the characteristics of the connected load, regardless of the detection accuracy of the output voltage, and the aforementioned It is to provide a control circuit for a rectifier circuit device.
  • the rectifier circuit device is: By chopping the semiconductor switch, the output terminal of the single-phase AC power supply is short-circuited or opened via the reactor, and the AC voltage supplied from the single-phase AC power supply via the reactor is rectified into a DC voltage and loaded.
  • a rectifier circuit device for supplying to Waveform forming means for forming a target current waveform having the same frequency as the waveform of the AC voltage;
  • Current detecting means for detecting an alternating current flowing from the single-phase AC power source;
  • Voltage detecting means for detecting the DC voltage;
  • First control means for controlling the chopping operation of the semiconductor switch so that the waveform of the detected alternating current substantially becomes the target current waveform;
  • Second control means for controlling the amplitude of the target current waveform such that the detected DC voltage is substantially a predetermined target DC voltage;
  • the predetermined target DC voltage is controlled so that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping suspension phase width in which the semiconductor switch is in a chopping suspension state is substantially a predetermined phase width.
  • third control means for supplying to Waveform forming means for forming a target current waveform having the same frequency as the waveform of the AC voltage;
  • Current detecting means for detecting an
  • the predetermined phase width is set by being changed depending on an electrical characteristic of the load.
  • the electrical characteristic of the load is a fluctuation range of the alternating current or a rotational speed command to a compressor motor when the load is a compressor.
  • the third control means has a plurality of the chopping operation phase widths or a plurality of the chopping pause phase widths within a period in which the polarity of the AC voltage is fixed.
  • the predetermined target DC voltage is controlled such that any one of the phase widths within the period or the total phase width is substantially the predetermined phase width.
  • the target current waveform has an instantaneous absolute value of the target current waveform within a period in which the polarity of the AC voltage is fixed.
  • A From the starting point of the period to the predetermined intermediate point, it increases at least over time, or at least increases and increases substantially at least monotonously so as to be constant over a period of time,
  • B A period from the intermediate point to the end point that has at least decreased with time, or at least decreased and substantially monotonically decreased to be constant in a certain period, and then has a period that becomes zero. It is characterized by being set.
  • the target current waveform has an instantaneous absolute value of the target current waveform within a period in which the polarity of the AC voltage is fixed.
  • A From the starting point of the period to the predetermined first intermediate point, there is a period that becomes zero with time, (B) from the first intermediate point to the predetermined second intermediate point at least increases or at least increases and substantially monotonically increases to be constant over a period of time; (C) from the second intermediate point to the end point, a time period that is at least decreased with time, or at least decreased and substantially monotonically decreased so as to be constant in a certain period, and then becomes zero. It is set to have.
  • the rectifier circuit device further includes phase detection means for generating a binary signal by comparing the AC voltage with a predetermined threshold voltage,
  • the waveform forming means detects a period and a phase of the AC voltage based on the binary signal, and a target current waveform having the same frequency as the waveform of the AC voltage based on the detected period and phase of the AC voltage.
  • the third control means detects, based on the binary signal, a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping suspension phase width in which the semiconductor switch is in a chopping suspension state.
  • the rectifier circuit device further includes AD conversion means provided between the voltage detection means and the second control means, and AD-converts the detected DC voltage into a digital voltage; Provided between the AD conversion means and the second control means, and after performing a low-pass filter operation on the digital voltage, the voltage of the calculation result is detected by the second control means And an arithmetic means for outputting as a DC voltage.
  • the sampling frequency of the AD conversion means is set to be sufficiently higher than the frequency of the single-phase AC power supply.
  • the low-pass filter operation may be performed by multiplying the immediately preceding operation result by a coefficient “(2 n ⁇ 1) / (2 n )” (n is an integer), It is characterized by being added to the digital voltage thus obtained and executed using the value of the addition result as the next calculation result.
  • a control circuit for a rectifier circuit device short-circuits or opens an output terminal of a single-phase AC power source through a reactor by chopping a semiconductor switch, and the reactor is connected to the reactor from the single-phase AC power source.
  • the control circuit is Waveform forming means for forming a target current waveform having the same frequency as the waveform of the AC voltage; First control means for controlling a chopping operation of the semiconductor switch so that a waveform of an alternating current flowing from the single-phase alternating current power supply substantially becomes the target current waveform; Second control means for controlling the amplitude of the target current waveform so that the DC voltage substantially becomes a predetermined target DC voltage; The predetermined target DC voltage is controlled so that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping suspension phase width in which the semiconductor switch is in a chopping suspension state is substantially a predetermined phase width. And third control means.
  • the control circuit is characterized in that the predetermined phase width is changed and set depending on electrical characteristics of the load.
  • the electrical characteristic of the load is a fluctuation range of the alternating current or a rotational speed command to a compressor motor when the load is a compressor.
  • the third control unit may be configured such that when there are a plurality of the chopping operation phase widths or a plurality of the chopping pause phase widths in a period in which the polarity of the AC voltage is fixed.
  • the predetermined target DC voltage is controlled so that any one of the phase widths within the period or the total phase width becomes substantially the predetermined phase width.
  • the target current waveform has an instantaneous absolute value of the target current waveform within a period in which the polarity of the AC voltage is fixed.
  • A From the starting point of the period to the predetermined intermediate point, it increases at least over time, or at least increases and increases substantially at least monotonously so as to be constant over a period of time,
  • B A period from the intermediate point to the end point that has at least decreased with time, or at least decreased and substantially monotonically decreased to be constant in a certain period, and then has a period that becomes zero. It is characterized by being set.
  • the target current waveform has an instantaneous absolute value of the target current waveform within a period in which the polarity of the AC voltage is fixed.
  • A From the starting point of the period to the predetermined first intermediate point, there is a period that becomes zero with time, (B) from the first intermediate point to the predetermined second intermediate point at least increases or at least increases and substantially monotonically increases to be constant over a period of time; (C) from the second intermediate point to the end point, a time period that is at least decreased with time, or at least decreased and substantially monotonically decreased so as to be constant in a certain period, and then becomes zero. It is set to have.
  • the rectifier circuit device further includes phase detection means for generating a binary signal by comparing the AC voltage with a predetermined threshold voltage,
  • the waveform forming means detects a period and a phase of the AC voltage based on the binary signal, and a target current waveform having the same frequency as the waveform of the AC voltage based on the detected period and phase of the AC voltage.
  • the third control means detects, based on the binary signal, a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping suspension phase width in which the semiconductor switch is in a chopping suspension state.
  • control circuit further includes AD conversion means provided between the voltage detection means and the second control means, and AD-converts the DC voltage into a digital voltage; Provided between the AD conversion means and the second control means, and after performing a low-pass filter operation on the digital voltage, the voltage of the calculation result is sent to the second control means as the DC voltage. And an arithmetic means for outputting.
  • the sampling frequency of the AD converter is set to be sufficiently higher than the frequency of the single-phase AC power supply.
  • the low-pass filter operation is input after the previous operation result is multiplied by a coefficient (n is an integer) of “(2 n ⁇ 1) / (2 n )”. It is added to the digital voltage, and the value of the addition result is used as the next calculation result.
  • the DC voltage is adjusted to a relatively appropriate value to obtain a similar current waveform, and a desired current according to the characteristics of the load.
  • a DC voltage is converted into a digital signal by an AD conversion means at a sampling frequency sufficiently higher than the frequency of the AC power supply, and the obtained digital signal is subjected to LPF calculation for each period, and digitally Interpolate minute information below resolution to interpolate minute information so that the digital signal interpolated with minute information is DC voltage information so that the phase width that is actually chopped is the desired value Adjust the digital signal. Even if there is fluctuations in the power supply frequency component included in the smoothing voltage of the DC voltage and the resolution of the digital information is rough, the digital signal is dispersed due to fluctuations, so a digital signal equivalent to a high resolution is obtained on average. be able to.
  • the rectifier circuit device can always realize a rectification operation with little loss and less harmonic current even when the input current pulsates due to the characteristics of the connected load.
  • FIG. 2 is a block diagram illustrating a detailed configuration of a control circuit 100 in FIG. 1. It is a figure for demonstrating the control action which concerns on the 1st operation example of the control circuit 100 of FIG. 1, Comprising: AC voltage (henceforth AC voltage) and the DC voltage after rectification (henceforth DC voltage) And a target current waveform to be controlled, and an AC current after actual control (hereinafter referred to as AC current). It is a figure for demonstrating the control operation
  • FIG. 9 is a diagram for explaining a first operation example of binarization processing of the voltage level comparator 109 of the rectifier circuit device according to the first to tenth embodiments of the present invention, and the relationship between the AC voltage and the threshold voltage Vth. And a signal waveform diagram showing a binary signal from the voltage level comparator 109.
  • FIG. FIG. 9 is a diagram for explaining a first operation example of binarization processing of the voltage level comparator 109 of the rectifier circuit device according to the first to tenth embodiments of the present invention, and the relationship between the AC voltage and the threshold voltage Vth.
  • a signal waveform diagram showing a binary signal from the voltage level comparator 109.
  • FIG. 10 is a diagram for explaining a second operation example of the binarization process of the voltage level comparator 109 of the rectifier circuit device according to Embodiments 1 to 10 of the present invention, and the relationship between the AC voltage and the threshold voltage Vth. And a signal waveform diagram showing a binary signal from the voltage level comparator 109.
  • FIG. It is a block diagram which shows the detailed structure of the control circuit 100 of the rectifier circuit apparatus which concerns on Embodiment 11 of this invention.
  • FIG. 18 is a block diagram showing a detailed configuration of a low-pass filter computing unit (hereinafter referred to as “LPF computing unit”) 231 in FIG. 17.
  • LPF computing unit low-pass filter computing unit
  • FIG. 17 is a circuit diagram which shows the structure of the rectifier circuit apparatus based on a prior art. It is a block diagram which shows the detailed structure of the control part 13 of FIG.
  • a rectifier circuit device includes: By chopping the semiconductor switch, the output terminal of the single-phase AC power supply is short-circuited or opened via the reactor, and the AC voltage supplied from the single-phase AC power supply via the reactor is rectified into a DC voltage and loaded.
  • a rectifier circuit device for supplying to Waveform forming means for forming a target current waveform having the same frequency as the waveform of the AC voltage;
  • Current detecting means for detecting an alternating current flowing from the single-phase AC power source;
  • Voltage detecting means for detecting the DC voltage;
  • First control means for controlling the chopping operation of the semiconductor switch so that the waveform of the detected alternating current substantially becomes the target current waveform;
  • Second control means for controlling the amplitude of the target current waveform such that the detected DC voltage is substantially a predetermined target DC voltage;
  • the predetermined target DC voltage is controlled so that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping suspension phase width in which the semiconductor switch is in a chopping suspension state is substantially a predetermined phase width.
  • third control means for supplying to Waveform forming means for forming a target current waveform having the same frequency as the waveform of the AC voltage;
  • Current detecting means for detecting an
  • the predetermined phase width is set by being changed depending on an electrical characteristic of the load.
  • the electrical characteristic of the load is a fluctuation range of the alternating current or a rotational speed command to a compressor motor when the load is a compressor.
  • the third control means has a plurality of the chopping operation phase widths or a plurality of the chopping pause phase widths within a period in which the polarity of the AC voltage is fixed.
  • the predetermined target DC voltage is controlled such that any one of the phase widths within the period or the total phase width is substantially the predetermined phase width.
  • the target current waveform has an instantaneous absolute value of the target current waveform within a period in which the polarity of the AC voltage is fixed.
  • A From the starting point of the period to the predetermined intermediate point, it increases at least over time, or at least increases and increases substantially at least monotonously so as to be constant over a period of time,
  • B A period from the intermediate point to the end point that has at least decreased with time, or at least decreased and substantially monotonically decreased to be constant in a certain period, and then has a period that becomes zero. It is characterized by being set.
  • the target current waveform has an instantaneous absolute value of the target current waveform within a period in which the polarity of the AC voltage is fixed.
  • A From the starting point of the period to the predetermined first intermediate point, there is a period that becomes zero with time, (B) from the first intermediate point to the predetermined second intermediate point at least increases or at least increases and substantially monotonically increases to be constant over a period of time; (C) from the second intermediate point to the end point, a time period that is at least decreased with time, or at least decreased and substantially monotonically decreased so as to be constant in a certain period, and then becomes zero. It is set to have.
  • the rectifier circuit device further includes phase detection means for generating a binary signal by comparing the AC voltage with a predetermined threshold voltage,
  • the waveform forming means detects a period and a phase of the AC voltage based on the binary signal, and a target current waveform having the same frequency as the waveform of the AC voltage based on the detected period and phase of the AC voltage.
  • the third control means detects, based on the binary signal, a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping suspension phase width in which the semiconductor switch is in a chopping suspension state.
  • the rectifier circuit device further includes AD conversion means provided between the voltage detection means and the second control means, and AD-converts the detected DC voltage into a digital voltage; Provided between the AD conversion means and the second control means, and after performing a low-pass filter operation on the digital voltage, the voltage of the calculation result is detected by the second control means And an arithmetic means for outputting as a DC voltage.
  • the sampling frequency of the AD conversion means is set to be sufficiently higher than the frequency of the single-phase AC power supply.
  • the low-pass filter operation may be performed by multiplying the immediately preceding operation result by a coefficient “(2 n ⁇ 1) / (2 n )” (n is an integer), It is characterized by being added to the digital voltage thus obtained and executed using the value of the addition result as the next calculation result.
  • control circuit for the rectifier circuit device short-circuits or opens the output terminal of the single-phase AC power source through the reactor by chopping the semiconductor switch, and the single-phase AC
  • the control circuit is Waveform forming means for forming a target current waveform having the same frequency as the waveform of the AC voltage; First control means for controlling a chopping operation of the semiconductor switch so that a waveform of an alternating current flowing from the single-phase alternating current power supply substantially becomes the target current waveform; Second control means for controlling the amplitude of the target current waveform so that the DC voltage substantially becomes a predetermined target DC voltage;
  • the predetermined target DC voltage is controlled so that a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping suspension phase width in which the semiconductor switch is in a chopping
  • the control circuit is characterized in that the predetermined phase width is changed and set depending on electrical characteristics of the load.
  • the electrical characteristic of the load is a fluctuation range of the alternating current or a rotational speed command to a compressor motor when the load is a compressor.
  • the third control unit may be configured such that when there are a plurality of the chopping operation phase widths or a plurality of the chopping pause phase widths in a period in which the polarity of the AC voltage is fixed.
  • the predetermined target DC voltage is controlled so that any one of the phase widths within the period or the total phase width becomes substantially the predetermined phase width.
  • the target current waveform has an instantaneous absolute value of the target current waveform within a period in which the polarity of the AC voltage is fixed.
  • A From the starting point of the period to the predetermined intermediate point, it increases at least over time, or at least increases and increases substantially at least monotonously so as to be constant over a period of time,
  • B A period from the intermediate point to the end point that has at least decreased with time, or at least decreased and substantially monotonically decreased to be constant in a certain period, and then has a period that becomes zero. It is characterized by being set.
  • the target current waveform has an instantaneous absolute value of the target current waveform within a period in which the polarity of the AC voltage is fixed.
  • A From the starting point of the period to the predetermined first intermediate point, there is a period that becomes zero with time, (B) from the first intermediate point to the predetermined second intermediate point at least increases or at least increases and substantially monotonically increases to be constant over a period of time; (C) from the second intermediate point to the end point, a time period that is at least decreased with time, or at least decreased and substantially monotonically decreased so as to be constant in a certain period, and then becomes zero. It is set to have.
  • the rectifier circuit device further includes phase detection means for generating a binary signal by comparing the AC voltage with a predetermined threshold voltage,
  • the waveform forming means detects a period and a phase of the AC voltage based on the binary signal, and a target current waveform having the same frequency as the waveform of the AC voltage based on the detected period and phase of the AC voltage.
  • the third control means detects, based on the binary signal, a chopping operation phase width in which the semiconductor switch is in a chopping operation state or a chopping suspension phase width in which the semiconductor switch is in a chopping suspension state.
  • control circuit further includes AD conversion means provided between the voltage detection means and the second control means, and AD-converts the DC voltage into a digital voltage; Provided between the AD conversion means and the second control means, and after performing a low-pass filter operation on the digital voltage, the voltage of the calculation result is sent to the second control means as the DC voltage. And an arithmetic means for outputting.
  • the sampling frequency of the AD converter is set to be sufficiently higher than the frequency of the single-phase AC power supply.
  • the low-pass filter operation is input after the previous operation result is multiplied by a coefficient (n is an integer) of “(2 n ⁇ 1) / (2 n )”. It is added to the digital voltage, and the value of the addition result is used as the next calculation result.
  • the DC voltage is adjusted to a relatively appropriate value to obtain a similar current waveform and according to the characteristics of the load.
  • a rectification operation with always low loss and low harmonic current is realized.
  • a DC voltage is converted into a digital signal by an AD conversion means at a sampling frequency sufficiently higher than the frequency of the AC power supply, and the obtained digital signal is subjected to LPF calculation for each period, and digitally Interpolate minute information below resolution to interpolate minute information so that the digital signal interpolated with minute information is DC voltage information so that the phase width that is actually chopped is the desired value Adjust the digital signal. Even if there is fluctuations in the power supply frequency component included in the smoothing voltage of the DC voltage and the resolution of the digital information is rough, the digital signal is dispersed due to fluctuations, so a digital signal equivalent to a high resolution is obtained on average. be able to.
  • the rectifier circuit device can always realize a rectification operation with little loss and less harmonic current even when the input current pulsates due to the characteristics of the connected load.
  • FIG. FIG. 1 is a circuit diagram showing a configuration of a rectifier circuit device according to Embodiment 1 of the present invention.
  • a single loop is formed by short-circuiting both output terminals of the single-phase AC power supply 1 by the semiconductor switch 104 via the reactor 102.
  • the current detector 103 detects the current of the loop and outputs a signal indicating the detected current value Iac to the control circuit 100.
  • the semiconductor switch 104 When the semiconductor switch 104 is turned on, the current in the reactor 102 increases.
  • the semiconductor switch 104 when the semiconductor switch 104 is turned off, the current flowing through the reactor 102 is rectified by the diode bridge 105, and the rectified current is It flows into the load 4 and drives the load 4.
  • the DC voltage Vdc across the smoothing capacitor 106 applied to the load 4 is detected by the DC voltage detector 110, and the DC voltage detector 110 outputs a signal indicating the detected DC voltage Vdc to the control circuit 100.
  • the voltage level comparator 109 compares the AC voltage level of the AC power supply 1 with a predetermined threshold voltage to generate a binary signal Scom indicating whether or not the threshold voltage is higher than the threshold voltage. Output to 100. Based on the binary signal Scom, the control circuit 100 detects the phase of the AC voltage output from the AC power supply 1 based on the cycle and phase, and determines the AC voltage based on the detected phase of the AC voltage.
  • the semiconductor switch 104 generates a target current waveform having a shape that is substantially the same frequency and similar to the AC voltage, and the Iac detected by the current detector 103 approaches the similar shape of the generated target current waveform. It is characterized in that it is controlled to perform a chopping operation.
  • control circuit 100 resembles the target current waveform to be generated according to the deviation so that the DC voltage Vdc detected by the DC voltage detector 110 becomes a desired voltage set in the control circuit 100. Adjust the ratio.
  • the control circuit 100 increases the similarity ratio of the target current command so as to obtain a large current, and the actual DC voltage is higher than the desired DC voltage. If it is higher, control is performed so that a small current is obtained.
  • the control circuit 100 detects the phase width that drives the semiconductor switch 104 by pulse width modulation (hereinafter referred to as “PWM”) based on the chopping state of the semiconductor switch 104, and the phase width and a desired value are detected. And the desired DC voltage value is adjusted according to the deviation.
  • PWM pulse width modulation
  • FIG. 2 is a block diagram showing a detailed configuration of the control circuit 100 of FIG.
  • the final control target of the control system is to control the chopping operation phase width ⁇ w ON in which chopping driving is performed to a desired phase width ⁇ w ON * .
  • the AC voltage phase detector 201 detects the AC phase based on the binary signal Scom binarized by comparing the voltage level of the AC power source 1 with a predetermined threshold voltage Vth, and detects the detected AC A signal indicating the phase is output to the target current waveform former 202 and the chopping phase width detector 212.
  • the specific operation of the AC voltage phase detector 201 will be described later in detail.
  • the target current waveform former 202 generates a predetermined target current waveform, which will be described later in detail, based on the signal indicating the AC phase, and outputs it to the multiplier 208.
  • the chopping phase width detector 212 determines the phase of the AC voltage indicated by the signal from the AC voltage phase detector 201 based on the chopping drive signal Sch for the semiconductor switch 104 output from the Iac compensation calculator 210 to the PWM modulator 211.
  • a phase width in the chopping state (hereinafter referred to as “chopping operation phase width” or simply “chopping phase width”) ⁇ w ON is detected, and a signal indicating the chopping phase width ⁇ w ON is output to the subtractor 204 To do.
  • the target phase width setting unit 203 outputs a signal indicating a desired chopping phase width ⁇ w ON * that is set and stored in advance to the subtracter 204.
  • the subtractor 204 is a so-called phase comparator, which calculates the deviation of the phase width by subtracting the desired chopping phase width ⁇ w ON * from the actual chopping phase width ⁇ w ON and compensates the signal indicating the deviation with the phase width compensation
  • the result is output to the calculator 205.
  • the phase width compensation calculator 205 generates a command voltage Vdc * of a DC voltage to be output by the rectifier circuit device by performing a predetermined compensation calculation for keeping the phase width in the PWM driving state stable.
  • a signal indicating the voltage Vdc * is output to the subtractor 206.
  • a signal indicating the actual output DC voltage Vdc detected by the DC voltage detector 110 is input to the subtractor 206.
  • the subtractor 206 calculates the voltage deviation by subtracting the actual output DC voltage Vdc from the DC voltage command voltage Vdc * , generates a signal indicating the voltage deviation, and outputs the signal to the Vdc compensation calculator 207.
  • the compensation calculator 207 outputs a signal indicating the voltage deviation after the compensation calculation to the multiplier 208 by executing a compensation calculation for the actual DC voltage Vdc to substantially match the command voltage Vdc * and become stable. To do.
  • the multiplier 208 multiplies the target current waveform from the target current waveform former 202 by the voltage deviation after the compensation calculation, generates an instantaneous current command value Iac * as a multiplication result, and outputs it to the subtracter 209. .
  • the subtractor 209 subtracts the actual current value Iac detected by the current detector 103 from the instantaneous current command value Iac * , thereby outputting a signal indicating the current deviation as a subtraction result to the Iac compensation calculator 210.
  • the Iac compensation calculator 210 performs a predetermined compensation calculation so that the current input from the AC power supply 1 substantially and stably matches the current command value Iac * , and indicates a current deviation after the compensation calculation.
  • the PWM modulator 211 generates a chopping drive signal Sch for turning on and off the semiconductor switch 104 and outputs it to the semiconductor switch 104 by performing PWM modulation on the current deviation after compensation calculation indicated by the input signal.
  • the chopping phase width detector 212 receives the signal from the AC voltage phase detector 201 based on the chopping drive signal Sch for the semiconductor switch 104 output from the Iac compensation calculator 210 to the PWM modulator 211 as described above. relative to the phase of the AC voltage indicated detects the chopping phase width .theta.w oN, and outputs a signal indicating the chopping phase width .theta.w oN to the subtractor 204. Thereby, a control loop of the chopping phase width is configured.
  • the loops (204 to 205, 206, 207, 208, 209, 210, 212 on the right side of the subtractor 204 in FIG.
  • the DC voltage Vdc so that the chopping phase width detected by the chopping phase width detector 212 substantially matches the target phase width set by the target phase width setting unit 203.
  • Is controlled. 2 is detected by the DC voltage detector 110 in a loop on the right side of the subtracter 206 in FIG. 2 (refers to a loop returning from 206 to 206 through 206, 207, 208, 209, 210, 211, 104, 110).
  • the chopping drive control is performed by controlling the amplitude of the target current so that the DC voltage Vdc substantially matches the desired DC voltage Vdc * indicated by the phase width compensation calculator 205. Further, in a loop on the right side of the subtracter 209 in FIG. 2 (referring to a loop returning from 209 to 209 through 210, 211, 104, 103), the current Iac detected by the current detector 103 is a target current waveform. The chopping drive control is performed so as to substantially match the target current Iac * generated based on the target current waveform formed by the former 202.
  • FIG. 3A is a diagram for explaining the control operation according to the first operation example of the control circuit 100 of FIG. 1, in which the relationship between the AC voltage and the DC voltage after rectification, the target current waveform to be controlled, It is a signal waveform diagram which shows AC current after actually controlling.
  • FIG. 3B is a diagram for explaining the control operation according to the second operation example of the control circuit 100 of FIG. 1, and the relationship between the AC voltage and the DC voltage after rectification, and the target current waveform to be controlled.
  • FIG. 6 is a signal waveform diagram showing AC current after actual control.
  • the output DC voltage is relatively low, and the chopping phase width (for example, the minimum phase width) ⁇ w ON for the semiconductor switch 104 is smaller than the desired phase width ⁇ w ON *. This is the case.
  • the phase period in which the AC voltage is higher than the DC voltage increases, the current flowing from the AC power source 1 to the DC side via the reactor 102 and the diode bridge 105 increases. For this reason, the waveform of the AC current becomes sharp, and the harmonic component of the AC current increases.
  • the output DC voltage is relatively high, and the chopping phase width (for example, the maximum phase width) ⁇ w ON for the semiconductor switch 104 is larger than the desired phase width ⁇ w ON *. This is the case.
  • the phase period in which the AC voltage is higher than the DC voltage is reduced as compared with the first operation example, the current flowing from the AC power source 1 through the reactor 102 and the diode bridge 105 to the DC side is also reduced. The harmonic component of the AC current is reduced.
  • the period during which chopping is performed on the semiconductor switch 104 is increased as compared with the waveform in the first operation example of FIG. 3A, the loss of the circuit increases.
  • the chopping phase The width detector 212 may perform the chopping control by selecting a chopping phase width close to 0 degree or 180 degrees of the phase of the AC voltage as the control chopping phase width. Further, the chopping phase width detector 212 uses the phase width closer to the reference phase for determining the polarity of the AC current or the AC voltage instead of 0 degree or 180 degrees of the AC voltage phase as the control chopping phase width. And the chopping control may be performed. Further, the chopping phase width detector 212 may perform the chopping control by adding the obtained chopping phase widths and setting the phase width of the addition result as a control chopping phase width. Even if comprised in this way, it has the same effect.
  • Embodiment 2 the chopping phase width ⁇ w ON is detected and the DC voltage command Vdc * is adjusted.
  • the phase width in which the chopping is in a pause state (hereinafter referred to as “chopping pause”). It is characterized by obtaining the same effect by detecting ⁇ w OFF and adjusting the DC voltage command Vdc.
  • FIG. 4A is a diagram for explaining a control operation according to the third operation example of the control circuit 100 of the rectifier circuit device according to the second embodiment of the present invention, and shows the relationship between the AC voltage and the DC voltage after rectification.
  • FIG. 5 is a signal waveform diagram showing a target current waveform to be controlled and an AC current after actual control.
  • FIG. 4B is a diagram for explaining the control operation according to the fourth operation example of the control circuit 100 of the rectifier circuit device according to Embodiment 2 of the present invention, in which the AC voltage and the DC voltage after rectification are calculated. It is a signal waveform diagram which shows a relationship, the target current waveform which should be controlled, and AC current after actually controlling.
  • the output DC voltage is relatively low, and the chopping pause phase width (for example, the maximum phase width) ⁇ w OFF in which the semiconductor switch 104 is not chopped is large.
  • the output DC voltage is higher than that in the third operation example, and the chopping pause phase width (for example, the minimum phase width) ⁇ w OFF in which the semiconductor switch 104 is not chopped is This is a case where it is smaller than that in the third operation example. Since the chopping pause phase width ⁇ w OFF is complementary to the chopping operation phase width ⁇ w ON , the same effect can be obtained.
  • the chopping phase width detector 212 may perform the chopping control by selecting the chopping pause phase width ⁇ w OFF in the off period close to 90 degrees or 180 degrees as the control chopping phase width.
  • 4A and 4B show the waveform of only the half cycle of the AC voltage. As is clear from FIGS. 3A and 3B and the prior art, the remaining half cycles are also absolute values (instantaneous absolute values). (Value) will be omitted because it has the same waveform. 4A and 4B show waveforms for only a half cycle of the AC voltage. As is clear from FIGS. 3A and 3B and the conventional example, the remaining half cycles are the same as absolute values. The waveform is omitted because it is
  • FIG. The third embodiment is characterized in that the control method of the first embodiment is simplified, and the chopping phase width detector 212 has a polarity (symbol) of the AC voltage from 0 degree or 180 degrees until the chopping is in a resting state.
  • the chopping control is performed by detecting the first half phase width ⁇ 1w ON in a section (positive section or negative section) in which is not changed.
  • FIG. 5A is a diagram for explaining a control operation according to a fifth operation example of the control circuit 100 of the rectifier circuit device according to Embodiment 3 of the present invention, and shows the relationship between the AC voltage and the DC voltage after rectification.
  • FIG. 5 is a signal waveform diagram showing a target current waveform to be controlled and an AC current after actual control.
  • FIG. 5B is a diagram for explaining the control operation according to the sixth operation example of the control circuit 100 of the rectifier circuit device according to the third embodiment of the present invention, in which the AC voltage and the DC voltage after rectification are calculated. It is a signal waveform diagram which shows a relationship, the target current waveform which should be controlled, and AC current after actually controlling.
  • the fifth operation example in FIG. 5A is a case where the output DC voltage is relatively low and the phase width in which the semiconductor switch 104 is chopped is relatively small.
  • the sixth operation example in FIG. This is a case where the output DC voltage is higher than that in the fifth operation example, and the phase width in which the semiconductor switch 104 is chopped is larger than that in the fifth operation example. Since the phase width ⁇ 1w ON in which the first half of the chopping is performed has a similar tendency in the period of the half cycle of the AC voltage, the same effects as those of the first embodiment can be obtained.
  • Embodiment 4 is characterized in that the control method of the first embodiment is simplified as in the third embodiment, and the chopping phase width detector 212 is used from 0 degree or 180 degrees until the chopping enters a resting state.
  • the chopping control is performed by detecting the latter phase width ⁇ w2 ON in the section (positive section or negative section) where the polarity of the AC voltage is fixed without changing.
  • FIG. 6A is a diagram for explaining the control operation according to the seventh operation example of the control circuit 100 of the rectifier circuit device according to Embodiment 4 of the present invention, and shows the relationship between the AC voltage and the rectified DC voltage.
  • FIG. 5 is a signal waveform diagram showing a target current waveform to be controlled and an AC current after actual control.
  • FIG. 6B is a diagram for explaining the control operation according to the eighth operation example of the control circuit 100 of the rectifier circuit device according to Embodiment 4 of the present invention, in which the AC voltage and the DC voltage after rectification are calculated. It is a signal waveform diagram which shows a relationship, the target current waveform which should be controlled, and AC current after actually controlling.
  • the seventh operation example in FIG. 6A is a case where the output DC voltage is relatively low, and the chopping phase width ⁇ w2 ON in which the semiconductor switch 104 is chopped is relatively small.
  • the eighth operation in FIG. 6B An example is a case where the output DC voltage is higher than that in the seventh operation example, and the chopping phase width ⁇ w2 ON in which the semiconductor switch 104 is chopped is larger than that in the seventh operation example. Since the chopping operation phase width ⁇ w2 ON in the second half also has the same tendency in the half-cycle section of the AC power supply 1, the same effect as that of the first embodiment can be obtained.
  • FIG. Embodiment 5 includes a chopping phase width Shitadaburyu1 ON embodiment 3 detects the sum of the phase width ( ⁇ w1 ON + ⁇ w2 ON) the chopping phase width detector 212 with chopping phase width Shitadaburyu2 ON embodiment 4, the The DC voltage is controlled so that the total phase width ( ⁇ w1 ON + ⁇ w2 ON ) becomes a desired phase width.
  • FIG. 7A is a diagram for explaining the control operation according to the ninth operation example of the control circuit 100 of the rectifier circuit device according to Embodiment 5 of the present invention, and shows the relationship between the AC voltage and the DC voltage after rectification.
  • FIG. 5 is a signal waveform diagram showing a target current waveform to be controlled and an AC current after actual control.
  • FIG. 7B is a diagram for explaining a control operation according to the tenth operation example of the control circuit 100 of the rectifier circuit device according to the fifth embodiment of the present invention, in which an AC voltage and a DC voltage after rectification are calculated. It is a signal waveform diagram which shows a relationship, the target current waveform which should be controlled, and AC current after actually controlling.
  • the same effects as in the first to fourth embodiments can be obtained.
  • FIG. FIG. 8 is a circuit diagram showing a configuration of a rectifier circuit device according to Embodiment 6 of the present invention.
  • FIG. 9 is a block diagram showing a detailed configuration of the control circuit 111 of FIG. 8, the rectifier circuit device according to the sixth embodiment is characterized by including a control circuit 111 instead of the control circuit 100 of FIG. 1, and the control circuit 111 is configured as illustrated in FIG.
  • an input situation determination unit 213 having an input current fluctuation determination blood setting unit 213a, a target phase width selector 214 (provided instead of the target phase width setting unit 203 in FIG. 1), and chopping A phase width extractor 216 is further provided.
  • a desired chopping phase width in a pulsating region is provided separately from a desired chopping phase width in a region that does not pulsate, and the pulsating region has a preset constant time or constant period. The maximum or average chopping phase width in the number is extracted and the chopping control is performed.
  • the control circuit 111 performs chopping control of the semiconductor switch 104, thereby reducing harmonics of the power supply voltage and controlling the DC voltage.
  • the final control target of the control system is such that the chopping phase width ⁇ w ON for which chopping driving is performed matches the desired phase width ⁇ w ON * from the target phase width selector 214. Is to control.
  • the configuration and operation of the control circuit 111 in FIG. 9 will be described focusing on differences from the control circuit 100 in FIG. 2, and description of the same configuration and operation as the control circuit 100 in FIG. 2 will be omitted.
  • the current detector 103 outputs a signal indicating the detected AC current Iac to the input status determiner 213.
  • the input status determination means 213 calculates the fluctuation range of the input current from the peak values of a plurality of power supply voltage periods, and determines the input current fluctuation determination preset by the input current fluctuation determination value setting unit 213a from the calculated fluctuation width. The value is subtracted and a signal indicating the fluctuation width deviation as a subtraction result is output to the target phase width selector 214 and the chopping phase width extractor 216.
  • the target phase width selector 214 stores in advance the desired chopping phase width ⁇ w ON * to be set corresponding to various numerical ranges of the fluctuation width deviation in the built-in table memory 214m as a chopping phase width table, and determines the input status Based on the signal indicating the fluctuation width deviation (degree of fluctuation of the input current) from the device 213, the corresponding chopping phase width ⁇ w ON * is determined with reference to the chopping phase width table, and the signal indicating it is subtracted. Output to the device 204.
  • the chopping phase width extractor 216 generates a pulsation of a predetermined value or more in the phase width based on the phase width in the chopping state from the chopping phase width detector 212 and the fluctuation width deviation from the input status determination unit 213.
  • a signal indicating the chopping phase width ⁇ w ON in the chopping state from the chopping phase width detector 212 is output to the subtractor 204 as it is.
  • the chopping phase width extractor 216 determines that a pulsation of a predetermined value or more has occurred in the chopping phase width ⁇ w ON , the maximum or average chopping state in a preset fixed time or fixed number of cycles And a signal indicating the phase width is output to the subtracter 204.
  • the rectifier circuit device having the control circuit 111 of FIG. 9 configured as described above, even when there is a pulsating load that generates a pulsation of a predetermined value or more, the harmonics of the power supply voltage are greatly affected.
  • the phase width ⁇ w ON in the chopping state can be extracted, and both reduction of the harmonics of the power supply voltage and reduction of the circuit loss can be achieved.
  • FIG. FIG. 10 is a circuit diagram showing a configuration of a rectifier circuit device according to Embodiment 7 of the present invention.
  • FIG. 11 is a block diagram showing a detailed configuration of the control circuit 112 of FIG.
  • the rectifier circuit device of FIG. 10 is characterized by driving a motor of a compressor 301 connected to the compressor driving unit 300 as a load, and the control is executed by the compressor control circuit 302.
  • the compressor control circuit 302 outputs a rotation speed command Srot to the compressor drive unit 300 and the control circuit 112 to rotate the motor of the compressor 301 at a desired rotation speed.
  • the rectifier circuit device according to Embodiment 7 in FIGS. 10 and 11 provides a desired chopping phase width in the pulsating region separately from the desired chopping phase width in the non-pulsating region, as in Embodiment 6.
  • the chopping control is performed by selecting the maximum or average chopping phase width in a predetermined time or a predetermined number of periods.
  • the control circuit 112 in FIG. 11 is compared with the control circuit 111 in FIG. (A) In place of the input status determiner 213, a drive status determiner 215 that determines the drive status based on the rotational speed command Srot from the compressor control circuit 302 is provided. (B) In place of the target phase width selector 214, a target phase width selector 214A having a built-in table memory 214Am is provided, (C) Instead of the chopping phase width extractor 216, a chopping phase width extractor 216A is provided.
  • a motor rotation speed command Srot is input from the compressor control circuit 302 to the drive status determination unit 215.
  • the drive status determiner 215 calculates a rotational speed deviation by subtracting a preset rotational speed from the motor rotational speed command Srot, and outputs a signal indicating the rotational speed deviation to the target phase width selector 214A and the chopping phase width. Output to the extractor 216A.
  • the target phase width selector 214A stores in advance the desired chopping phase width ⁇ w ON * to be set corresponding to various numerical ranges of the rotational speed deviation in the built-in table memory 214Am as a chopping phase width table, and determines the drive status
  • the corresponding chopping phase width ⁇ w ON * is determined with reference to the chopping phase width table based on the signal indicating the rotational speed deviation from the unit 215, and a signal indicating it is output to the subtractor 204.
  • the number of rotations for driving the compressor 301 is set in advance based on the phase width in the chopping state from the chopping phase width detector 212 and the rotational speed deviation from the driving state determination unit 215.
  • the signal indicating the chopping phase width ⁇ w ON from the chopping phase width detector 212 is output to the subtractor 204 as it is.
  • the chopping phase width extractor 216A when the rotational speed for driving the compressor 301 is equal to or lower than the preset rotational speed, is the maximum or average chopping state for a predetermined time period or constant frequency.
  • the phase width is extracted and a signal indicating the phase width is output to the subtracter 204.
  • a reciprocating type or rolling piston type compressor 301 used in a small-sized refrigeration and air-conditioning apparatus for home use has a characteristic that required power in each of a suction stroke, a compression stroke, and a discharge stroke is significantly different. If the necessary power in each stroke is not properly supplied, the compressor 301 will vibrate and cause damage to the piping. For this reason, control which suppresses vibration by controlling the instantaneous instantaneous speed of the electric motor for driving in each stroke to be constant is performed. As a result, the load of the rectifier circuit device according to the present invention has a pulsation with a cycle of changing each stroke.
  • the occurrence of vibration is also related to the transition cycle of each stroke, and if the cycle is shortened, it has a characteristic that it is attenuated by the inertia effect due to the moment of inertia, and when the cycle is short, that is, when the motor rotation speed is high, It is not necessary to perform control for suppressing vibration, and it is possible to maintain a state in which vibration is small even with average speed control alone. In the case of only average speed control, the load on the DC side has less pulsation.
  • the chopping phase width extractor 216A has either the number of rotations that exceeds or is less than the predetermined rotation number.
  • the phase width of the chopping state is output to the subtractor 204 as it is, or the phase width of the maximum or average chopping state in a predetermined time or a predetermined number of cycles is extracted. Whether to output to the subtractor 204 is switched.
  • the chopping phase width extractor 216A outputs the phase width information of the chopping state to the subtractor 204 as it is in the region where the rotation speed of the compressor 301 is high, and in advance in the region where the rotation speed of the compressor 301 is low.
  • the threshold value of the rotation speed in these switchings is a value that changes depending on the specification specifications such as the compression ratio and the moment of inertia of the compressor 301.
  • the chopping phase width ⁇ w ON or the phase width ⁇ w OFF in which the chopping is in a suspend state may be determined based on whether or not the power supply cycle changes every time.
  • the state of the pulsating load can be estimated by using the rotation speed command Srot of the motor of the compressor 301, so the pulsating state is directly detected. Therefore, the phase width of the chopping state can be extracted, and both reduction of harmonics of the power supply voltage and reduction of circuit loss can be achieved.
  • the drive rotation speed command Scot of the compressor 301 is used as the input of the drive status determination unit 215. However, it is necessary to suppress the occurrence of vibration due to the rotation speed when the compressor 301 is driven. Whether or not the instantaneous speed control to be executed is input as input from the compressor control circuit 302, and the target phase width selection signal is output to the target phase width selector 214 and the chopping phase width extractor 216A according to the presence or absence of the instantaneous speed control. Similar chopping control can be performed.
  • FIG. FIG. 12A is a diagram for explaining the control operation according to the eleventh operation example of the control circuit 100 of the rectifier circuit device according to Embodiment 8 of the present invention, and shows the relationship between the AC voltage and the DC voltage after rectification.
  • FIG. 5 is a signal waveform diagram showing a target current waveform to be controlled and an AC current after actual control.
  • FIG. 12B is a diagram for explaining the control operation according to the twelfth operation example of the control circuit 100 of the rectifier circuit device according to the eighth embodiment of the present invention, in which the AC voltage and the DC voltage after rectification are calculated. It is a signal waveform diagram which shows a relationship, the target current waveform which should be controlled, and AC current after actually controlling.
  • the control circuit 100 according to the eighth embodiment is characterized in that the target current waveform is a waveform other than a sine wave, for example, a triangular wave, thereby further reducing circuit loss.
  • the target current waveform is a waveform other than a sine wave, for example, a triangular wave, thereby further reducing circuit loss.
  • the harmonic current itself is small, so that the loss can be further reduced.
  • the eleventh operation example in FIG. 12A is a case where the output DC voltage is relatively low and the phase width ⁇ w ON where the semiconductor switch 104 is chopped is smaller than the desired phase width ⁇ w ON * . Also at this time, since the phase period in which the AC voltage is higher than the DC voltage increases, the current flowing from the AC power source 1 to the DC side via the reactor 102 and the diode bridge 105 increases. For this reason, the waveform of the AC current becomes sharp, and the harmonic component of the AC current increases.
  • the output DC voltage is higher than that in the eleventh operation example, and the phase width ⁇ w ON where the semiconductor switch 104 is chopped is higher than the desired phase width ⁇ w ON *. This is the case when it is getting bigger.
  • the phase period in which the AC voltage is higher than the DC voltage decreases, the AC current flowing from the AC power source 1 to the DC side via the reactor 102 and the diode bridge 105 also decreases, and the harmonic component of the AC current decreases.
  • the period (phase width) during which the chopping of the semiconductor switch 104 is performed is increased compared to the waveform in FIG. 12A, as in FIGS. 3A and 3B. As a result, circuit loss increases.
  • the instantaneous absolute value of the target current waveform is from 0 degree (start point) to 180 degrees (end point) of the AC voltage with time.
  • a triangular waveform having a section that monotonously increases with a certain slope then monotonously decreases with a certain slope from a predetermined intermediate point (an angle smaller than 90 degrees), and then becomes zero until the end point. Is used.
  • one chopping phase width ⁇ w ON is shown in the half cycle of the AC voltage, so two chopping pause phase widths are shown in the half cycle of the AC voltage. Therefore, as described above, chopping control may be performed based on one of the two chopping pause phase widths or the total phase width.
  • FIG. 13A is a diagram for explaining the control operation according to the thirteenth operation example of the control circuit 100 of the rectifier circuit device according to Embodiment 8 of the present invention, and shows the relationship between the AC voltage and the rectified DC voltage.
  • FIG. 5 is a signal waveform diagram showing a target current waveform to be controlled and an AC current after actual control.
  • FIG. 13B is a diagram for explaining the control operation according to the fourteenth operation example of the control circuit 100 of the rectifier circuit device according to Embodiment 8 of the present invention, in which the AC voltage and the DC voltage after rectification are calculated. It is a signal waveform diagram which shows a relationship, the target current waveform which should be controlled, and AC current after actually controlling. Further, FIG.
  • FIG. 13C is a diagram for explaining the control operation according to the fifteenth operation example of the control circuit 100 of the rectifier circuit device according to the eighth embodiment of the present invention, in which the AC voltage and the DC voltage after rectification are calculated. It is a signal waveform diagram which shows a relationship, the target current waveform which should be controlled, and AC current after actually controlling.
  • FIG. 13D is a diagram for explaining the control operation according to the sixteenth operation example of the control circuit 100 of the rectifier circuit device according to the eighth embodiment of the present invention, in which the AC voltage and the DC voltage after rectification are calculated. It is a signal waveform diagram which shows a relationship, the target current waveform which should be controlled, and AC current after actually controlling.
  • the target current waveform of the thirteenth operation example of FIG. 13A is instantaneously at a predetermined angle (for example, 110 degrees) exceeding 90 degrees in the second half, instead of the monotonously decreasing period, as compared with the target current waveform of FIG. 12A. It is the triangular waveform comprised so that it may have the area (zero and constant area) to make it zero.
  • the target current waveform in the fourteenth operation example of FIG. 13B is a predetermined angle exceeding 90 degrees in the latter half by increasing the monotonically increasing section as a sine wave with the passage of time as compared with the target current waveform of FIG. 13A. It is a waveform having a section (for example, a constant section at zero) that instantaneously becomes zero at (eg, 110 degrees).
  • the target current waveform of the fifteenth operation example of FIG. 13C is provided with a constraint condition in the target current waveform of FIG. 13B, and the angle of the intermediate point before 90 degrees (for example, 70 degrees) in the sine waveform of the first half.
  • the waveform is instantaneously zeroed.
  • the target current waveform of the sixteenth operation example of FIG. 13D is zero (a constant period at zero) for a predetermined period from 0 degree to the first intermediate point with time in the target current waveform of FIG. 13C. Thereafter, the waveform is configured to monotonously increase to the second intermediate point.
  • the target current is set to zero before 90 degrees.
  • the chopping operation of the semiconductor switch 104 is stopped from the chopping operation before the phase to be zero. It can be used with a heavy load.
  • the current flows from the AC power source 1 through the reactor 102 and the diode bridge 105 in the vicinity of 90 degrees, so that the target current becomes zero.
  • AC current continues to flow for a while, a current with less harmonic components can be realized with high efficiency.
  • the target current waveform may be monotonously increased or decreased, and a certain period may be included, that is, it may be substantially monotonically increased or substantially monotonically decreased.
  • substantially monotonically increasing means a monotonically increasing in a broad sense having a relationship of f ( ⁇ 1) ⁇ f ( ⁇ 2) when the phase of the target current waveform is ⁇ 1 ⁇ 2, in other words, time With the passage of time, it means at least increasing, or at least increasing and substantially monotonically increasing so as to be constant over a period of time.
  • substantially monotonically decreasing refers to a monotonic decreasing in a broad sense having a relation of f ( ⁇ 1) ⁇ f ( ⁇ 2) when the phase ⁇ 1 ⁇ 2 of the target current waveform, in other words, the passage of time
  • it means to substantially decrease monotonically so as to at least decrease, or at least decrease and to be constant in a part period.
  • FIG. FIG. 14 is a circuit diagram showing a configuration of a rectifier circuit device according to Embodiment 9 of the present invention.
  • the rectifier circuit device according to the ninth embodiment rectifies an AC voltage from the AC power source 1 through a reactor 602 by a bridge circuit configured by semiconductor switches 604a and 604b and diodes 605a, 605b, 605c, and 605d, The load 4 is driven through the smoothing capacitor 106.
  • the chopping control method according to the present embodiment is the same as that of the control circuit 100 of FIG. 1 according to the first embodiment, and the two semiconductor switches 604b and 604d are simultaneously driven using the chopping drive signal Sch.
  • Embodiment 10 FIG. FIG.
  • FIG. 15 is a circuit diagram showing a configuration of a rectifier circuit device according to Embodiment 10 of the present invention.
  • the rectifier circuit device according to the tenth embodiment rectifies the AC voltage from the AC power source 1 through the reactor 702 with a bridge circuit configured by semiconductor switches 704a and 704b and diodes 705a, 705b, 705c, and 705d,
  • the load 4 is driven through the smoothing capacitor 106.
  • the chopping control method according to the present embodiment only one of the semiconductor switches 705a or 705b is chopped using two chopping drive signals Sch1 and Sch2 in accordance with the polarity of the AC voltage from the AC power supply 1.
  • the semiconductor switch 704b is chopped using the chopping drive signal Sch2, and the AC voltage polarity is low on the side where the reactor 702 is connected. If so, the semiconductor switch 704a is chopped using the chopping drive signal Sch1.
  • the semiconductor switches 704a and 704b when the semiconductor switches 704a and 704b are turned on at the same time, the DC output voltage to the load 4 is short-circuited. Therefore, which of the semiconductor switches 704a and 704b is in the vicinity where the polarity of the AC voltage is reversed. May also be set not to turn on. In such a case, in FIGS. 3A and 3B, the phase in which the chopping is changed to the resting state can occur even in the vicinity of 0 degree and 180 degrees. However, in this case, since the chopping is intentionally suspended to prevent a short circuit of the DC output voltage, it is easily realized by not handling the chopping according to the present invention as a phase that has changed to a suspended state. Can do.
  • FIG. 16A is a diagram for explaining a first operation example of the binarization processing of the voltage level comparator 109 of the rectifier circuit device according to Embodiments 1 to 10 of the present invention, and illustrates an AC voltage and a threshold voltage Vth. And a binary waveform signal from the voltage level comparator 109.
  • FIG. 16B is a diagram for explaining a second operation example of the binarization processing of the voltage level comparator 109 of the rectifier circuit device according to Embodiments 1 to 10 of the present invention. It is a signal waveform diagram showing the relationship with the voltage Vth and the binary signal from the voltage level comparator 109.
  • FIGS. 16A and 16B show a method of detecting a voltage phase from information on whether or not the AC voltage is equal to or higher than a certain level.
  • This information obtains as a binary signal whether or not the instantaneous voltage of the AC voltage exceeds the threshold value. That is, the voltage level comparator 109 compares the AC voltage with the threshold voltage Vth and outputs a high level signal when the AC voltage is equal to or higher than the threshold voltage Vth, while the AC voltage is lower than the threshold voltage Vth. When a low level signal is output.
  • the cycle of the binary signal is the same as the power supply frequency. If the midpoint of the high level side or low level side of the binary signal is obtained, the AC voltage phase is 90 degrees. Or you can know the time of 270 degrees. Further, the midpoints of 90 degrees and 270 degrees of the AC voltage phase are 180 degrees and 0 degrees. If the information thus obtained is multiplied using a PLL or the like, the instantaneous instantaneous phase can be accurately known.
  • phase information in units of degrees can be obtained. Then, the instantaneous instantaneous target current waveform may be called from the obtained phase information.
  • Other methods for detecting the phase using binary information obtained from level comparison have been proposed in, for example, Patent Document 4 disclosed by the present inventor, and are not particularly limited.
  • the DC voltage is relatively adjusted so that the phase width in which the chopping operation is performed becomes a desired phase width.
  • a current waveform is obtained, and a rectification operation with always low loss and low harmonic current is realized.
  • FIG. FIG. 17 is a block diagram showing a detailed configuration of the control circuit 100 of the rectifier circuit device according to Embodiment 11 of the present invention.
  • the control circuit 100 of the rectifier circuit device according to the eleventh embodiment includes an AD converter 230 and an LPF between the DC voltage detector 110 and the subtractor 206, as compared with the control circuit 100 of FIG.
  • the present invention is characterized in that an arithmetic unit 231 is inserted, and provides an embodiment that is particularly effective when implemented by digital computation.
  • differences from the control circuit 100 of FIG. 2 will be described.
  • an analog signal indicating a DC voltage detected by the DC voltage detector 110 is converted into a digital signal indicating an AD conversion value Vad by an AD converter 230 that performs AD conversion at a sampling frequency sufficiently higher than the frequency of the AC power supply 1.
  • an LPF operation is performed by an LPF operation unit 231 that performs an operation (described later in detail) having a low-pass filter characteristic, and a signal (LPF operation value Vdca) as a result of the operation is output to the subtracter 206.
  • the frequency of the AC power source 1 is 60 Hz
  • the sampling frequency is 600 kHz.
  • FIG. 18 is a block diagram showing a detailed configuration of the LPF calculator 231 of FIG.
  • a signal indicating the AD conversion value from the AD converter 230 is input to the adder 253.
  • the adder 253 adds the signal indicating the input AD conversion value and the signal from the constant multiplier 251 to output a signal indicating the LPF operation value Vdca as an addition result to the subtractor 206 and one clock.
  • the data is output to the constant multiplier 251 through a delay device 252 that is delayed by time.
  • the constant multiplier 251 multiplies the input signal by a predetermined constant (2 n ⁇ 1) / (2 n ) and outputs a signal indicating the multiplication result to the adder 253.
  • This LPF calculation process is a first-order low-pass filter having a time constant “2 n ” times the calculation cycle, and the amplitude is “2 n ” times. Therefore, by executing this calculation, n-bit information below the decimal point is added to the AD conversion value Vad.
  • FIG. 19 is a diagram illustrating the operation of the rectifier circuit device of FIG. 17, in which the AC current Iac from the AC power source 1, the DC voltage Vdc, and the AD conversion value Vad of the AD converter 230 (the DC voltage Vdc is indicated by a dotted line).
  • FIG. 19 shows an operation principle that can improve the voltage detection accuracy by performing the low-pass filter process with a single-phase AC rectifier circuit.
  • the DC voltage still has a fluctuation having a frequency twice the power source frequency. . In order to reduce this fluctuation, it is necessary to increase the capacitor capacity of the smoothing capacitor 106 infinitely, which is practically impossible.
  • FIG. 19C shows an AD conversion value Vad when the DC voltage Vdc (indicated by a dotted line) is AD converted at a sampling frequency sufficiently higher than the frequency of the AC power supply 1.
  • the obtained AD conversion value Vad (digital value) takes values of K, K + 1, K + 2, K + 3,.
  • the low-pass filter operation is performed on the AD conversion value Vad, the value converges to a value between (K + 1) and (K + 2) in the case of FIG. Further, as shown in FIG.
  • the command voltage Vdc * needs to have the same resolution as that of the AD converter 230. However, since the command voltage Vdc * is information only, the resolution is similar to the above. It is easy to increase the value.
  • the LPF calculation the case of using a power of 2 has been described.
  • the constant of the constant multiplier 251 is set to a value between 0 and 1, the LPF calculation can be similarly realized. Further, as apparent from the operation principle of FIG. 19, the same effect can be obtained even if the LPF calculation is a method other than the method shown in FIG.
  • the technique according to the eleventh embodiment can be implemented by combining the first to tenth embodiments described so far.
  • chopping when chopping changes from the resting state to the chopping state, it may change again to the resting state for a moment due to circuit fluctuations or noise.
  • the chopping in the invention can be easily realized by not handling as a phase changed to a dormant state.
  • the AC voltage phase detector 201 detects the phase of the AC voltage and detects the chopping phase width based on the detected phase.
  • the present invention is not limited to this, and the AC power source 1 If the frequency is fixed, the chopping phase width may be detected based on information such as zero crossing of the AC power supply 1. Further, when detecting the chopping phase width, the time of the chopping phase width may be measured by counting with the number of pulses of the carrier signal that realizes the PWM control which is an example of the chopping technique.
  • the rectifier circuit device can achieve both suppression of harmonic current and reduction of circuit loss, so that a heat pump is configured by compressing refrigerant with a compressor,
  • the present invention can also be applied to applications such as cooling, heating, or freezing foods.
  • Diode bridge circuit, 106 smoothing capacitor, 109 ... voltage level comparator, 110 ... DC voltage detector, 201 ... AC voltage phase detector, 202 ... target current waveform former, 203 ... Target phase width setting device, 204, 206, 209 ... subtractor, 205 ... Phase width compensation calculator, 207 ... Vdc compensation calculator, 208 ... multiplier, 210 ... Iac compensation calculator, 211 ... pulse width modulator, 212 ...
  • chopping phase width detector 213... Input status determination device, 213a: Input current fluctuation judgment value setting device, 214, 214A ... Target phase width selector, 214m, 214Am ... built-in table memory, 215 ... Driving status determiner, 216, 216A ... Chopping phase width extractor, 230: AD converter, 231 ... Low-pass filter computing unit, 251 ... Constant multiplier, 252 ... delay device, 253 ... Adder, 300 ... compression drive unit, 301 ... Compressor, 302 ... compressor control circuit, 605a to 605d, 705a to 705d, diodes.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

L'invention concerne un dispositif à circuit redresseur qui, par découpage à l'aide d'un commutateur (104) à semiconducteur, court-circuite ou ouvre la borne de sortie d'une source (1) d'alimentation en courant alternatif monophasé via une réactance, redressant la tension alternative fournie par la source (1) d'alimentation en courant alternatif monophasé via la réactance (102) pour donner une tension continue et fournissant ladite tension continue à une charge. Un dispositif (100) de commande dans ledit dispositif à circuit redresseur : commande le découpage du commutateur (104) à semiconducteur de façon à faire correspondre une forme d'onde détectée de courant à une forme d'onde visée de courant ; régule l'amplitude de la forme d'onde visée de courant de façon à faire correspondre une tension continue détectée à une consigne de tension continue visée ; et régule ladite consigne de tension continue visée de façon à faire correspondre soit la largeur d'une phase de mouvement de découpage, qui est la période où le commutateur (104) à semiconducteur est en état de mouvement de découpage, soit la largeur d'une phase de repos de découpage, qui est la période où le commutateur (104) à semiconducteur est en état de repos de découpage, à une largeur de phase prescrite.
PCT/JP2011/002996 2010-07-08 2011-05-30 Dispositif à circuit redresseur WO2012004927A1 (fr)

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BR112013000139A BR112013000139A2 (pt) 2010-07-08 2011-05-30 dispositivo de circuito retificador
CN201180033930.1A CN103004075B (zh) 2010-07-08 2011-05-30 整流电路装置
JP2012523508A JP5830691B2 (ja) 2010-07-08 2011-05-30 整流回路装置
KR1020137003271A KR20130031379A (ko) 2010-07-08 2011-05-30 정류 회로 장치

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JP2010155651 2010-07-08
JP2010-155651 2010-07-08
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KR (1) KR20130031379A (fr)
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WO2014034003A1 (fr) * 2012-08-30 2014-03-06 パナソニック株式会社 Dispositif de commande destiné à un dispositif de circuit redresseur, et dispositif de circuit redresseur
CN104782037A (zh) * 2012-11-13 2015-07-15 丰田自动车株式会社 升压转换器的控制装置
JP2016010283A (ja) * 2014-06-26 2016-01-18 パナソニックＩｐマネジメント株式会社 整流回路装置及び整流回路装置のための制御回路
EP3200336A4 (fr) * 2014-09-26 2018-06-06 Mitsubishi Electric Corporation Dispositif de conversion de courant

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EP3628946A1 (fr) 2013-03-25 2020-04-01 LG Electronics Inc. Réfrigérateur
TWI640146B (zh) 2017-02-06 2018-11-01 圓展科技股份有限公司 智慧型充電系統及智慧型充電方法

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JPH10337031A (ja) * 1997-05-30 1998-12-18 Toshiba Corp 直流電源装置
JP2008141901A (ja) * 2006-12-05 2008-06-19 Matsushita Electric Ind Co Ltd 直流電源装置

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Publication number Priority date Publication date Assignee Title
WO2014034003A1 (fr) * 2012-08-30 2014-03-06 パナソニック株式会社 Dispositif de commande destiné à un dispositif de circuit redresseur, et dispositif de circuit redresseur
JPWO2014034003A1 (ja) * 2012-08-30 2016-08-08 パナソニックＩｐマネジメント株式会社 整流回路装置の制御装置および整流回路装置
CN104782037A (zh) * 2012-11-13 2015-07-15 丰田自动车株式会社 升压转换器的控制装置
JP2016010283A (ja) * 2014-06-26 2016-01-18 パナソニックＩｐマネジメント株式会社 整流回路装置及び整流回路装置のための制御回路
EP3200336A4 (fr) * 2014-09-26 2018-06-06 Mitsubishi Electric Corporation Dispositif de conversion de courant
KR101905345B1 (ko) 2014-09-26 2018-10-05 미쓰비시덴키 가부시키가이샤 전력 변환 장치

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JPWO2012004927A1 (ja) 2013-09-02
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CN103004075B (zh) 2015-07-01
JP5830691B2 (ja) 2015-12-09

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