WO2014034003A1 - Dispositif de commande destiné à un dispositif de circuit redresseur, et dispositif de circuit redresseur - Google Patents

Dispositif de commande destiné à un dispositif de circuit redresseur, et dispositif de circuit redresseur Download PDF

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Publication number
WO2014034003A1
WO2014034003A1 PCT/JP2013/004091 JP2013004091W WO2014034003A1 WO 2014034003 A1 WO2014034003 A1 WO 2014034003A1 JP 2013004091 W JP2013004091 W JP 2013004091W WO 2014034003 A1 WO2014034003 A1 WO 2014034003A1
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Prior art keywords
voltage
chopping
rectifier circuit
circuit device
phase width
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PCT/JP2013/004091
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English (en)
Japanese (ja)
Inventor
吉田　泉
京極　章弘
吉朗 土山
川崎　智広
シンホイ 戴
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パナソニック株式会社
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Priority to JP2014532739A priority Critical patent/JP6145896B2/ja
Priority to CN201380044880.6A priority patent/CN104604113B/zh
Publication of WO2014034003A1 publication Critical patent/WO2014034003A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0083—Converters characterised by their input or output configuration
    • H02M1/0085—Partially controlled bridges
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/46—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to a control device for a rectifier circuit device that rectifies alternating current from an alternating current power source into direct current, and more particularly, to a rectifier circuit device that rectifies alternating current from a single-phase alternating current power source such as home to form substantially direct current.
  • the present invention relates to a control device and a rectifier circuit device.
  • the rectifier circuit device is applied to a circuit device for driving a direct current load, and a device for converting the formed direct current again to an alternating current of an arbitrary frequency by an inverter circuit to drive a motor as a load at variable speed. Be done.
  • the rectifier circuit device according to the present invention constitutes, for example, a heat pump by compressing a refrigerant with a compressor, and is applied to a device that performs cooling, heating, refrigeration of food or the like, and is included in the power supply current in such a device.
  • the load on the transmission system is reduced by reducing the harmonic components to be reduced and improving the power factor to perform drive control with high efficiency.
  • FIG. 18 is a circuit diagram showing a configuration of a rectifier circuit device disclosed in Patent Document 1
  • FIG. 19 is a block diagram showing a configuration of a control unit in the rectifier circuit device of FIG.
  • both output terminals of the AC power supply 1 form a closed circuit by the on state of the semiconductor switch 3c via the rectifier bridge 2 and the reactor 3a, and charge the reactor 3a with current.
  • the semiconductor switch 3c is turned off, a current is supplied to the load 4 by the diode 3b.
  • the rectifier circuit device of FIG. 18 has a configuration in which the power supply current flows even in a period when the instantaneous voltage of the AC power supply 1 is low, the harmonic component of the power supply current decreases, and the power factor is improved.
  • the semiconductor switch 3 c is finely turned on / off at a frequency sufficiently higher than the frequency of the AC power supply 1 to chop the AC voltage of the AC power supply 1 (hereinafter, “semiconductor When the switch is operated for chopping operation or “chopping by semiconductor switch”, a current flows through the semiconductor switch 3c, which causes a problem of circuit loss.
  • the AC voltage from AC power supply 1 is rectified by rectifier bridge 2 and converted to a DC voltage including pulsation, and then the power is smoothed through reactor 3a and diode 3b.
  • the capacitor 3 d and the load 4 are supplied.
  • a rectifier circuit device with a power factor improving function by the known step-up chopper circuit 3 can be obtained by configuring so that the output voltage from the rectifier bridge 2 can be shorted by the semiconductor switch 3c via the reactor 3a. It is configured.
  • the step-up chopper circuit 3 detects the input current by the input current detector 6 and the input current detection unit 10, and the input voltage detected by the input voltage detection unit 11 of the waveform of the input current
  • the semiconductor switch 3c is subjected to chopping operation so as to have the same shape as the waveform (power supply voltage waveform), and the magnitude of the input current is adjusted so that the output voltage becomes a desired voltage.
  • Patent Document 1 proposes reducing the loss of the circuit by chopping the semiconductor switch only in the minimum section for reducing the number of harmonics.
  • FIG. 19 is a block diagram showing a control method for the proposal.
  • the phase of the power supply voltage is detected by the power supply zero cross detection means 5, and the chopping operation of the semiconductor switch 3c of FIG. 18 is permitted only for a fixed period by the pulse counter 13a. Is held to be off.
  • this control method a rectifier circuit device with low loss without increasing the power supply harmonics is realized.
  • the input current is substituted by the current after being rectified once, information on the absolute value of the input current is obtained, and the magnitude of this absolute value is calculated. It is a configuration to adjust. It is widely known that adjusting the magnitude of the absolute value of the input current in this manner is equivalent to adjusting the amplitude of the input current.
  • the output voltage is controlled to be constant under the condition that the load is determined, and the period during which the semiconductor switch is chopping is also fixed. Therefore, when the detected output voltage includes an error, the current waveform is changed.
  • the current waveform changes largely when the DC voltage changes by only 1 V.
  • the accuracy of 1 V with respect to 280 V of the DC voltage corresponds to 0.3%, and in the case of dividing the voltage by resistors to form a low voltage, a resistor with very high accuracy is required.
  • the control method in such a conventional rectifier circuit device is generally realized using a digital computer
  • the DC voltage has high resolution, that is, the number of bits.
  • a large number of analog-to-digital conversion (hereinafter referred to as "AD conversion") units are required, which increases the circuit load.
  • AD conversion analog-to-digital conversion
  • the object of the present invention is to solve the above-mentioned problems, and to reduce the power supply harmonic current according to the status of the connected load or an external command regardless of the detection accuracy of the output voltage. It is an object of the present invention to provide a control device and a rectifier circuit device of a rectifier circuit device which can reduce the loss of the circuit.
  • the control device of the rectifier circuit device is The chopping operation of the semiconductor switch shorts or opens the alternating voltage from the single phase alternating current power supply or the pulsating voltage obtained by rectifying the alternating current voltage through the reactor to rectify the single phase alternating current power supply into the direct current voltage.
  • Control device of the rectifier circuit device for supplying power to the load is A waveform forming unit that forms a target current waveform having the same frequency as the waveform of the AC voltage; An alternating current detection unit that detects an alternating current flowing from the single-phase alternating current power supply; A DC voltage detection unit that detects the DC voltage; A first control unit configured to control a chopping operation of the semiconductor switch such that a waveform of the detected alternating current substantially becomes the target current waveform; A second control unit configured to control an amplitude of the target current waveform such that the detected DC voltage substantially becomes a predetermined target DC voltage; The predetermined target DC voltage is controlled such that the chopping operation phase width in which the semiconductor switch is in the chopping operation state or the chopping pause phase width in which the semiconductor switch is in the chopping pause state is substantially equal to the predetermined phase width. And a third control unit.
  • the rectifier circuit device is The chopping operation of the semiconductor switch shorts or opens the alternating voltage from the single phase alternating current power supply or the pulsating voltage obtained by rectifying the alternating current voltage through the reactor to rectify the single phase alternating current power supply into the direct current voltage.
  • a rectifier circuit device for supplying power to the load A waveform forming unit that forms a target current waveform having the same frequency as the waveform of the AC voltage; An alternating current detection unit that detects an alternating current flowing from the single-phase alternating current power supply; A DC voltage detection unit that detects the DC voltage; A first control unit configured to control a chopping operation of the semiconductor switch such that a waveform of the detected alternating current substantially becomes the target current waveform; A second control unit configured to control an amplitude of the target current waveform such that the detected DC voltage substantially becomes a predetermined target DC voltage; The predetermined target DC voltage is controlled such that the chopping operation phase width in which the semiconductor switch is in the chopping operation state or the chopping pause phase width in which the semiconductor switch is in the chopping pause state is substantially equal to the predetermined phase width. And a third control unit.
  • the present invention it is possible to change a desired phase width in accordance with the status of a connected load or an external command, and a chopping operation to compare with a desired phase width regardless of the load fluctuation status.
  • a control device and a rectifier circuit device of a rectifier circuit device capable of realizing a rectification operation with less circuit loss and less harmonic current by accurately measuring a phase width or chopping idle phase width.
  • FIG. 1 is a circuit diagram showing a configuration of a rectifier circuit device according to a first embodiment of the present invention.
  • FIG. 2A is a block diagram showing a configuration of a control circuit in the rectifier circuit device of FIG.
  • FIG. 2B is a diagram showing a modification of control in the rectifier circuit device of FIG. 1, and is a block diagram showing a case where an output signal of a waveform shaper is used in processing of a chopping phase detector of a control circuit.
  • FIG. 2C is a diagram showing a modified example of control in the rectifier circuit device of FIG. 1 and is a block diagram showing a case where the output of the current detector is used in the processing of the chopping phase detector of the control circuit.
  • FIG. 2A is a block diagram showing a configuration of a control circuit in the rectifier circuit device of FIG.
  • FIG. 2B is a diagram showing a modification of control in the rectifier circuit device of FIG. 1, and is a block diagram showing a case where an output signal
  • FIG. 2D is a diagram showing a modification of control in the rectifier circuit device of FIG. 1, and is a block diagram showing a case where the output of the DC voltage detector is used in the processing of the chopping phase detector of the control circuit.
  • FIG. 2E is a diagram showing a modified example of control in the rectifier circuit device of FIG. 1, and is a block diagram showing a case where the output of the PWM modulator is used in the processing of the chopping phase detector of the control circuit.
  • FIG. 3A is a characteristic diagram of a target phase width setting unit when the desired phase width is a chopping operation phase width in the rectifier circuit device according to the present invention.
  • FIG. 3B is a characteristic diagram of a target phase width setting unit when the desired phase width is the chopping pause phase width in the rectifier circuit device according to the present invention.
  • FIG. 4A is a diagram for explaining a control operation according to a first operation example of the control device in the rectifier circuit device of FIG. 1, and (a) alternating voltage (hereinafter referred to as AC voltage) and rectified; A signal indicating the relationship with a direct current voltage (hereinafter referred to as a DC voltage), (b) a target current waveform to be controlled, and (c) an alternating current after actual control (hereinafter referred to as an AC current).
  • FIG. 4B is a diagram for explaining a control operation according to a second operation example of the control device in the rectifier circuit device of FIG. 1, and (a) relationship between AC voltage and DC voltage after rectification; b) A signal waveform diagram showing a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 5A is a diagram for explaining a control operation according to a third operation example of the control device in the rectifier circuit device of the second embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 5B is a diagram for explaining the control operation according to the fourth operation example of the control device in the rectifier circuit device of the second embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 6A is a diagram for explaining the control operation according to the fifth operation example of the control device in the rectifier circuit device of the embodiment 3 of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 6B is a diagram for explaining the control operation according to the sixth operation example of the control device in the rectifier circuit device of the embodiment 3 of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 7A is a diagram for explaining a control operation according to a seventh operation example of the control device in the rectifier circuit device of the fourth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 7B is a diagram for explaining the control operation according to the eighth operation example of the control device in the rectifier circuit device of the fourth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 8A is a diagram for explaining the control operation according to the ninth operation example of the control device in the rectifier circuit device of the fifth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification;
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 8B is a diagram for explaining the control operation according to the tenth operation example of the control device in the rectifier circuit device of the fifth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 9A is a diagram for explaining a control operation according to an eleventh operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 9B is a diagram for explaining the control operation according to the twelfth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 10A is a diagram for illustrating a control operation according to a thirteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 10A is a diagram for illustrating a control operation according to a thirteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is
  • FIG. 10B is a diagram for explaining the control operation according to the fourteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 10C is a diagram for illustrating the control operation according to the fifteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 10B is a diagram for explaining the control operation according to the fourteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship
  • FIG. 10D is a diagram for explaining the control operation according to the sixteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled and (c) an AC current after actual control.
  • FIG. 11 is a circuit diagram showing a configuration of a rectifier circuit device according to a seventh embodiment of the present invention.
  • FIG. 12 is a circuit diagram showing a configuration of a rectifier circuit device according to an eighth embodiment of the present invention.
  • FIG. 13 is a circuit diagram showing a configuration of a rectifier circuit device according to a ninth embodiment of the present invention.
  • FIG. 14A is a diagram for explaining a first operation example of the binarization processing of the voltage level comparator in the rectifier circuit device according to the first to ninth embodiments of the present invention, in which It is a signal waveform diagram which shows the relationship with a threshold voltage (Vth), and the binary signal from (b) voltage level comparator.
  • FIG. 14B is a diagram for explaining a second operation example of the binarization processing of the voltage level comparator in the rectifier circuit device according to the first to ninth embodiments of the present invention; It is a signal waveform diagram which shows the relationship with a threshold voltage (Vth), and the binary signal from (b) voltage level comparator.
  • Vth threshold voltage
  • Vth binary signal from (b) voltage level comparator
  • FIG. 15 is a block diagram showing a detailed configuration of a control circuit in a rectifier circuit device according to a tenth embodiment of the present invention.
  • FIG. 16 is a block diagram showing a detailed configuration of a low pass filter computing unit (hereinafter referred to as “LPF computing unit”) in the rectifier circuit device of FIG.
  • FIG. 17 is a diagram showing the operation of the rectifier circuit device of FIG. 15, and (a) AC current (Iac) from AC power supply, (b) DC voltage (Vdc), (c) AD converter
  • FIG. 7 is a signal waveform diagram showing an AD conversion value (Vad) (the DC voltage Vdc is indicated by a dotted line). It is a circuit diagram which shows the structure of the conventional rectifier circuit apparatus. It is a block diagram which shows the detailed structure of the control part in the conventional rectifier circuit apparatus of FIG.
  • the control device for a rectifier circuit device according to the first aspect of the present invention is The chopping operation of the semiconductor switch shorts or opens the alternating voltage from the single phase alternating current power supply or the pulsating voltage obtained by rectifying the alternating current voltage through the reactor to rectify the single phase alternating current power supply into the direct current voltage.
  • the controller is A waveform forming unit (201, 202) for forming a target current waveform having the same frequency as the waveform of the AC voltage; An alternating current detection unit (103) for detecting an alternating current flowing from the single-phase alternating current power supply; A DC voltage detection unit (110) for detecting the DC voltage; A first control unit (208, 209, 210, 211) for controlling the chopping operation of the semiconductor switch so that the waveform of the detected alternating current (Iac) substantially becomes the target current waveform; A second control unit (206, 207) for controlling the amplitude of the target current waveform such that the detected DC voltage (Vdc) substantially becomes a predetermined target DC voltage (Vdc * ); The predetermined value is set such that the chopping operation phase width ( ⁇ w ON ) in which the semiconductor switch is in the chopping operation state or the chopping pause phase width ( ⁇ w OFF ) in which the semiconductor switch is in the chopping pause state
  • the load state is such that the predetermined phase width in the first aspect is in the range of 0 degrees to 180 degrees with respect to a power supply half cycle Alternatively, it is configured to be changed and set in accordance with an external command.
  • the load status in the second aspect is the value of the alternating current, the input power calculated based on the alternating current, or It is configured as indicated by the output power of the rectifier circuit device.
  • the polarity of the alternating voltage is fixed in the third control unit according to any one of the first to third aspects.
  • the predetermined target DC voltage so that the chopping pause phase width or the instantaneous value of the chopping operation phase width detected within the period, or the average value by the number of times set in advance, substantially becomes the predetermined phase width are configured to control the
  • the third control unit according to any one of the first to third aspects is characterized in that the direct current in the predetermined period is lowest.
  • the predetermined target DC voltage so that the chopping pause phase width or chopping operation phase width detected within a period in which the polarity of the AC voltage is fixed, including voltage time, is substantially equal to the predetermined phase width.
  • the third control unit according to any one of the first to third aspects is the largest alternating current in a predetermined period.
  • the predetermined target DC voltage is set so that the chopping pause phase width or chopping operation phase width detected within a period in which the polarity of the AC voltage is fixed, including current, is substantially equal to the predetermined phase width. It is configured to control.
  • the polarity of the alternating voltage is fixed in the third control unit according to any one of the first to sixth aspects.
  • any phase width in the period or a total phase width is substantially a predetermined phase.
  • the predetermined target DC voltage is controlled to have a width.
  • the target current waveform according to any one of the first to seventh aspects has an instantaneous absolute value of the target current waveform (A) Within a period in which the polarity of the AC voltage is fixed, (a) From the start point of the period to a predetermined midpoint, at least increase or at least increase with time, and a partial period And (b) from the midpoint to the end point at least decrease or at least decrease with time and substantially constant so as to be constant over a period of time. After monotonically decreasing, it is set to have a period which becomes zero.
  • the target current waveform according to any one of the first to seventh aspects has an instantaneous absolute value of the target current waveform (A) Within a period in which the polarity of the alternating voltage is fixed, (a) from the start point of the period to a predetermined first intermediate point has a period which becomes zero with the passage of time, (b) From the first midpoint to the predetermined second midpoint, at least increasing, or at least increasing, and substantially monotonically increasing so as to be constant over a period of time, and (c) the second From the middle point to the end point is set to have a period that decreases at least or at least decreases with time and substantially monotonically decreases and then becomes zero so as to be constant in part of the period doing.
  • the control device for a rectifier circuit device is the control method according to any one of the first to ninth aspects, wherein the AC voltage is compared with a predetermined threshold voltage. It further comprises a phase detection unit (109) that generates a binary signal, The waveform forming unit detects a cycle and a phase of the AC voltage based on the binary signal, and a target current waveform having the same frequency as the waveform of the AC voltage based on the cycle and the phase of the detected AC voltage.
  • Form The third control unit is configured to detect a chopping operation phase width in which the semiconductor switch is in the chopping operation state or a chopping pause phase width in which the semiconductor switch is in the chopping suspension state based on the binary signal. ing.
  • control device for a rectifier circuit device according to an eleventh aspect of the present invention, in any one of the first to tenth aspects, the control device further includes: the DC voltage detection unit; An AD conversion unit (230) for AD converting the detected DC voltage to a digital voltage, and between the AD conversion unit and the second control unit, And a calculation unit (231) for outputting the voltage of the calculation result as the detected direct current voltage to the second control unit after the low-pass filter calculation is performed on the digital voltage.
  • the control device of a rectifier circuit device is set such that the sampling frequency of the AD converter in the eleventh aspect is sufficiently higher than the frequency of the single-phase AC power supply. ing.
  • the low-pass filter computation in the eleventh aspect or the twelfth aspect further includes “(2 n ⁇ 1) / After multiplying by a factor (2 n ) (where n is an integer), it is added to the input digital voltage and executed using the value of the addition result as the next calculation result.
  • a rectifier circuit device includes the control device of the rectifier circuit device according to any one of the first to thirteenth aspects.
  • the DC voltage is adjusted to a relatively appropriate value, and the current waveform becomes the same as the input voltage waveform, and the load condition Or, by changing the desired phase width according to an external command, or by accurately measuring the chopping operation phase width or chopping pause phase width to be compared with the desired phase width regardless of the load fluctuation state. It is always possible to realize a rectification operation with low circuit loss and low harmonic current.
  • the DC voltage is converted into a digital signal by the AD conversion unit and detected, and the obtained digital signal is subjected to low pass filter calculation (LPF calculation) for each period.
  • LPF calculation low pass filter calculation
  • rectifier circuit device and control circuit of the present invention are not limited to the configurations of the rectifier circuit device and control circuit described in the following embodiments, and are equivalent to the technical idea described in the following embodiments. Including those based on the technical ideas of Further, in each of the following embodiments, components having the same functions will be described with the same reference numerals.
  • FIG. 1 is a circuit diagram showing a configuration of a rectifier circuit device according to a first embodiment of the present invention.
  • a single loop is configured by shorting both output terminals of single-phase AC power supply 1 with semiconductor switch 104 via reactor 102.
  • the current detector 103 which is an alternating current detection unit, detects the current of the loop, and outputs a signal indicating the detected current value Iac to the control circuit 100.
  • the semiconductor switch 104 is turned on, the current of the reactor 102 is increased.
  • the semiconductor switch 104 is turned off, the current flowing to the reactor 102 is rectified by the diode bridge circuit 105, and the rectified current flows to the smoothing capacitor 106 and the load 4 to drive the load 4.
  • the DC voltage Vdc across the smoothing capacitor 106 applied to the load 4 is detected by the DC voltage detector 110, and the DC voltage detector 110 outputs a signal indicating the detected DC voltage Vdc to the control circuit 100.
  • the voltage level comparator 109 which is a phase detection unit of the AC voltage input from the AC power supply 1, compares the AC voltage level of the AC power supply 1 with a predetermined threshold voltage to obtain the threshold voltage or more. Is generated and output to the control circuit 100.
  • the control circuit 100 detects the phase of the AC voltage output from the AC power supply 1 based on the period and the phase of the binary signal Scom.
  • the control circuit 100 generates a target current waveform having substantially the same frequency as the AC voltage and having a similar shape to the AC voltage based on the phase of the detected AC voltage, and is detected by the current detector 103.
  • the semiconductor switch 104 is controlled to chopping so that the current value Iac approaches the similar shape of the generated target current waveform.
  • control circuit 100 is similar to the target current waveform to be generated according to the deviation so that DC voltage Vdc detected by DC voltage detector 110 becomes the desired voltage set in control circuit 100. Adjust the ratio.
  • the control circuit 100 increases the similarity ratio of the target current waveform to control so as to be a large current, and the actual DC voltage Vdc is desired. If it is higher than the DC voltage, control is made to be a small current.
  • the control circuit 100 detects a phase width driving the semiconductor switch 104 by pulse width modulation (hereinafter referred to as "PWM") based on the chopping state of the semiconductor switch 104, and the phase width and a desired value. And the desired DC voltage value is adjusted according to the deviation.
  • PWM pulse width modulation
  • FIG. 2A is a block diagram showing the detailed configuration of the control circuit 100 of FIG.
  • the final control target as the control system is to control the chopping operation phase width ⁇ w ON in which chopping driving is performed to a desired phase width ⁇ w ON * from the target phase width setter 203.
  • the AC voltage phase detector 201 detects an AC phase based on a binary signal Scom binarized by comparing the voltage level of the AC power supply 1 with a predetermined threshold voltage Vth, and detects AC.
  • a signal indicating the phase is output to the target current waveform shaper 202 and the chopping phase width detector 212.
  • the target current waveform former 202 generates a predetermined target current waveform, which will be described in detail later, and outputs it to the multiplier 208.
  • a waveform forming unit that forms a target current waveform having the same frequency as the waveform of AC voltage by AC voltage phase detector 201 and target current waveform shaper 202 in control circuit 100 is provided. It is configured.
  • the chopping phase width detector 212 is an AC voltage indicated by the signal from the AC voltage phase detector 201 based on the original signal of the chopping drive signal Sch for the semiconductor switch 104 output from the Iac compensation operator 210 to the PWM modulator 211.
  • Phase width in the chopping state (hereinafter referred to as “chopping operation phase width” or simply “chopping phase width”) ⁇ w ON is detected, and a signal indicating the chopping phase width ⁇ w ON is subtracted from the phase of the phase Output to 204.
  • the target phase width setting unit 203 subtracts a signal indicating a desired chopping phase width ⁇ w ON * according to a preset relationship from the actual current value Iac detected by the current detector 103 which is a current detection unit. Output to
  • FIG. 3A shows the desired chopping phase width ⁇ w ON * output from the target phase width setter 203 and the actual current value Iac detected by the current detector 103 input to the target phase width setter 203.
  • the desired chopping phase width ⁇ w ON * increases as the actual current value Iac increases.
  • the front and back are made flat, and between them is assumed to be connected by a smooth straight line, but as characteristics showing the relationship between the chopping phase width ⁇ w ON * and the current value Iac, it is shown in FIG. It is not limited to the following characteristics.
  • the horizontal axis is described as the actual current value Iac, but the input power calculated based on the current value Iac or the current detector 112 for detecting the current flowing to the load 4 Similar results can be obtained using the output and the output power of the rectifier circuit device obtained from the output of the DC voltage detector 110 which is the DC voltage detector.
  • the subtractor 204 is a so-called phase comparator, which subtracts the desired chopping phase width ⁇ w ON * from the actual chopping phase width ⁇ w ON to calculate the deviation of the phase width and phase the signal indicating the deviation It is output to the width compensation computing unit 205.
  • the phase width compensation computing unit 205 generates a command voltage Vdc * of the DC voltage to be output by the rectifier circuit device by performing a predetermined compensation operation to keep the phase width of the PWM drive state stable.
  • a signal indicating command voltage Vdc * is output to subtractor 206.
  • a signal indicating the actual output DC voltage Vdc detected by the DC voltage detector 110 which is a DC voltage detection unit is input to the subtractor 206.
  • the subtractor 206 subtracts the actual output DC voltage Vdc from the command voltage Vdc * of the DC voltage to calculate a voltage deviation, generates a signal indicating the voltage deviation, and outputs the signal to the Vdc compensation computing unit 207.
  • the Vdc compensation computing unit 207 multiplies the signal indicating the voltage deviation after the compensation operation by executing the compensation operation for the actual DC voltage Vdc to substantially coincide with the command voltage Vdc * and become stable.
  • the multiplier 208 multiplies the target current waveform from the target current waveform former 202 by the voltage deviation after the compensation operation, forms an instantaneous current command value Iac * which is the multiplication result, and outputs the current command value Iac * to the subtractor 209 Do.
  • the amplitude of the target current waveform is increased when the actual voltage Vdc is lower than the command voltage Vdc *, while the amplitude of the target current waveform is increased when the actual voltage Vdc is higher than the command voltage Vdc *.
  • the subtractor 209 subtracts the actual current value Iac detected by the current detector 103 from the instantaneous current command value Iac * to output a signal indicating a current deviation as a subtraction result to the Iac compensation computing unit 210.
  • the Iac compensation operation unit 210 performs a predetermined compensation operation so that the current input from the AC power supply 1 stably and promptly substantially matches the current command value Iac * , and the current deviation after the compensation operation is calculated.
  • the signal shown is output to the PWM modulator 211 and the chopping phase width detector 212.
  • the PWM modulator 211 generates a chopping drive signal Sch for turning on / off the semiconductor switch 104 by performing PWM modulation on the current deviation after the compensation operation indicated by the input signal, and outputs the chopping drive signal Sch to the semiconductor switch 104.
  • the chopping phase width detector 212 generates the AC voltage phase detector 201 based on the original signal of the chopping drive signal Sch for the semiconductor switch 104 output from the Iac compensation operation unit 210 to the PWM modulator 211.
  • the chopping phase width ⁇ w ON is detected on the basis of the phase of the AC voltage indicated by the signal from the signal D.2 and a signal indicating the chopping phase width ⁇ w ON is output to the subtractor 204. This constitutes a control loop of chopping phase width.
  • the amplitude of the target current is controlled to perform chopping drive control so that the DC voltage Vdc substantially matches the desired DC voltage Vdc * indicated by the phase width compensation computing unit 205. Furthermore, in the loop on the right side of the subtractor 209 in FIG. 2A (the loop from 209 to 210, 211, 104, and 103 to return to 209), the current Iac detected by the current detector 103 is the target current waveform The chopping drive is controlled so as to substantially match the target current Iac * generated based on the target current waveform formed by the former 202.
  • FIG. 4A is a diagram for explaining a control operation according to a first operation example of the control device in the embodiment 1, wherein (a) relationship between AC voltage and DC voltage after rectification; (b) It is a signal waveform diagram which shows the target current waveform which should be controlled, and (c) AC current after actually controlling.
  • FIG. 4B is a diagram for explaining the control operation according to the second operation example of the control device in the first embodiment, and (a) relationship between AC voltage and DC voltage after rectification; b) A signal waveform diagram showing a target current waveform to be controlled and (c) an AC current after actual control.
  • the DC voltage to be output is relatively low, and the chopping phase width (for example, the minimum phase width) ⁇ w ON for the semiconductor switch 104 is smaller than the desired phase width ⁇ w ON * It is the case.
  • the chopping phase width for example, the minimum phase width
  • ⁇ w ON for the semiconductor switch 104
  • the current flowing from the AC power supply 1 to the DC side via the reactor 102 and the diode bridge circuit 105 increases. Therefore, the waveform of the AC current is sharpened, and the harmonic component of the AC current is increased.
  • the output DC voltage is relatively high, and the chopping phase width (for example, maximum phase width) ⁇ w ON for the semiconductor switch 104 is larger than the desired phase width ⁇ w ON * This is the case.
  • the phase period in which the AC voltage is higher than the DC voltage decreases in comparison with the first operation example, the current flowing from the AC power supply 1 to the DC side via the reactor 102 and the diode bridge circuit 105 also decreases. , The harmonic component of the AC current is reduced.
  • the period during which the semiconductor switch 104 is chopping is increased as compared to the waveform in the first operation example of FIG. Resulting in.
  • the chopping phase width detector 212 may select the chopping phase width close to 0 degree or 180 degrees of the phase of the AC voltage as the control chopping phase width to perform the chopping control. Also, the chopping phase width detector 212 controls the phase width closer to the reference phase for determining the polarity of the AC current or the AC voltage instead of 0 degree or 180 degrees of the phase of the AC voltage. May be selected to perform the chopping control. Furthermore, the chopping phase width detector 212 may perform the chopping control by adding the plurality of obtained chopping phase widths and using the phase width of the addition result as the control chopping phase width.
  • the control device in the rectifier circuit device includes, together with the control circuit 100, a current detector 103 which is an alternating current detection unit, and a current detector 112 which is a direct current detection unit. It includes a DC voltage detector 110 which is a DC voltage detection unit, and a voltage level comparator 109.
  • control circuit 100 in the first embodiment is functionally divided into a waveform shaping unit, a first control unit, a second control unit, and a third control unit.
  • the first control unit controls the chopping operation of the semiconductor switch 104 so that the waveform of the detected alternating current Iac substantially becomes the target current waveform.
  • the first control unit is composed of a multiplier 208, a subtractor 209, an Iac compensation operation unit 210, and a PWM modulator 211.
  • the second control unit controls the amplitude of the target current waveform so that the detected DC voltage Vdc substantially becomes a predetermined target DC voltage Vdc * .
  • the second control unit is configured of a subtractor 206 and a Vdc compensation computing unit 207.
  • the third control unit sets a predetermined target such that the chopping operation phase width in which the semiconductor switch 104 is in the chopping operation state or the chopping pause phase width in which the semiconductor switch 104 is in the chopping pause state is substantially the predetermined phase width.
  • the DC voltage Vdc * is controlled.
  • the third control unit is configured of the target phase width setting unit 203, the subtractor 204, the phase width compensation computing unit 205, and the chopping phase width detector 212.
  • the target phase width setting unit 203 is configured to obtain a desired chopping phase width ⁇ w ON * according to a preset relationship from the actual current value Iac detected by the current detector 103. It is also possible to cope with other configurations. For example, the target phase width setting unit 203 sequentially stores the maximum current (instantaneous value) obtained by the current detector 103 within the period in which the polarity of the AC voltage is fixed, and the most among the preset number. A large current may be extracted and used as the phase width setting current Iacp, and may be used instead of the actual current Iac. Alternatively, in the target phase width setting unit 203, the average value using the maximum current (instantaneous value) stored in the preset number of times may be used as the phase width setting current Iacp and used instead of the actual current Iac. Good.
  • the target phase width setter 203 is calculated based on the input power calculated based on the actual current Iac, not the actual current Iac, or the DC voltage detector 110 and the current detector 112. Output power may be used.
  • an instruction signal may be given from the outside so that a desired chopping phase width ⁇ w ON * is switched by a rotation speed command to the motor.
  • an instruction signal (not shown) is externally provided so that the desired chopping phase width ⁇ w ON * is switched from the requirement of the entire system including the rectifier circuit device such as requiring a high power factor or a high DC voltage under a specific condition. It may be a method. In this method, the desired chopping phase width ⁇ w ON * may be 180 degrees to perform the entire area switching. Furthermore, a method combining these methods may be used.
  • the AC voltage phase detector 201 is used based on the original signal of the chopping drive signal Sch for the semiconductor switch 104 output from the Iac compensation operator 210 to the PWM modulator 211.
  • the chopping operation phase width .theta.w ON is detected based on the phase of the AC voltage indicated by the signal C.
  • FIG. 2B, FIG. 2C, FIG. 2D or FIG. The same effects can be obtained even with the configuration as shown.
  • a waveform shaper 111 to which a chopping drive signal Sch is input is provided, and a binary signal of a portion in which the waveform shaper 111 continuously switches the chopping drive signal Sch and a portion in which the switching is stopped. And outputs the binary signal to the chopping phase width detector 212.
  • the chopping phase width detector 212 extracts the chopping phase width from a portion corresponding to a portion in which switching of the binary signal is continuous based on the phase of the AC voltage indicated by the signal from the AC voltage phase detector 201 and extracts the chopping phase width.
  • the chopping phase width is set to the chopping operation phase width ⁇ w ON .
  • the configuration shown in FIG. 2B as described above also has the same effects as the configuration shown in FIG. 2A described above.
  • the chopping phase width detector 212 detects the chopping phase width during the period in which the polarity is fixed and the actual current value Iac output from the current detector 103 during the measurement period.
  • the chopping phase width at which the actual current value Iac is maximum may be extracted from a plurality of continuous measurement results in association with the maximum value, and the extracted chopping phase width may be set as the chopping operation phase width ⁇ w ON .
  • the reason why the maximum value of the actual current value Iac is linked and stored is that the chopping phase width is controlled focusing on the current waveform where the power supply harmonic level becomes the largest since the power supply harmonic level is proportional to the input current Thus, the power supply harmonics are controlled to the target level or less.
  • the reason why the chopping phase width detector 212 extracts from a plurality of continuous measurement results is that the measurement value of the chopping phase width once is different when the load 4 has a characteristic with pulsation.
  • the chopping phase width detector 212 detects the chopping phase width during the period in which the polarity is fixed and the DC voltage Vdc output from the DC voltage detector 110 during the measurement period.
  • the chopping phase width having the minimum DC voltage Vdc is extracted from a plurality of continuous measurement results in association with the minimum value, and the extracted chopping phase width is set as the chopping operation phase width ⁇ w ON .
  • the level of power supply harmonics is proportional to the input current. If this relationship is replaced with the DC voltage Vdc, the voltage drop of the DC voltage Vdc becomes large at the place where the load is the largest. Therefore, in the configuration shown in FIG. 2D, power harmonics are stored by being correlated with the minimum value of DC voltage Vdc, focusing on the current waveform where the power supply harmonic level is maximized, and chopping phase width control. It can be controlled below the target level.
  • the reason why extraction is performed from a plurality of continuous measurement results is that, in the case where the load 4 has a characteristic with pulsation, the measurement values of the chopping phase width once are different.
  • the chopping phase width detector 212 measures the number of pulses which is the output of the PWM modulator 211 during the period in which the polarity is fixed, and chopping period is measured
  • the chopping phase width may be calculated by multiplying the chopping phase width by the chopping operation phase width ⁇ w ON .
  • the power supply harmonic can be controlled to a target level or less by controlling the chopping phase width from the number of pulses actually driving the semiconductor switch.
  • the chopping phase width ⁇ w ON is detected and the DC voltage command Vdc * is adjusted using the phase width ⁇ w ON .
  • the phase width hereinafter referred to as “chopping pause phase width”
  • ⁇ w OFF in which chopping is in the pause state
  • the DC voltage command Vdc is detected using the chopping pause phase width ⁇ w OFF. Similar effects can be obtained by adjusting * .
  • the configurations of the rectifier circuit device and the control device of the second embodiment according to the present invention are substantially the same as the configurations of FIG. 1 and FIG. 2A described in the first embodiment,
  • the second embodiment will be described using the same reference numerals as the reference numerals in the first embodiment.
  • the relationship between the desired chopping phase width ⁇ w OFF * output from the target phase width setter 203 and the actual current value Iac detected by the current detector 103 input to the target phase width setter 203 is implemented. It is different from Form 1.
  • the figure shows an example of the relationship between the desired chopping phase width ⁇ w OFF * output from the target phase width setter 203 and the actual current value Iac detected by the current detector 103 input to the target phase width setter 203. Shown in 3B.
  • FIG. 3B shows the relationship between the desired chopping phase width ⁇ w OFF * output from the target phase width setter 203 and the actual current value Iac detected by the current detector 103 input to the target phase width setter 203.
  • An example is shown.
  • the characteristic shown in FIG. 3B is a characteristic in which the desired chopping phase width ⁇ w OFF * decreases as the actual current value Iac detected by the current detector 103 increases. With such characteristics, it is possible to give a characteristic that emphasizes reduction of the harmonic current at high input while emphasizing loss reduction since the magnitude of the harmonic current itself is small at low input. As a result, it is possible to provide characteristics aiming for loss reduction and suppression of harmonic current.
  • the horizontal axis is described as the actual current value Iac, but the input power calculated based on the current value Iac or the current detector 112 for detecting the current flowing to the load 4 Similar results are obtained using the output and the output power of the rectifier circuit device obtained from the output and the output of the DC voltage detector 110.
  • FIG. 5A is a diagram for explaining a control operation according to a third operation example of the control device in the rectifier circuit device of the second embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled, and (c) an AC current after actual control.
  • FIG. 5B is a diagram for explaining a control operation according to a fourth operation example of the control device in the rectifier circuit device of the second embodiment of the present invention, and (a) after the rectification with the AC voltage. It is a signal waveform diagram which shows the relationship with DC voltage, (b) target current waveform to be controlled, and (c) AC current after actual control.
  • the output DC voltage is relatively low, and the chopping pause phase width (for example, maximum phase width) ⁇ w OFF in which the semiconductor switch 104 is not chopping operated is large.
  • the chopping pause phase width for example, minimum phase width
  • ⁇ w OFF in which the output DC voltage is higher than in the third operation example and the semiconductor switch 104 is not chopping This is a case where the size is smaller than that of the third operation example. Since the chopping pause phase width ⁇ w OFF is complementary to the chopping operation phase width ⁇ w ON , the same function and effect can be obtained.
  • a section in which chopping is performed may appear a plurality of times during a half cycle of the AC voltage.
  • the chopping phase width detector 212 selects the chopping pause phase width ⁇ w OFF of the off period close to 90 degrees of the phase of the AC voltage as the chopping phase width for control and performs the chopping control. Good.
  • the chopping phase width detector 212 may perform the chopping control by adding the plurality of chopping pause phase widths obtained above and using the phase width of the addition result as the control chopping phase width.
  • FIGS. 5A and 5B show waveforms of only half cycles of the AC voltage, as is apparent from FIGS. 4A and 4B and the prior art, the remaining half cycles also have absolute values.
  • the waveform is the same as (instantaneous absolute value), and thus omitted.
  • the desired phase width setting unit 203 obtains the desired chopping pause phase width ⁇ w OFF * from the actual current value Iac detected by the current detector 103 according to a preset relationship.
  • the target phase width setting unit 203 sequentially stores the maximum current obtained by the current detector 103 within the period in which the polarity of the AC voltage is fixed, and extracts the largest current from the preset number of times.
  • the phase width setting current Iacp may be used instead of the actual current Iac.
  • the target phase width setting unit 203 may use an average value using the stored maximum current as the phase width setting current Iacp instead of the actual current Iac.
  • the target phase width setter 203 is calculated based on the input power calculated based on the actual current Iac, not the actual current Iac, or the DC voltage detector 110 and the current detector 112. Output power may be used.
  • an instruction signal may be given from the outside so that the desired chopping pause phase width ⁇ w OFF * is switched by a rotation speed command to the motor.
  • an instruction signal (not shown) is externally supplied so that the desired chopping pause phase width ⁇ w OFF * is switched from the requirement of the entire system including a rectifier circuit device such as a high power factor or a high DC voltage desired in a specific condition. It may be a method of giving. In this case, the desired chopping pause phase width ⁇ w OFF * may be set to 0 degrees to perform the entire region switching. Furthermore, a combined method of these methods may be used.
  • the AC voltage phase detector 201 is used based on the original signal of the chopping drive signal Sch for the semiconductor switch 104 output from the Iac compensation operation unit 210 to the PWM modulator 211.
  • the chopping pause phase width ⁇ w OFF is detected on the basis of the phase of the AC voltage indicated by the signal of FIG. 2B, but the present invention is described with reference to FIGS. 2B, 2C, and 2 described in the first embodiment, for example. The same function and effect can be obtained with the configuration as shown in 2D or FIG. 2E.
  • a waveform shaper 111 to which the chopping drive signal Sch is input is provided, and a portion where the waveform shaper 111 continuously switches the chopping drive signal Sch and a portion where the switching stops
  • the binary signal is formed into a binary signal, and the binary signal is output to the chopping phase width detector 212.
  • the chopping phase width detector 212 extracts the chopping pause phase width from a portion corresponding to a portion where switching of the binary signal is paused based on the phase of the AC voltage indicated by the signal from the AC voltage phase detector 201,
  • the extracted chopping pause phase width may be set as the chopping pause phase width ⁇ w OFF .
  • the rectifier circuit device of the second embodiment has the configuration shown in FIG. 2B, it has the same function and effect as the configuration shown in FIG. 2A described above.
  • the chopping phase width detector 212 is outputted from the current detector 103 during the chopping pause phase width during the period in which the polarity is fixed and during the measurement period.
  • Chopping pause phase width in which the actual current value Iac is maximum is extracted from the continuous plural measurement results in association with the maximum value (instantaneous value) of the actual current value Iac.
  • the width may be a chopping pause phase width ⁇ w OFF .
  • the maximum value (instantaneous value) of the actual current value Iac is linked and stored for use because the power supply harmonic level is proportional to the input current, and focusing on the current waveform where the power supply harmonic level becomes the largest, the chopping phase width To control the power supply harmonics below the target level.
  • the reason why the chopping phase width detector 212 extracts from a plurality of continuous measurement results is that the measurement value of the chopping phase width once is different when the load 4 has a characteristic with pulsation.
  • the chopping phase width detector 212 is outputted from the DC voltage detector 110 during the chopping pause phase width during the period in which the polarity is fixed and the measurement period.
  • Chopping pause phase width with the minimum DC voltage Vdc is extracted from a plurality of continuous measurement results in association with the minimum value of the DC voltage Vdc, and the extracted chopping pause phase width is the chopping pause phase width ⁇ w OFF And
  • the level of power supply harmonics is proportional to the input current. If this relationship is replaced with the DC voltage Vdc, the voltage drop of the DC voltage Vdc becomes large at the place where the load is the largest. Therefore, in the configuration shown in FIG. 2D, the power harmonics are targeted by storing them in association with the minimum value of DC voltage Vdc, focusing on the current waveform where the power harmonics level becomes the largest, and controlling the chopping phase width. It can be controlled below the level.
  • the reason why extraction is performed from a plurality of continuous measurement results is that, in the case where the load 4 has a characteristic with pulsation, the measurement values of the chopping phase width once are different.
  • the rectifier circuit device according to the second embodiment has the configuration shown in FIGS. 2B to 2D, even if the load 4 has a characteristic with pulsation, it is excellent as in the configuration shown in FIG. 2A. It has an effect.
  • the rectifier circuit device of the third embodiment according to the present invention is a simplification of the control method of the rectifier circuit device of the first embodiment described above.
  • Chopping phase width detector 212 in the rectifier circuit device according to the third embodiment is a section (positive value) in which the polarity (sign) of AC voltage does not change and is fixed from 0 degrees or 180 degrees until chopping is stopped.
  • the phase width ⁇ 1w ON (chopping phase width) of the first half in the section or negative section) is detected, and the chopping control is performed using the phase width ⁇ 1w ON .
  • the configurations of the rectifier circuit device and the control device of the third embodiment according to the present invention are substantially the same as the configurations of FIG. 1 and FIG. 2A described in the first embodiment,
  • the third embodiment will be described using the same reference numerals as in the first embodiment.
  • FIG. 6A is a diagram for explaining the control operation according to the fifth operation example of the control device in the rectifier circuit device of the embodiment 3 of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled, and (c) an AC current after actual control.
  • FIG. 6B is a diagram for explaining the control operation according to the sixth operation example of the control device in the rectifier circuit device of the third embodiment of the present invention, and (a) after rectification with AC voltage; It is a signal waveform diagram which shows the relationship with DC voltage, (b) target current waveform to be controlled, and (c) AC current after actual control.
  • the output DC voltage is relatively low, and the phase width ⁇ 1w ON at which the semiconductor switch 104 is chopped is relatively small.
  • the output DC voltage is higher than that in the fifth operation example, and the phase width ⁇ 1w ON at which the semiconductor switch 104 is chopped is higher than that in the fifth operation example. It is the case of getting bigger.
  • the phase width ⁇ 1w ON where chopping of the first half is performed in the half cycle period of the AC voltage in the operation example shown in FIGS. 6A and 6B corresponds to FIG. 4A and FIG. Since there is a tendency similar to the tendency shown in, it is possible to obtain the same effect as that of the first embodiment.
  • Embodiment 4 a rectifier circuit device of a fourth embodiment according to the present invention and a control device in the rectifier circuit device will be described.
  • the rectifier circuit device of the fourth embodiment according to the present invention is a simplification of the control method in the rectifier circuit device of the first embodiment, similarly to the rectifier circuit device of the third embodiment described above.
  • the chopping phase width detector 212 in the rectifier circuit device according to the fourth embodiment is a section (positive value) in which the polarity (sign) of the AC voltage does not change and is fixed from 0 degrees or 180 degrees until chopping stops.
  • the chopping control is performed by detecting the second half phase width ⁇ 2w ON in the section or the negative section).
  • the configuration of the rectifier circuit device and the control device of the fourth embodiment according to the present invention is substantially the same as the configuration of FIG. 1 and FIG. 2A described in the first embodiment,
  • the fourth embodiment will be described using the same reference numerals as the reference numerals in the first embodiment.
  • FIG. 7A is a diagram for explaining a control operation according to a seventh operation example of the control device in the rectifier circuit device of the fourth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled, and (c) an AC current after actual control.
  • FIG. 7B is a view for explaining the control operation according to the eighth operation example of the control device in the rectifier circuit device of the fourth embodiment of the present invention, and (a) after rectification with AC voltage; It is a signal waveform diagram which shows the relationship with DC voltage, (b) target current waveform to be controlled, and (c) AC current after actual control.
  • the output DC voltage is relatively low, and the phase width ⁇ 2w ON (chopping phase width) at which the semiconductor switch 104 is chopping is relatively small.
  • the output DC voltage is higher than that in the seventh operation example, and the phase width ⁇ 2w ON at which the semiconductor switch 104 is chopped is higher than that in the seventh operation example. It is the case of getting bigger.
  • the phase width ⁇ 2w ON in which chopping in the second half is performed in the half cycle section of the AC power supply 1 in the operation example shown in FIGS. 7A and 7B corresponds to FIG. Since there is a tendency similar to the tendency shown in 4B, the same function and effect as those of Embodiment 1 can be obtained.
  • Rectifier circuit device of Embodiment 5 the chopping phase width Shitadaburyu1 ON in the rectifier circuit device of the third embodiment described above, the sum of the chopping phase width Shitadaburyu2 ON in the rectifier circuit of the fourth embodiment
  • the phase width ( ⁇ w1 ON + ⁇ w2 ON ) is detected by the chopping phase width detector 212, and the DC voltage is controlled so that the total phase width ( ⁇ w1 ON + ⁇ w2 ON ) becomes a desired phase width.
  • FIG. 8A is a diagram for explaining the control operation according to the ninth operation example of the control device in the rectifier circuit device of the fifth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification;
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled, and (c) an AC current after actual control.
  • FIG. 8B is a diagram for explaining a control operation according to a tenth operation example of the control device in the rectifier circuit device of the fifth embodiment of the present invention, and (a) after the rectification with the AC voltage; It is a signal waveform diagram which shows the relationship with DC voltage, (b) target current waveform to be controlled, and (c) AC current after actual control.
  • a ninth operation example in FIG. 8A DC voltage output is relatively low, the chopping phase width Shita1w ON of the first half of the semiconductor switch 104 is chopped, and the second half of the chopping phase width Shita2w ON is relatively small That's the case.
  • the output DC voltage is high compared to the ninth operation example, and the first half chopping phase width ⁇ 1w ON where the semiconductor switch 104 is chopping, and the second half chopping phase width In this case, ⁇ 2w ON is larger than that in the ninth operation example.
  • the rectifier circuit device of the fifth embodiment the half cycle of the period of the AC power supply 1 in the operation example shown in FIGS. 8A and 8B, the first half of the chopping phase width Shita1w ON, and the second half of the chopping phase width Shita2w ON is above Since there is a tendency similar to the tendency shown in FIGS. 4A and 4B, the same function and effect as those of Embodiment 1 to Embodiment 4 can be obtained.
  • FIG. 9A is a diagram for explaining a control operation according to an eleventh operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled, and (c) an AC current after actual control.
  • FIG. 9B is a diagram for explaining the control operation according to a twelfth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) after rectification with AC voltage; It is a signal waveform diagram which shows the relationship with DC voltage, (b) target current waveform to be controlled, and (c) AC current after actual control.
  • the control device in the rectifier circuit device of the sixth embodiment is characterized in that the circuit loss can be further reduced by setting the target current waveform to a waveform other than a sine wave, for example, a triangular wave.
  • a waveform other than a sine wave for example, a triangular wave.
  • the eleventh operation example of FIG. 9A is a case where the output DC voltage is relatively low, and the phase width ⁇ w ON at which the semiconductor switch 104 is chopped is smaller than the desired phase width ⁇ w ON * . Also at this time, since the phase period in which the AC voltage is higher than the DC voltage increases, the current flowing from the AC power supply 1 to the DC side via the reactor 102 and the diode bridge circuit 105 increases. Therefore, the waveform of the AC current is sharpened, and the harmonic component of the AC current is increased.
  • the output DC voltage is higher than in the eleventh operation example, and the phase width ⁇ w ON at which the semiconductor switch 104 is chopped is higher than the desired phase width ⁇ w ON * It is the case of getting bigger.
  • the phase period in which the AC voltage is higher than the DC voltage decreases, the AC current flowing from the AC power supply 1 to the DC side via the reactor 102 and the diode bridge circuit 105 decreases, and harmonic components of the AC current Decrease.
  • a period (phase width) in which the chopping of the semiconductor switch 104 is performed as compared with the waveform of the eleventh operation example of FIG. The loss of the circuit will increase because
  • the absolute value of the instantaneous value of the target current waveform is 0 degrees (start point) to 180 degrees (end point) of the AC voltage with the passage of time.
  • start point start point
  • end point 180 degrees
  • the absolute value of the instantaneous value of the target current waveform is 0 degrees (start point) to 180 degrees (end point) of the AC voltage with the passage of time.
  • chopping control may be performed based on the phase width of any of the two chopping pause phase widths, or the total phase width.
  • the chopping phase width ⁇ w ON is subtracted from the half cycle of the AC voltage to obtain the chopping pause phase width ⁇ w OFF .
  • control may be performed based on the obtained chopping pause phase width ⁇ w OFF by directly obtaining the chopping pause phase width ⁇ w OFF .
  • Modification of Embodiment 6 Modification of Embodiment 6
  • modifications of the rectifier circuit device and the control device according to the sixth embodiment of the present invention will be described with reference to FIGS. 10A to 10D.
  • the modification of the sixth embodiment according to the present invention has another shape different from the target current waveform shown in FIGS. 9A and 9B.
  • FIG. 10A is a diagram for illustrating a control operation according to a thirteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) AC voltage and DC voltage after rectification
  • FIG. 7 is a signal waveform diagram showing the relationship of (b) a target current waveform to be controlled, and (c) an AC current after actual control.
  • FIG. 10B is a diagram for explaining the control operation according to the fourteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, It is a signal waveform diagram which shows the relationship with DC voltage, (b) target current waveform to be controlled, and (c) AC current after actual control. Furthermore, FIG.
  • FIG. 10C is a diagram for explaining a control operation according to a fifteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) after rectification with AC voltage. It is a signal waveform diagram which shows the relationship with DC voltage, (b) target current waveform to be controlled, and (c) AC current after actual control.
  • FIG. 10D is a diagram for explaining a control operation according to a sixteenth operation example of the control device in the rectifier circuit device of the sixth embodiment of the present invention, and (a) after the rectification with the AC voltage. It is a signal waveform diagram which shows the relationship with DC voltage, (b) target current waveform to be controlled, and (c) AC current after actual control.
  • the target current waveform in the thirteenth operation example of FIG. 10A is a predetermined value exceeding 90 degrees in the latter half, instead of a monotonically decreasing section with time. It is a triangular waveform configured to have a section (zero and constant section) which is instantaneously zeroed at the midpoint Tm of the phase (for example, 110 degrees).
  • the target current waveform in the fourteenth operation example of FIG. 10B is sinusoidally increased in a monotonously increasing section with time as compared with the target current waveform in the thirteenth operation example of FIG.
  • the waveform has a section (zero and constant section) which is instantaneously zero at a midpoint Tm of a predetermined phase (for example, 110 degrees) exceeding 90 degrees.
  • the target current waveform in the fifteenth operation example of FIG. 10C provides a constraint condition in the target current waveform in the fourteenth operation example of FIG. 10B, and the midpoint Tm before 90 degrees in the first half sine wave waveform.
  • the waveform is instantaneously zeroed at a phase of (for example, 70 degrees).
  • the target current waveform in the sixteenth operation example of FIG. 10D is zero (zero) for a predetermined period from 0 degrees to the first midpoint Tm1 over time in the target current waveform in the fifteenth operation example of FIG. And a constant interval), and thereafter, it is a waveform configured to monotonously increase up to the second midpoint Tm2.
  • the target current is set to zero before 90 degrees, but the chopping operation of the semiconductor switch 104 is before chopping operation before the phase to be zeroed. You can use it with a heavy load.
  • the DC voltage is lower than the maximum instantaneous voltage of the AC voltage, current flows from the AC power supply 1 via the reactor 102 and the diode bridge circuit 105 in the vicinity of 90 degrees. Therefore, even if the target current is zero, the AC current continues to flow for a while, and a current with few harmonic components can be realized with high efficiency.
  • the monotonous increase or decrease of the target current waveform may include a fixed period, that is, it may be substantially monotonically increased or substantially monotonically decreased.
  • substantially monotonically increasing refers to a monotonous increase in a broad sense having a relationship of f ( ⁇ 1) ⁇ f ( ⁇ 2) when the phase ⁇ 1 ⁇ 2 of the target current waveform. Over time, substantially monotonically increasing so as to at least increase or at least increase and be constant over a period.
  • substantially monotonically decreasing refers to a monotonous decrease in a broad sense in which f ( ⁇ 1) ⁇ f ( ⁇ 2) when the phase ⁇ 1 ⁇ 2 of the target current waveform. And substantially monotonically decreasing so as to at least decrease or at least decrease and be constant over a period of time.
  • FIG. 11 is a circuit diagram showing a configuration of a rectifier circuit device according to a seventh embodiment of the present invention.
  • the AC voltage from AC power supply 1 is rectified by a bridge circuit constituted of semiconductor switches 604a and 604b and diodes 605a, 605b, 605c and 605d via reactor 602,
  • the load 4 is driven via the smoothing capacitor 106.
  • the chopping control method in the rectifier circuit device of the seventh embodiment is the same as that of the control device in the rectifier circuit device of the first embodiment shown in FIG. 1 described above, and chopping drive signals for two semiconductor switches 604a and 604b. It drives simultaneously using Sch.
  • the chopping drive signal Sch in the rectifier circuit device of the seventh embodiment can be formed with the same configuration as that described with reference to FIGS. 2A to 2E in the first embodiment. Also in the rectifier circuit device of the seventh embodiment, similar effects can be obtained by performing the chopping control described in each of the above-described embodiments.
  • FIG. 12 is a circuit diagram showing a configuration of a rectifier circuit device according to an eighth embodiment of the present invention.
  • the rectifier circuit device according to the eighth embodiment rectifies AC voltage from AC power supply 1 with a bridge circuit configured of semiconductor switches 704a and 704b and diodes 705a, 705b, 705c and 705d via reactor 702. , Drive the load 4 via the smoothing capacitor 106.
  • the chopping control method in the rectifier circuit device of the eighth embodiment only one of the semiconductor switches 704a or 704b is selected using two chopping drive signals Sch1 and Sch2 according to the polarity of the AC voltage from AC power supply 1. It is what makes chopping work. For example, if the period in which the polarity of the AC voltage is connected to the reactor 702 is high, the chopping drive signal Sch2 is used to chopping the semiconductor switch 704b and the polarity of the AC voltage is connected to the reactor 702 is low If it is a period, the chopping drive signal Sch1 is used to chopping the semiconductor switch 704a.
  • the rectifier circuit device when the semiconductor switches 704 a and 704 b are simultaneously turned on, the DC output voltage to the load 4 is short-circuited. It may be necessary to set so that neither switch 704a nor 704b will be in an ON state.
  • the phase in which the chopping operation changes to the pause state can occur even near 0 degrees and 180 degrees.
  • the chopping operation is intentionally stopped to prevent a short circuit of the DC output voltage, so in the rectifier circuit device according to the eighth embodiment of the present invention, the chopping operation is performed near 0 degrees and 180 degrees. This can be easily realized by not handling the phase changed to the resting state.
  • the chopping drive signals Sch1 and Sch2 in the rectifier circuit device of the eighth embodiment can be formed with the same configuration as that described with reference to FIGS. 2A to 2E in the first embodiment described above. Also in the rectifier circuit device of the eighth embodiment, the same operation and effect can be achieved by performing the chopping control described in each of the above-described embodiments for each semiconductor switch.
  • FIG. 13 is a circuit diagram showing a configuration of a rectifier circuit device according to a ninth embodiment of the present invention.
  • the rectifier circuit device according to the ninth embodiment when the semiconductor switch 104 is on via the rectifier bridge 105 and the reactor 102 at both output terminals of the AC power supply 1, the reactor 102 is charged with current, and the semiconductor switch 104 is off. When it becomes, the smoothing capacitor 106 and the load 4 are driven by the diode 304.
  • the chopping drive signal Sch in the rectifier circuit device of the ninth embodiment can be formed with the same configuration as the configuration described using FIG. 2A to FIG. 2E in the first embodiment described above. Also in the rectifier circuit device of the ninth embodiment, similar effects can be obtained by performing the chopping control described in each of the above-described embodiments for each semiconductor switch.
  • FIG. 14A is a waveform diagram for describing a first operation example of the binarization processing of the voltage level comparator 109 in the rectifier circuit device according to the first to ninth embodiments of the present invention.
  • the waveform diagram of FIG. 14A shows (a) the relationship between the AC voltage and the threshold voltage Vth and (b) the binary signal from the voltage level comparator 109.
  • FIG. 14B is a waveform diagram for describing a second operation example of the binarization processing of the voltage level comparator 109 in the rectifier circuit device according to the first to ninth embodiments of the present invention.
  • the waveform chart of FIG. 14B shows (a) the relationship between the AC voltage and the threshold voltage Vth and (b) the binary signal from the voltage level comparator 109.
  • FIGS. 14A and 14B show a method of detecting a voltage phase from information on whether the AC voltage is equal to or higher than a certain level. This information is used to obtain, as a binary signal, whether the instantaneous voltage of the AC voltage exceeds a threshold. That is, the voltage level comparator 109 compares the AC voltage with the threshold voltage Vth, and outputs a high level signal when the AC voltage is higher than the threshold voltage Vth, while the AC voltage is lower than the threshold voltage Vth. When low level signal is output.
  • the cycle of the binary signal is the same as the power supply frequency, and if the middle point of the high level side or the low level side of the binary signal is determined, the AC voltage phase is 90 degrees. Or you can know the time of 270 degrees. Also, the midpoint of the AC voltage phase of 90 degrees and 270 degrees is 180 degrees and 0 degrees of phase. If the information obtained in this manner is multiplied using a PLL or the like, it is possible to accurately know the instantaneous phase.
  • the phase width during chopping operation becomes a desired phase width.
  • the same current waveform is obtained, and it is possible to realize the rectification operation with less circuit loss and less harmonic current.
  • FIG. 15 is a block diagram showing a detailed configuration of the control circuit 100 in the rectifier circuit device of the tenth embodiment according to the present invention.
  • the control circuit 100 in the rectifier circuit device of the tenth embodiment is between the DC voltage detector 110 and the subtractor 206 in comparison with the control circuit 100 in the rectifier circuit device of the first embodiment shown in FIG. 2A described above.
  • an AD converter 230 which is an AD conversion unit
  • a low pass filter operation unit (hereinafter referred to as “LPF operation unit”) 231 which is an operation unit.
  • the rectifier circuit device of the tenth embodiment provides an embodiment that is particularly effective when implemented by digital operation.
  • differences from the control circuit 100 shown in FIG. 2A will be described.
  • an analog signal indicating the DC voltage Vdc detected by the DC voltage detector 110 indicates an AD conversion value Vad by the AD converter 230 that AD converts at a sampling frequency sufficiently higher than the frequency of the AC power supply 1. It is converted to a digital signal.
  • the AD conversion value Vad from the AD converter 230 is input to the LPF computing unit 231 that performs computation (details will be described later) having low-pass filter characteristics, and is subjected to LPF computation.
  • a signal (LPF calculation value Vdca) indicating the calculation result in the LPF calculator 231 is output to the subtractor 206.
  • the frequency of the AC power supply 1 is 60 Hz
  • the sampling frequency is 600 kHz.
  • FIG. 16 is a block diagram showing a detailed configuration of the LPF computing unit 231 in the control circuit 100 shown in FIG.
  • the signal indicating the AD conversion value Vad from the AD converter 230 is input to the adder 253 in the LPF computing unit 231.
  • the adder 253 adds the signal indicating the AD conversion value Vad to be input and the signal from the constant multiplier 251, and outputs a signal indicating the LPF operation value Vdca which is the addition result to the subtractor 206.
  • the signal is output to the constant multiplier 251 via the delay unit 252 delayed by one clock time.
  • the constant multiplier 251 multiplies the input signal by a predetermined constant (2 n -1) / (2 n ), and outputs a signal indicating the multiplication result to the adder 253.
  • This LPF calculation processing is a linear low-pass filter having a time constant of “2 n ” times the calculation cycle, and the amplitude is “2 n ” times. Therefore, by executing this LPF calculation process, n bits of information after the decimal point are added to the AD conversion value Vad.
  • FIG. 17 is a signal waveform diagram representing an operation of control circuit 100 in the rectifier circuit device shown in FIG.
  • (b) DC voltage Vdc, and (c) AD conversion value Vad of AD converter 230 are shown.
  • the DC voltage Vdc is indicated by a dotted line. That is, FIG. 17 shows an operation principle capable of improving voltage detection accuracy by performing low-pass filter processing with a single-phase AC rectifier circuit.
  • FIG. 17 shows a DC voltage Vdc indicated by a dotted line and an AD conversion value Vad when the DC voltage Vdc is AD converted at a sampling frequency sufficiently higher than the frequency of the AC power supply 1.
  • a sufficiently high sampling frequency means a frequency twice or more that of the AC power supply 1.
  • the obtained AD conversion value Vad takes values of K, K + 1, K + 2, K + 3,.
  • the low-pass filter calculation is performed on the AD conversion value Vad, in the case of FIG. 17, the value converges to a value between (K + 1) and (K + 2). Furthermore, as shown in FIG.
  • command voltage Vdc * also needs to have the same resolution as that of the AD converter 230. Since command voltage Vdc * is only information, it is possible to easily realize an increase in resolution as in the above-described tenth embodiment.
  • the LPF operation has been described as an example using a power of 2, if the constant of the constant multiplier 251 is set to a value between 0 and 1, the LPF operation can be realized similarly. Further, as is clear from the operation principle of FIG. 17, similar effects can be obtained by methods other than the configuration shown in FIG.
  • the method for improving the voltage detection accuracy in the rectifier circuit device of the tenth embodiment can be implemented in combination with the first to ninth embodiments described above.
  • the term “substantially” is used to mean approximately or on average.
  • the DC voltage is adjusted to a relatively appropriate value.
  • the same current waveform can be obtained, and the desired phase width can be changed in accordance with the load condition or an external command.
  • circuit loss is always reduced and harmonic current is constantly measured by accurately measuring the chopping operation phase width or chopping pause phase width to be compared with the desired phase width regardless of the load fluctuation state. Can realize a rectification operation with less
  • the DC voltage is converted into a digital signal by the A / D conversion unit and detected at a sampling frequency sufficiently higher than the frequency of the AC power supply, and the obtained digital signal is subjected to LPF calculation for each cycle. Then, it is added to the digital signal so as to interpolate minute information below the resolution. Furthermore, in the present invention, a digital signal obtained by interpolating minute information is used as DC voltage information, and the digital signal obtained by interpolating the minute information is adjusted so that the phase width actually being chopping becomes a desired value. .
  • the power supply frequency component contained in the smoothed voltage of the DC voltage has fluctuations, and even if the resolution of the digital information is coarse, the digital signals are dispersed by the fluctuations. It is possible to obtain a digital signal equivalent to By this, in the present invention, even if coarse resolution AD conversion means are used, the average value of DC voltage can be adjusted with high accuracy, and a rectification operation with less loss and less harmonic current is always realized. can do. Therefore, the rectifier circuit device according to the present invention can realize the rectification operation with less loss and less harmonic current by changing the desired phase width according to the state of the connected load.
  • the configuration of the rectifier circuit device and the control circuit of the present invention can be easily realized by not treating the chopping in the present invention as a phase changed to the inactive state.
  • the AC voltage phase detector 201 detects the phase of the AC voltage, and the chopping phase width is detected based on the detected phase. It is not limited to such a configuration.
  • the chopping phase width may be detected based on information such as the zero cross of the AC power supply.
  • the time of the chopping phase width may be measured by counting by the number of pulses of the carrier signal for realizing the PWM control which is an example of the chopping method.
  • the rectifier circuit device can achieve both suppression of harmonic current and reduction of circuit loss. Therefore, a heat pump is configured by compressing a refrigerant with a compressor, and cooling, heating, food, etc. It can be widely applied to various applications such as those that perform refrigeration.
  • Reference Signs List 1 AC power supply 4 load 100 control circuit 102, 602, 702 reactor 103, 112 current detector 104, 604a, 604b, 704a, 704b semiconductor switch 105 diode bridge circuit 106 smoothing capacitor 109 voltage level comparator 110 DC voltage detector 111 waveform Shaper 201 AC voltage phase detector 202 Target current waveform shaper 203 Target phase width setter 204, 206, 209 Subtractor 205 Phase width compensation computing unit 207 Vdc compensation computing unit 208 Multiplier 210 Iac compensation computing unit 211 PWM modulator 212 Chopping phase width detector 230 AD converter 231 low pass filter calculator (LPF calculator) 251 constant multiplier 252 delay device 253 adder 605a to 605d, 705a to 705d diode

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Abstract

Un dispositif de circuit redresseur selon la présente invention comprend un dispositif de commande qui est conçu de manière : à contrôler le découpage d'un commutateur à semi-conducteur (104) de sorte que la forme d'onde d'un courant détecté soit égale à une forme d'onde de courant cible; à contrôler l'amplitude de la forme d'onde de courant cible de sorte qu'une tension de courant continu détectée soit égale à une tension de courant continu cible prédéterminée; et à contrôler la tension de courant continu cible de sorte qu'une largeur de phase d'opération de découpage qui correspond à un état dans lequel l'opération de découpage est effectuée par le commutateur à semi-conducteur (104) ou qu'une largeur de phase d'arrêt de découpage qui correspond à un état dans lequel le découpage effectué par le commutateur à semi-conducteur (104) est arrêté soit égale à une largeur de phase prédéterminée qui est définie conformément à des conditions de charge et à une commande provenant de l'extérieur.
PCT/JP2013/004091 2012-08-30 2013-07-02 Dispositif de commande destiné à un dispositif de circuit redresseur, et dispositif de circuit redresseur WO2014034003A1 (fr)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016010283A (ja) * 2014-06-26 2016-01-18 パナソニックＩｐマネジメント株式会社 整流回路装置及び整流回路装置のための制御回路
JP2016154434A (ja) * 2015-02-18 2016-08-25 パナソニックＩｐマネジメント株式会社 モータ駆動装置

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JP6906148B2 (ja) * 2019-01-11 2021-07-21 パナソニックＩｐマネジメント株式会社 整流回路装置
JP6890237B2 (ja) * 2019-04-05 2021-06-18 パナソニックＩｐマネジメント株式会社 整流回路装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008141901A (ja) * 2006-12-05 2008-06-19 Matsushita Electric Ind Co Ltd 直流電源装置
WO2012004927A1 (fr) * 2010-07-08 2012-01-12 パナソニック株式会社 Dispositif à circuit redresseur

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013021882A (ja) * 2011-07-14 2013-01-31 Panasonic Corp 直流電源装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008141901A (ja) * 2006-12-05 2008-06-19 Matsushita Electric Ind Co Ltd 直流電源装置
WO2012004927A1 (fr) * 2010-07-08 2012-01-12 パナソニック株式会社 Dispositif à circuit redresseur

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016010283A (ja) * 2014-06-26 2016-01-18 パナソニックＩｐマネジメント株式会社 整流回路装置及び整流回路装置のための制御回路
JP2016154434A (ja) * 2015-02-18 2016-08-25 パナソニックＩｐマネジメント株式会社 モータ駆動装置

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