WO2011024582A1 - 積層セラミックコンデンサの製造方法および積層セラミックコンデンサ - Google Patents
積層セラミックコンデンサの製造方法および積層セラミックコンデンサ Download PDFInfo
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- WO2011024582A1 WO2011024582A1 PCT/JP2010/062213 JP2010062213W WO2011024582A1 WO 2011024582 A1 WO2011024582 A1 WO 2011024582A1 JP 2010062213 W JP2010062213 W JP 2010062213W WO 2011024582 A1 WO2011024582 A1 WO 2011024582A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/10—Metal-oxide dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
- H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
- H01G4/1218—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates
- H01G4/1227—Ceramic dielectrics characterised by the ceramic dielectric material based on titanium oxides or titanates based on alkaline earth titanates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
Definitions
- the present invention relates to a method for manufacturing a multilayer ceramic capacitor and a multilayer ceramic capacitor, and more particularly, an improvement in a method for manufacturing a multilayer ceramic capacitor, and a BaTiO 3 dielectric used in a multilayer ceramic capacitor suitable for the improved manufacturing method. It relates to improvements in the composition of ceramics.
- the rate of temperature increase in the firing step is set to 500 ° C./hour to 5000 ° C./hour, so that electrode breakage is suppressed and the electrode thickness is set to 0.8 to 1 ⁇ m. Realized.
- the temperature rise rate is 700 ° C. to 1100 ° C. in the temperature raising process during firing, the temperature rising rate is 500 ° C./hour or higher, and the oxygen partial pressure in the atmosphere is 1100 ° C. or higher. and 10 -8 atm or less, by the oxygen partial pressure and 10 -8 atm or more at 1100 ° C. the following part of the cooling process, to suppress structural defects such as cracks, the reliability of the obtained multilayer ceramic capacitor I try to increase it.
- Patent Document 3 Korean Patent Laid-Open No. 10-2006-0135249 (Patent Document 3), by raising the temperature at a rate of temperature increase of 10 ° C./second to a temperature 20 ° C. lower than the maximum temperature, suppression of electrode breakage and overshoot during temperature increase ( The temperature is further higher than the desired firing temperature at the time of temperature rise).
- An atmosphere for firing a raw laminate including an internal electrode using a base metal as a conductive component is, for example, an N 2 / H 2 / H 2 O system, which is closer to the reduction side than Ni / NiO equilibrium oxygen partial pressure. This needs to be controlled, which is a constraint on equipment and material design.
- the ceramic contains a volatile component such as Li
- this volatile component is likely to be scattered during firing.
- the residual amount of the volatile component tends to vary depending on the size of the raw laminate to be fired, that is, the chip size and the amount of charge to the firing furnace, but it is difficult to suppress this variation in the residual amount.
- the monolithic ceramic capacitor is becoming smaller (thinner) and larger in capacity, and the thickness of the dielectric ceramic layer is becoming 0.5 ⁇ m or less.
- the dielectric ceramic layer is becoming 0.5 ⁇ m or less.
- the dielectric ceramic raw material powder is atomized to a level of several nanometers, for example, it tends to grow during firing, and as a result, the life characteristics of the multilayer ceramic capacitor under high temperature load conditions may be inferior. .
- JP 2008-226941 A JP 2000-216042 A Republic of Korea Open Patent Gazette 10-2006-0135249
- an object of the present invention is to provide a method for manufacturing a multilayer ceramic capacitor and a multilayer ceramic capacitor that can solve the above-described problems.
- the present invention provides a process for producing a raw laminate comprising a plurality of dielectric ceramic layers containing dielectric ceramic raw material powder and laminated, and internal electrodes formed along specific interfaces between the dielectric ceramic layers.
- the present invention is first directed to a method for manufacturing a multilayer ceramic capacitor comprising a firing step for heat-treating the raw laminate to sinter the raw laminate. It is characterized by having the following configuration.
- a temperature profile in which the average rate of temperature increase from room temperature to the maximum temperature is 40 ° C./second or more is employed in the firing step.
- the following configuration is adopted.
- the dielectric ceramic raw material powder is ABO 3 (A necessarily contains Ba and may further contain at least one of Ca and Sr. B necessarily contains Ti and further contains at least one of Zr and Hf. )
- R is Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu.
- M is at least one selected from Mn, Cr, Co and Fe) and Mg.
- D / E is 0.2 to 0.8. It is.
- the firing step is preferably carried out with a temperature profile in which an average rate of temperature increase from room temperature to the maximum temperature is 100 ° C./second or more.
- the present invention also includes a laminate comprising a plurality of laminated dielectric ceramic layers and a plurality of internal electrodes formed along a specific interface between the dielectric ceramic layers, and an outer surface of the laminate. And a plurality of external electrodes that are formed at different positions and are electrically connected to a specific one of the internal electrodes.
- the dielectric ceramic constituting the dielectric ceramic layer may contain ABO 3 (A necessarily includes Ba and further includes at least one of Ca and Sr. B includes Ti. It is necessarily included, and at least one of Zr and Hf may be included.), And R (R is Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd) , Tb, Dy, Ho, Er, Tm, Yb and Lu), M (M is at least one selected from Mn, Cr, Co and Fe) and Mg, and a dielectric The average grain diameter of the dielectric ceramic constituting the ceramic layer is 100 nm or less.
- the average grain diameter of the dielectric ceramic constituting the dielectric ceramic layer is preferably 50 nm or less.
- the dielectric ceramic layer contains the subcomponent element having an action of suppressing ceramic grain growth, and the firing process is performed in a short time. Since the sintering is completed, the occurrence of segregation of the subcomponent elements can be prevented as much as possible in the dielectric ceramic layer, and these can be uniformly present. Therefore, grain growth during firing is less likely to occur, and the ceramic constituting the obtained dielectric ceramic layer can be configured with fine grains.
- the life characteristics in the high temperature load test can be improved. Further, the characteristics given by the dielectric ceramic layer can be stabilized. Furthermore, even if the addition amount of the subcomponent element is relatively small, the effect of the subcomponent element can be sufficiently exerted.
- the internal electrode in the internal electrode, state changes such as electrode breakage and ball formation during the heat treatment in the firing step are suppressed, and the internal electrode is made thinner while maintaining high coverage of the internal electrode. This contributes to the reduction in size and capacity of the multilayer ceramic capacitor.
- the thinning and high coverage of the internal electrode are brought about as a result of suppressing the shrinkage of the internal electrode, it is possible to simultaneously suppress the generation of voids and gaps at the end of the internal electrode. Therefore, the sealing performance of the laminated body after the heat treatment is improved, and the environmental reliability as the multilayer ceramic electronic component can be improved.
- the contraction of the internal electrode is suppressed as described above, when the internal electrode is pulled out to a predetermined surface of the laminate, the degree of retraction at the leading end of the internal electrode becomes very small.
- sintering is completed in a short time in the firing step, there is almost no migration and precipitation to the surface of the glass phase due to the additive component of the ceramic constituting the dielectric ceramic layer. Therefore, in forming the external electrode that is electrically connected to the internal electrode, a step for exposing the lead end of the internal electrode can be omitted.
- the dielectric ceramic constituting the dielectric ceramic layer contains a volatile component (sintering aid) such as Li, B, Pb, etc.
- sintering is completed in a short time in the firing step.
- These volatile components are prevented from being scattered by heat treatment in the firing step.
- a multilayer ceramic capacitor having an internal electrode containing a base metal such as Ni as a conductive component conventionally, in the heat treatment process, in order to achieve both internal electrode oxidation suppression and ceramic reduction suppression, the oxygen partial pressure in the atmosphere is reduced. It was necessary to precisely control the base metal in the vicinity of the equilibrium oxygen partial pressure, and the design of the firing furnace was complicated. On the other hand, according to the present invention, the rate of temperature rise is high in the firing step, and the heat treatment (ceramic sintering shrinkage) time can be shortened. Heat treatment can be performed without causing the heat treatment. Therefore, it is difficult to reduce the dielectric ceramic, and it is not necessary to re-oxidize the multilayer ceramic capacitor with high reliability.
- FIG. 1 is a cross-sectional view schematically showing a multilayer ceramic capacitor manufactured by a manufacturing method according to an embodiment of the present invention.
- the Mn element in the wavelength dispersive X-ray microanalyzer (WDX) was obtained.
- the mapping analysis image is shown, (1) is for sample 10 and (2) is for sample 11.
- FIG. 1 the structure of a multilayer ceramic capacitor 1 to which the present invention is applied will be described.
- the multilayer ceramic capacitor 1 includes a multilayer body 2 as a component body.
- the multilayer body 2 includes a plurality of laminated dielectric ceramic layers 3 and a plurality of internal electrodes 4 and 5 formed along a specific interface between the dielectric ceramic layers 3.
- the ends of the plurality of internal electrodes 4 and 5 are exposed on the one and other end faces 6 and 7 of the laminate 2, respectively.
- the ends of the internal electrodes 4 and the ends of the internal electrodes 5 are External electrodes 8 and 9 are formed so as to be electrically connected to each other.
- the raw material of the multilayer body 2 is first produced by a known method of laminating ceramic green sheets on which the internal electrodes 4 and 5 are printed. Next, a firing step is performed to sinter the raw laminate. Next, external electrodes 8 and 9 are respectively formed on the end faces 6 and 7 of the sintered multilayer body 2 to complete the multilayer ceramic capacitor 1.
- the dielectric ceramic raw material powder contained in the ceramic green sheet to be the dielectric ceramic layer 3 provided in the laminate 2 described above those having the following composition and properties are used.
- the dielectric ceramic raw material powder is ABO 3 (A necessarily contains Ba and may further contain at least one of Ca and Sr. B necessarily contains Ti and further contains at least one of Zr and Hf.
- R is Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb) And at least one selected from Lu
- M is at least one selected from Mn, Cr, Co and Fe) and Mg.
- dielectric ceramic raw material powder when the total amount of subcomponents is 100 parts by mole with respect to 100 parts by weight of the main component and the specific surface area of the ceramic raw material powder giving the main component is Em 2 / g, D / E Is 0.2 to 0.8.
- a heat treatment step is applied in which a temperature profile in which an average rate of temperature increase from room temperature to the maximum temperature is 40 ° C./second or more is applied.
- the temperature profile is 100 ° C./second or more.
- the raw laminate is degreased before the above heat treatment step.
- the temperature is immediately cooled without maintaining this temperature after reaching the above-mentioned maximum temperature.
- the dielectric constituting the dielectric ceramic layer 3 The average grain diameter of the ceramic can be reduced to 100 nm or less, preferably 50 nm or less.
- the illustrated multilayer ceramic capacitor 1 is a two-terminal type including two external terminals 8 and 9, it can also be applied to a multi-terminal type multilayer ceramic electronic component.
- barium titanate powder and barium calcium titanate powder were prepared.
- barium titanate powder BaCO 3 powder and TiO 2 powder were weighed, and for barium calcium titanate powder, BaCO 3 powder, CaCO 3 powder and TiO 2 powder were weighed in predetermined amounts, respectively, and then ball milled. After mixing for 42 hours, heat treatment was performed, and BaTiO 3 (hereinafter “BT”) powder and (Ba 0.90 Ca 0.10 ) TiO 3 (hereinafter “BCT”) powder were obtained by solid phase reaction.
- BT BaTiO 3
- BCT Ba 0.90 Ca 0.10
- a particle size is an average particle size when the SEM observation image is converted into a sphere, and SSA is measured by a multisorb apparatus using a nitrogen adsorption method.
- Samples 1, 2 and 7-9 100BT (or BCT) -1.0Dy-1.0Mg-0.3Mn-1.0Si Samples 3 to 6: 100BT (or BCT) -10Dy-10Mg-3Mn-1.0Si Samples 10 to 13, 16 and 17: 100BT (or BCT) -2.5Dy-2.5Mg-0.8Mn-1.0Si Sample 14: 100BT-3.0Dy-1.1Mg-0.8Mn-1.1Si Sample 15: 100BT-7.4Dy-2.7Mg-2.0Mn-1.1Si.
- these blends were mixed for 5 hours by a ball mill. Next, drying and dry pulverization were performed to obtain a dielectric ceramic raw material powder.
- this ceramic slurry was formed into a sheet by a die coater to obtain a ceramic green sheet.
- a conductive paste containing Ni as a main component was screen-printed on the ceramic green sheet to form a conductive paste film to be an internal electrode.
- a dielectric paste film having the same composition as the ceramic slurry is electrically conductive.
- the conductive paste film was formed in a region having no conductive paste film with the same thickness.
- the ceramic green sheets on which the conductive paste film and the dielectric paste film are formed are laminated one by one so that the side from which the conductive paste film is drawn is staggered, and the effective layer becomes five layers. A laminate was obtained.
- the green laminate was heated to a temperature of 300 ° C. at an N 2 atmosphere, after burning a binder was burned again binder at a temperature of 700 ° C. at a N 2 atmosphere.
- the outer dimensions of the multilayer ceramic capacitor thus obtained were 0.5 mm wide and 1.0 mm long, and the counter electrode area per layer of the dielectric ceramic layer was 0.3 mm 2 .
- the thickness of the dielectric ceramic layer was 0.3 ⁇ m, and the thickness of the internal electrode was 0.3 ⁇ m.
- the grain diameter was measured by breaking the multilayer ceramic capacitor according to each sample, performing thermal etching at a temperature of 1000 ° C., and observing the fractured surface using a scanning microscope. That is, image analysis was performed on this observed image, and the equivalent circle diameter was defined as the grain diameter.
- the number of measured grains was set to 300, and the average value thereof was obtained as the “grain diameter” shown in Table 1.
- Table 1 shows the following.
- Samples 2, 4, 6, 9, 11 and 13 to 17 having a heating rate of 40 ° C./second or more Samples 2, 9, and 14 having a D / E of less than 0.2 also grow grains.
- the grain diameter exceeds 100 nm. And what increased the grain diameter in this way has a large number of defectives in the high temperature load life test.
- the grain diameter is 100 nm or less.
- the number of defects in the high-temperature load life test is zero.
- Samples 4, 6, 11, 13, and 15 to 17 having a temperature rising rate of 100 ° C./second or more have a grain diameter smaller than 50 nm. It is suppressed.
- sample 11 has a temperature increase rate of 200 ° C./second
- sample 16 has a temperature increase rate of 40 ° C./second
- sample 17 has a temperature increase rate of 100 ° C./second.
- the heating rate is different.
- the grain diameter is smaller, such as 55 nm, 50 nm, and 45 nm.
- FIG. 2 shows a wavelength dispersive X-ray microanalyzer (WDX) obtained for evaluating the dispersion state of subcomponents in the dielectric ceramic constituting the dielectric ceramic layer provided in the multilayer ceramic capacitor produced in this experimental example. ) Shows a mapping analysis image of Mn element.
- WDX wavelength dispersive X-ray microanalyzer
- FIG. 2 is not a full color display and therefore does not accurately display the mapping analysis of the Mn element. it can.
- Sample 10 and Sample 11 are different from each other in firing conditions such as a temperature increase rate, a maximum temperature, and a keep time in the firing step.
- a temperature increase rate such as 200 ° C./second
- FIG. 2 (2) there is not so much segregation of the Mn element as an accessory component, and the sample 11 is almost uniformly dispersed in the ceramic particles. This is thought to increase the effect of suppressing grain growth.
- a low temperature increase rate of 50 ° C./min is adopted, as shown in FIG.
- Dy is used as the subcomponent element R and Mn is used as the subcomponent element M.
- Sc, Y, La, Ce other than Dy are used as the subcomponent element R.
- Pr, Nd, Pm, Sm, Eu, Gd, Tb, Ho, Er, Tm, Yb, and Lu or the subcomponent element M is Cr, Co other than Mn. It has been confirmed that similar results can be obtained even when either Fe or Fe is used.
Abstract
Description
まず、チタン酸バリウム粉末およびチタン酸バリウムカルシウム粉末を準備した。チタン酸バリウム粉末については、BaCO3粉末とTiO2粉末とを、また、チタン酸バリウムカルシウム粉末については、BaCO3粉末とCaCO3粉末とTiO2粉末とを、各々所定量秤量した後、ボールミルにより42時間混合し、熱処理を行ない、固相反応により、BaTiO3(以下、「BT」)粉末および(Ba0.90Ca0.10)TiO3(以下、「BCT」)粉末を得た。
表1に示した試料1~17を得るため、上記のようにして得られたBT粉末およびBCT粉末の各々に、MgO、MnO、Dy2O3およびSiO2の各粉末を以下のように配合した。
・試料3~6: 100BT(またはBCT)-10Dy-10Mg-3Mn-1.0Si
・試料10~13、16および17: 100BT(またはBCT)-2.5Dy-2.5Mg-0.8Mn-1.0Si
・試料14: 100BT-3.0Dy-1.1Mg-0.8Mn-1.1Si
・試料15: 100BT-7.4Dy-2.7Mg-2.0Mn-1.1Si。
上記誘電体セラミック原料粉末に、ポリビニルブチラール系バインダおよびエタノールを加えて、ボールミルにより5時間湿式混合し、セラミックスラリーを作製した。
・昇温速度が40~200℃/秒の場合: 最高温度1400℃で、キープなし。
表1に示すように、グレイン径、粒成長度および高温負荷寿命試験での不良数を評価した。
2 積層体
3 誘電体セラミック層
4,5 内部電極
Claims (4)
- 誘電体セラミック原料粉末を含みかつ積層された複数の誘電体セラミック層と前記誘電体セラミック層間の特定の界面に沿って形成される内部電極とを備える、生の積層体を作製する工程と、
前記生の積層体を焼結させるため、室温から最高温度までの平均昇温速度を40℃/秒以上とする温度プロファイルにて前記生の積層体を熱処理する、焼成工程と
を備え、
前記誘電体セラミック原料粉末は、ABO3(Aは、Baを必ず含み、さらにCaおよびSrの少なくとも一方を含むことがある。Bは、Tiを必ず含み、さらにZrおよびHfの少なくとも一方を含むことがある。)を主成分とし、副成分として、R(Rは、Sc、Y、La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、YbおよびLuから選ばれる少なくとも1種)、M(Mは、Mn、Cr、CoおよびFeから選ばれる少なくとも1種)およびMgを含有し、前記主成分100モル部に対する、前記副成分の含有総量をDモル部とし、前記主成分を与えるセラミック原料粉末の比表面積をEm2/gとするとき、D/Eが0.2~0.8である、
積層セラミックコンデンサの製造方法。 - 前記焼成工程は、室温から最高温度までの平均昇温速度を100℃/秒以上とする温度プロファイルにて実施される、請求項1に記載の積層セラミックコンデンサの製造方法。
- 積層された複数の誘電体セラミック層、および前記誘電体セラミック層間の特定の界面に沿って形成された複数の内部電極をもって構成される、積層体と、
前記積層体の外表面上の互いに異なる位置に形成され、かつ前記内部電極の特定のものに電気的に接続される、複数の外部電極と
を備え、
前記誘電体セラミック層を構成する誘電体セラミックは、ABO3(Aは、Baを必ず含み、さらにCaおよびSrの少なくとも一方を含むことがある。Bは、Tiを必ず含み、さらにZrおよびHfの少なくとも一方を含むことがある。)を主成分とし、副成分として、R(Rは、Sc、Y、La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、YbおよびLuから選ばれる少なくとも1種)、M(Mは、Mn、Cr、CoおよびFeから選ばれる少なくとも1種)およびMgを含有し、
前記誘電体セラミック層を構成する誘電体セラミックの平均グレイン径が100nm以下である、積層セラミックコンデンサ。 - 前記誘電体セラミック層を構成する誘電体セラミックの平均グレイン径が50nm以下である、請求項3に記載の積層セラミックコンデンサ。
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US13/403,019 US8609564B2 (en) | 2009-08-27 | 2012-02-23 | Manufacturing method for laminated ceramic capacitor, and laminated ceramic capacitor |
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JP2013008972A (ja) * | 2011-06-23 | 2013-01-10 | Samsung Electro-Mechanics Co Ltd | チップ型積層キャパシタ |
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US8830651B2 (en) | 2011-08-23 | 2014-09-09 | Murata Manufacturing Co., Ltd. | Laminated ceramic capacitor and producing method for laminated ceramic capacitor |
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US20140160626A1 (en) * | 2011-09-12 | 2014-06-12 | Murata Manufacturing Co., Ltd. | Laminated Ceramic Capacitor |
JP2013258229A (ja) * | 2012-06-12 | 2013-12-26 | Murata Mfg Co Ltd | セラミック電子部品の製造方法及びセラミック電子部品 |
US20130329334A1 (en) * | 2012-06-12 | 2013-12-12 | Murata Manufacturing Co., Ltd. | Method for manufacturing ceramic electronic component and ceramic electronic component |
US9305707B2 (en) * | 2012-06-12 | 2016-04-05 | Murato Manufacturing Co., Ltd. | Method for manufacturing ceramic electronic component and ceramic electronic component including cross-linked section |
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US9129750B2 (en) | 2012-11-06 | 2015-09-08 | Samsung Electro-Mechanics Co., Ltd. | Multilayered ceramic electronic component and manufacturing method thereof |
JP2014110415A (ja) * | 2012-12-04 | 2014-06-12 | Samsung Electro-Mechanics Co Ltd | 積層セラミックキャパシタ及びその実装基板 |
TWI490898B (zh) * | 2012-12-04 | 2015-07-01 | Samsung Electro Mech | 多層式陶瓷電容器及用於安裝該電容器的板件 |
US9099240B2 (en) | 2012-12-04 | 2015-08-04 | Samsung Electro-Mechanics Co., Ltd. | Multilayered ceramic capacitor and board for mounting the same |
WO2024070416A1 (ja) * | 2022-09-26 | 2024-04-04 | 太陽誘電株式会社 | セラミック電子部品、およびセラミック電子部品の製造方法 |
Also Published As
Publication number | Publication date |
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US20120147518A1 (en) | 2012-06-14 |
JPWO2011024582A1 (ja) | 2013-01-24 |
US20140043725A1 (en) | 2014-02-13 |
CN102483993B (zh) | 2014-07-09 |
KR101343091B1 (ko) | 2013-12-20 |
JP5316642B2 (ja) | 2013-10-16 |
US8609564B2 (en) | 2013-12-17 |
CN102483993A (zh) | 2012-05-30 |
KR20120032570A (ko) | 2012-04-05 |
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