WO2010018780A1 - 受信装置、受信方法及びプログラム - Google Patents
受信装置、受信方法及びプログラム Download PDFInfo
- Publication number
- WO2010018780A1 WO2010018780A1 PCT/JP2009/063938 JP2009063938W WO2010018780A1 WO 2010018780 A1 WO2010018780 A1 WO 2010018780A1 JP 2009063938 W JP2009063938 W JP 2009063938W WO 2010018780 A1 WO2010018780 A1 WO 2010018780A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- unit
- signal
- frequency
- tuner
- channel
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/50—Tuning indicators; Automatic tuning control
- H04N5/505—Invisible or silent tuning
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
- H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
- H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor
- H03J1/0058—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor provided with channel identification means
- H03J1/0083—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor provided with channel identification means using two or more tuners
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
- H04N21/42607—Internal components of the client ; Characteristics thereof for processing the incoming bitstream
- H04N21/4263—Internal components of the client ; Characteristics thereof for processing the incoming bitstream involving specific tuning arrangements, e.g. two tuners
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving MPEG packets from an IP network
- H04N21/4382—Demodulation or channel decoding, e.g. QPSK demodulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/455—Demodulation-circuits
Definitions
- the present invention relates to a receiving apparatus, a receiving method, and a program suitable for application to, for example, a television receiver having a tuner.
- an RF (Radio-Frequency) signal received by an antenna is distributed by a splitter, and the distributed signal is supplied to a plurality of devices equipped with a tuner.
- a program program being broadcast on another channel by another tuner while receiving a program program being broadcast by a broadcasting station (hereinafter also referred to as a channel) which is one tuner. Can be received simultaneously.
- an EPG Electronic Program Guide
- the plurality of tuners can select different channels by being individually controlled by a control unit configured by a microcomputer or the like.
- Patent Document 1 describes a television receiver including two tuners, a main tuner and a sub tuner.
- JP 2000-350108 A JP 2000-350108 A
- a specific channel of terrestrial digital broadcasting is selected in one tuner, and the channels of terrestrial digital broadcasting are similarly switched in other tuners. Assume a case.
- FIG. 1 shows the channel selection state at each tuner in such a television receiver.
- FIG. 1 (a) shows a channel selection state in a tuner (first tuner) that is selecting channel CH2, and
- FIG. 1 (b) shows another tuner (where channel switching is performed).
- the channel selection state of the second tuner) is shown.
- 1A and 1B the horizontal axis indicates the channel frequency.
- FIG. 1 (a) shows that channel CH2 is selected in the first tuner.
- channel selection is switched from channel CH1 having a frequency lower than channel CH2 to channel CH3 having a frequency higher than channel CH2.
- the value of the frequency control voltage for switching the channel selects the channel CH3 from the voltage value for selecting the channel CH1.
- the voltage value changes to This change in voltage value gradually changes over a period of time. For this reason, a timing at which the voltage value becomes the same voltage as the voltage value for channel CH2 channel selection occurs.
- the impedance condition in the first tuner and the impedance condition in the second tuner are instantaneously equivalent.
- the input impedance of the first tuner changes suddenly, and the input level of the RF signal input to the first tuner also temporarily changes.
- the fluctuation occurs only for a moment when the value of the frequency control voltage in the second tuner crosses the voltage value for channel CH2 channel selection, and then the level of the RF signal input to the first tuner is restored. .
- the tuner is equipped with an AGC (Automatic Gain Control) circuit for keeping the output level of the signal constant.
- AGC Automatic Gain Control
- the input level of the RF signal changes abruptly in this way. If you can't follow it. That is, proper control cannot be performed. As a result, there is a problem in that image quality deterioration occurs, such as a line running on the video output on the display screen or block noise.
- the present invention has been made in view of this point, and an object of the present invention is to reduce image quality degradation that occurs at the time of channel transition in a device having a plurality of tuners or each device that receives a distributed RF signal.
- the receiving apparatus of the present invention selects a signal of a desired channel from each received signal distributed by a distributing unit that distributes the received signal into at least two or more signals, and obtains an intermediate frequency signal or a baseband signal Equipped with. Furthermore, a local oscillator that generates a frequency signal necessary for generating an intermediate frequency signal or a baseband signal and supplies the frequency signal to the receiver, and a frequency signal output from the local oscillator is used as a feedback signal to oscillate with the local oscillator. And a PLL unit that generates a frequency control voltage for controlling the frequency. Then, when the channel received by the receiving unit is changed, and when it is detected that the other receiving unit receiving the received signal distributed by the distributing unit crosses the channel being selected, the PLL unit performs frequency control. Control was made to slow down the speed of changing the voltage.
- the frequency control voltage generation process in the frequency control voltage generation unit is also performed slowly, so that the transient response of the local oscillation unit at the time of channel selection is also delayed.
- the fluctuation of the input impedance that occurs in the other tuner becomes gradual, and the level fluctuation in the signal input to the other tuner Will also be calm.
- the level fluctuation in the input signal accompanying the fluctuation of the input impedance occurring in the other tuner becomes gentle.
- control is properly performed, and deterioration of the image quality of the output image is suppressed.
- First embodiment configuration example of receiving apparatus equipped with a plurality of tuners
- Second embodiment configuration example when a plurality of receiving devices equipped with tuners receive a signal distributed by a splitter
- the receiving apparatus of the present invention is applied to a television receiver equipped with two tuners.
- FIG. 2 shows a configuration example of a receiving portion of a television receiver to which the receiving apparatus according to this embodiment is applied.
- a case where the present invention is applied to a television receiver is taken as an example.
- a recording / reproducing apparatus such as a video recorder, HDD recorder, DVD recorder, Blu-ray (registered trademark) recorder,
- the present invention may be applied to other devices such as a personal computer.
- the television receiver includes a splitter 10 that distributes an RF input signal into two, a first tuner 20, a second tuner 30, and a first tuner 20. And a control unit 40 for controlling the second tuner 30.
- the first tuner 20 includes a tuner unit 21 and a demodulation unit 22, and the second tuner 30 includes a tuner unit 31 and a demodulation unit 32.
- the tuner unit 21 and the demodulation unit 22 in the first tuner are connected to the control unit 40 via the control line Ln1, and the tuner unit 31 and the demodulation unit 32 in the second tuner 30 connect the control line Ln2. It is connected to the control unit 40 via. That is, the tuner unit 21 and the demodulation unit 22 in the first tuner 20 and the tuner unit 31 and the demodulation unit 32 in the second tuner 30 are controlled by the same control unit 40.
- the tuner unit 21 and the tuner unit 31 select (select) the radio wave of a desired channel from the RF input signals distributed by the splitter 10 and convert the frequency of the selected signal to an intermediate frequency signal. Amplify.
- the demodulating unit 22 and the demodulating unit 32 take out a video signal and an audio signal from an intermediate frequency signal (hereinafter also referred to as an IF signal) output from the tuner unit 21 and the tuner unit 31, and send them to a display unit and a speaker (not shown). Output.
- an IF signal intermediate frequency signal
- the control unit 40 is composed of a microcomputer or the like. Then, when the channel switching is instructed by the user via the remote control device or the like, or when the channel switching is performed at the recording time designated by the user, information necessary for channel switching is output to each tuner.
- Information necessary for channel switching includes a frequency division ratio in a programmable frequency divider (to be described later), an AGC level in an AGC circuit (to be described later), and the like.
- control unit 40 acquires information (channel selection frequency) of the channel being selected by the first tuner 20 and the second tuner 30 at a predetermined timing such as a timing when the processing load is low (idle time), for example.
- the acquired information is also written in a table (not shown). Then, when the first tuner 20 or the second tuner 30 starts channel selection, the value of this table is referred to, and the channel selection by one tuner straddles the channel being selected by the other tuner. Judge whether or not. Then, when it is determined that the channel selection by one tuner straddles the channel being selected by the other tuner, the control described later is performed.
- FIG. 3 shows an internal configuration example of the second tuner 30.
- the configuration of the second tuner 30 will be described in order to exemplify a case where the second tuner 30 performs channel switching so as to straddle the channel being selected by the first tuner 20.
- the first tuner 20 also has the same configuration as the second tuner 30.
- the second tuner 30 includes a receiving circuit (receiving unit) 300 and a PLL (Phase-Locked Loop) circuit 310.
- the receiving circuit 300 includes a first band pass filter (hereinafter referred to as BPF) 301, a low noise amplifier 302, a second BPF 303, a mixer 304, a local oscillator 305, an intermediate frequency amplifier 306, an automatic gain, and the like.
- An AGC circuit 307 serving as a control unit is included.
- the first BPF 301 is a tuning circuit including a coil and a variable capacitor (not shown), and selects a desired reception frequency by changing the capacitance of the variable capacitor. At the same time, unnecessary signals that cause interference are also eliminated.
- the low noise amplifier 302 amplifies the high frequency voltage that has passed through the first BPF 301 and outputs it to the second BPF 303.
- the second BPF 303 is a filter that attenuates frequency components (image frequencies) that cause interference other than the desired frequency, and the signal that has passed through the second BPF 303 is input to the mixer 304.
- the mixer 304 mixes the signal of the desired frequency that has passed through the second BPF 303 and the local oscillation signal output from the local oscillator 305 to convert it into an IF signal.
- the local oscillator 305 generates a frequency signal for converting an RF signal into an IF signal based on the frequency control voltage output from the PLL circuit 310 and outputs the frequency signal to the mixer 304.
- the intermediate frequency amplifier 306 amplifies the IF signal converted by the mixer 304, optimizes the signal level, and outputs the adjusted IF signal to the demodulator 32 (see FIG. 2).
- the AGC circuit 307 extracts the IF signal amplified by the intermediate frequency amplifier 306, generates an AGC control signal for adjusting the gain in the low noise amplifier 302, and supplies the generated AGC control signal to the low noise amplifier 302. To do.
- the PLL circuit 310 generates a frequency control voltage for controlling the oscillation frequency of the local oscillator 305 using the local oscillation signal output from the local oscillator 305 as a feedback signal.
- the PLL circuit 310 includes a programmable frequency divider 311, a reference signal generator 312, a phase comparator 313, a charge pump unit 314, and a frequency control voltage generator 315.
- the programmable frequency dividing unit 311 optimizes the level of a signal fed back from the local oscillator 305 (hereinafter also referred to as a feedback signal), and determines a feedback signal based on the frequency division ratio supplied from the control unit 40. Divide the frequency to. Then, the adjusted signal is output to the phase comparison unit 313.
- the reference signal generation unit 312 generates a reference signal set to a predetermined frequency based on control by the control unit 40, and supplies the generated reference signal to the phase comparison unit 313.
- the phase comparison unit 313 compares the phase of the reference signal supplied from the reference signal generation unit 312 with the phase of the signal output from the programmable frequency division unit 311 and determines the current level and polarity according to the phase difference.
- the signal shown is generated and output to the charge pump unit 314.
- the charge pump unit 314 serves as a power source, and generates a current / voltage having a desired level and polarity based on the content of the signal output from the phase comparison unit 313 and the control content from the control unit 40. Output to the frequency control voltage generator 315.
- the upper limit value of the current generated by the charge pump unit 314 is set to a level instructed from the control unit 40.
- the level of the upper limit value of the current (hereinafter referred to as the current upper limit value) can be set, for example, in five stages.
- the frequency control voltage generation unit 315 generates a frequency control voltage having a magnitude corresponding to the level of the current / voltage input from the charge pump unit 314.
- the frequency control voltage is used to control the local oscillator 305, the first BPF 301, and the second BPF 303.
- the frequency control voltage generator 315 includes a DC amplifier 3151 and a low-pass filter (hereinafter referred to as LPF) 3152.
- the DC amplifier 3151 DC amplifies the current input from the charge pump unit 314 and outputs the amplified current to the LPF 3152.
- the LPF 3152 integrates the current amplified by the DC amplifier 3151 to obtain a DC voltage, and supplies the generated DC voltage to the local oscillator 305.
- the frequency of the local oscillation signal is determined by the frequency control voltage. Further, the speed of the transient response of the local oscillator 305 at the time of channel selection is determined by the speed of generation of the frequency control voltage.
- the filter characteristics of the first BPF 301 and the second BPF 303 are determined by the frequency control voltage.
- the speed of the frequency control voltage generation operation in the frequency control voltage generation unit 315 changes by changing the following settings.
- Loop gain in PLL circuit 310 (2) Cut-off frequency height of loop filter in PLL circuit 310
- the magnitude of the loop gain in the PLL circuit 310 shown in (1) can be changed by adjusting the magnitude of the gain of the DC amplifier 3151 and the magnitude of the current of the charge pump unit 314.
- the loop gain increases, so that the frequency control voltage generating operation is performed quickly.
- the gain of the DC amplifier 3151 is lowered, the loop gain is decreased, and the speed of the frequency control voltage generation operation is decreased.
- the loop gain is increased, so that the speed of the frequency control voltage generation operation is increased.
- the current supplied by the charge pump unit 314 is reduced, the loop gain is reduced, and the speed of the frequency control voltage generation operation is reduced.
- the control of the cut-off frequency of the loop filter of the PLL circuit 310 shown in (2) is realized by raising or lowering the cut-off frequency of the DC amplifier 3151.
- the frequency control voltage generation operation is delayed when a tuner performs channel switching (channel selection) and also when the channel is selected by another tuner at the time of channel selection. Process. Thereby, since the transient response of the local oscillator 305 is temporarily delayed, the control in the AGC circuit is performed following the level change of the input RF signal.
- FIG. 4A shows an example of transition of the voltage level of the frequency control voltage in the frequency control voltage generation unit 315 at the time of channel switching when the current supplied from the charge pump unit 314 to the frequency control voltage generation unit 315 is large.
- FIG. 4B shows an example of transition of the voltage level of the frequency control voltage in the frequency control voltage generation unit 315 at the time of channel switching when the current supplied from the charge pump unit 314 to the frequency control voltage generation unit 315 is small. Is shown.
- the horizontal axis indicates time.
- the level of the RF signal input to the first tuner 20 is shown in the uppermost stage, and the voltage level for channel CH3 channel selection, the voltage level for channel CH2 channel selection in the lower stage, The voltage level for selecting channel CH3 is shown.
- the state in which the frequency control voltage generated by the frequency control voltage generation unit 315 of the second tuner 30 transitions is shown in bold.
- the voltage level of the frequency control voltage in the frequency control voltage generation unit 315 of the second tuner 30 is selected from the channel CH1 channel selection voltage level as indicated by the bold line. It shows a rapid transition to a voltage level for use.
- the operation of the frequency control voltage generation unit 315 is performed at high speed, and the voltage of the frequency control voltage The level is changing rapidly.
- the voltage level of the frequency control voltage in the frequency control voltage generator 315 of the second tuner 30 crosses the voltage level associated with the channel CH2 being selected by the first tuner 20, RF It shows that the level of the input signal is fluctuating.
- the level of the frequency control voltage supplied to the first BPF 301 of the second tuner 30 is the same as the voltage level for channel CH2 being selected by the first tuner 20, the first The impedance conditions of the tuner 20 and the second tuner 30 are temporarily equivalent. Under this influence, the input impedance of the first tuner 20 changes abruptly, so that the signal level of the RF signal input to the first tuner 20 also changes instantaneously.
- the signal level of the RF signal input to the first tuner 20 is high.
- the fluctuation also occurs in a short time.
- the control by the AGC circuit (not shown) of the first tuner 20 cannot catch up as described above, and is output to a display device or the like. The image quality of the recorded video will be temporarily deteriorated.
- the channel is switched, and the current upper limit value of the charge pump unit 314 can be set to the lowest value (level) when the channel selected by another tuner is straddled. ) Is set.
- the current upper limit value of the charge pump unit 314 is set to the lowest level that can be set, but the present invention is not limited to this.
- the current upper limit value of the charge pump unit 314 can be set to five levels, it may be changed to the second level from the bottom.
- step S1 channel selection by the second tuner 30 is started, and when it is detected that the channel selected by another tuner is crossed (step S1), the control unit 40 causes the current upper limit value of the charge pump unit 314 to be exceeded. Is set to the lowest level that can be set (step S2). Then, it is determined whether or not the PLL circuit 310 is locked (step S3). That is, it is determined whether or not the frequency of the reference signal input to the phase comparator 313 (see FIG. 3) matches the frequency of the divided feedback signal. Until the PLL circuit 310 is locked, that is, until the channel switching is completed, the determination in step S3 is repeated. When the lock of the PLL circuit 310 is confirmed, the current upper limit value of the charge pump unit 314 is returned to the pre-setting change or other desired high level based on the control of the control unit 40 (step S4).
- step S5 the demodulation process in the demodulator 32 is started (step S5).
- step S6 it is determined whether or not the video signal and the audio signal can be received by the demodulator 32 (step S6), and the determination of step S6 is repeatedly performed while the reception is not completed. Then, when the reception is completed, the video signal and the audio signal are output from the demodulator 32 (step S7).
- the level of the RF signal input to the first tuner 20 also changes gradually, so that the control in the AGC circuit is performed following the level change of the input RF signal. That is, it is possible to suppress deterioration of the image output to the display unit or the like.
- the second tuner The reception sensitivity at 30 does not decrease.
- the value of the current upper limit value in the charge pump unit 314 is changed to the original value or other desired high value necessary for stable image output after the channel transition in the second tuner 30 is completed. Therefore, there is no influence on the input RF signal to the first tuner 20.
- the current upper limit value of the charge pump section 314 is only when the channel is switched and only when the channel selected by another tuner is straddled.
- the case of changing the setting is taken as an example, it is not limited to this. For example, it is possible to always perform such control when switching channels without determining whether or not the channel being selected by another tuner is crossed.
- the case where the transient response of the local oscillator 305 at the time of channel selection is delayed by changing the current upper limit value of the charge pump unit 314 is taken as an example. Is not to be done.
- the transient response of the local oscillator 305 at the time of channel selection may be delayed by lowering the gain of the DC amplifier 3151 or lowering the cutoff frequency of the LPF 3152.
- the gain value of the DC amplifier 3151 that is temporarily lowered is set to a value that does not break the loop of the PLL circuit 310 and that does not exceed the initial setting value.
- the value of the cutoff frequency of LPF 3152 that is temporarily lowered is set to a value that does not cause a bounce and does not exceed the initial set value.
- the control unit 40 reads the value written in the table to determine whether or not the channel being selected by another tuner is to be crossed.
- the channel selection status of another tuner may be inquired each time, and a determination may be made based on the result.
- the receiving device having two tuners is taken as an example, but the present invention may be applied to a device having three or more tuners.
- the tuner is applied to a tuner that obtains an intermediate frequency signal by mixing a channel selection frequency signal with a reception signal. You may apply to the tuner which acquires a signal.
- the receiving device of the present invention is applied to a receiving device that receives RF signals distributed by a splitter by a plurality of receiving devices equipped with a tuner.
- the block diagram shown in FIG. 6 functionally shows an example of a system configured in such a form.
- the system shown in FIG. 6 includes a splitter 50 that distributes an RF input signal, a first tuner 60, and a first controller 100 that controls the first tuner 60.
- the 2nd tuner 70 and the 2nd control part 110 which controls the 2nd tuner 70 are contained.
- the first tuner 60 includes a tuner unit 61 and a demodulation unit 62
- the second tuner 70 includes a tuner unit 71 and a demodulation unit 72.
- the tuner unit 61 and the demodulation unit 62 in the first tuner are connected to the first control unit 100 via the control line Ln1.
- the tuner unit 71 and the demodulation unit 72 in the second tuner 70 are connected to the second control unit 110 via the control line Ln2.
- the first control unit 100 and the second control unit 110 are connected to a control line Ln10 made of, for example, an HDMI (High-Definition-Multimedia-Interface) cable or the like. It can be shared through the control line Ln10.
- a control line Ln10 made of, for example, an HDMI (High-Definition-Multimedia-Interface) cable or the like. It can be shared through the control line Ln10.
- the first tuner 60 and the second tuner 70 are assumed to have the same configuration as the first tuner 20 and the second tuner 30 shown in FIG. That is, it is assumed that each block shown in FIG.
- the channel selection frequency at the first tuner 60 is acquired by the second control unit 110 that controls the second tuner 70. (Step S12). Subsequently, the second control unit 110 determines whether or not the channel selection by the second tuner 70 is a channel selection across the channel selection frequency being selected by the first tuner 60 (step S13). ).
- the second control unit 110 changes the frequency of the local oscillation signal generated by the local oscillator 305 (see FIG. 3). Control is performed (step S14).
- step S15 whether or not the PLL circuit 310 (see FIG. 3) in the second tuner 70 is locked is determined by the second control unit 110 (step S15). The determination in step S15 is continued.
- step S16 When it is determined that the PLL circuit 310 in the second tuner 70 is locked, the demodulation processing in the demodulator 72 in the second tuner 70 is started (step S16). Next, it is determined whether the demodulator 72 has received the video signal and the audio signal (step S17), and the determination in step S17 is continued while the reception is not completed. Then, when reception is completed, the video signal and the audio signal are output from the demodulator 72 (step S18).
- step S13 if it is determined in step S13 that the channel selection by the second tuner 70 is a channel selection across the channel selection frequency being selected by the first tuner 60, the second control unit 110 The control for suppressing (slowing down) the frequency control voltage generation speed in the frequency control voltage generation unit 315 is performed, and the setting for changing the tuning frequency is performed (step S19).
- control for reducing the frequency control voltage generation speed in the frequency control voltage generation unit 315 the control for lowering the loop gain in the PLL circuit 310 or the LPF 3152 (see FIG. 3) as described in the first embodiment. Control to lower the cutoff frequency.
- the second control unit 110 determines whether or not the PLL circuit 310 in the second tuner 70 is locked (step S20). If it is determined that the PLL circuit 310 is not locked, the process proceeds to step S20. Judgment continues.
- step S21 When it is determined that the PLL circuit 310 in the second tuner 70 has been locked, the control for reducing the frequency control voltage generation speed by the second control unit 110 is terminated (step S21).
- step S22 the demodulation process in the demodulation unit 72 in the second tuner 70 is started (step S22).
- it is determined whether the demodulator 72 has received the video signal and the audio signal (step S23), and the determination in step S23 is continued while the reception is not completed. Then, when the reception is completed, the video signal and the audio signal are output from the demodulator 72 (step S24).
- FIG. 8 shows a configuration in which an RF input signal obtained by an antenna (not shown) is received by the recording / reproducing apparatus 1 incorporating the first tuner 60 and the television receiver 2 incorporating the second tuner 70. It is a thing.
- the recording / reproducing apparatus 1 for example, an apparatus such as a video recorder, an HDD recorder, a DVD recorder, or a Blu-ray (registered trademark) recorder is used.
- the RF input signal is distributed by the splitter 50 in the recording / reproducing apparatus 1 to the first tuner 60 in the recording / reproducing apparatus 1 and the second tuner 70 in the television receiver. Yes.
- the structure which distributes RF input signal to two apparatuses, the recording / reproducing apparatus 1 and the television receiver 2 is mentioned here as an example, it is not limited to this.
- the present invention may be applied to a configuration in which a plurality of devices each including a splitter and a tuner are connected to the recording / reproducing device 1 in FIG.
- a first control unit 100 for controlling the first tuner 60 is provided.
- a second tuner 70 is controlled.
- the control unit 110 is provided. And the 1st control part 100 and the 2nd control part 110 are connected by control line Ln10.
- a table (not shown) is stored in the first control unit 100 (or in the second control unit 110), and in this table, the channel selection frequency being selected by the first tuner 60 is stored. Information on the channel selection frequency selected by the second tuner 70 is stored.
- the first control unit 100 or the second control unit 110 refers to the value stored in this table, so that the channel selection is performed by another tuner. It is judged whether or not the selected tuning frequency is crossed.
- the internal configurations of the first tuner 60 and the second tuner 70 are the same as those shown in FIG.
- the same processing as that shown in FIG. 7 is performed. That is, the channel is switched by a certain tuner, and when the channel is switched over by another tuner by the switching, control for slowing the generation speed of the frequency control voltage is performed.
- the tuning frequency information in the other tuners is transmitted via communication without providing a table in the first control unit 100 (or the second control unit 110).
- the present invention may be applied to a configuration that obtains each time.
- FIG. 9 shows an RF input signal obtained by an antenna (not shown), a recording / reproducing apparatus 1 incorporating a first tuner 60, a television receiver 2 incorporating a second tuner 70, and a third tuner. 1 shows a configuration received by a personal computer 3 having 80.
- the RF input signal is distributed by an external splitter 50 'that can distribute the input signal into a plurality of signals.
- FIG. 9 shows an example in which an RF input signal is distributed to three devices, that is, a recording / reproducing device 1, a television receiver 2, and a personal computer 3, but the present invention is not limited to this. In other words, the present invention may be applied to a configuration in which a plurality of apparatuses having tuners are connected to the splitter 50 '.
- a first control unit 100 for controlling the first tuner 60 is provided.
- a second tuner 70 for controlling the second tuner 70 is provided.
- the control unit 110 is provided.
- a third control unit 120 that controls the third tuner 80 is also provided in the personal computer 3.
- the first control unit 100, the second control unit 110, and the third control unit 120 are connected by a control line Ln10.
- the internal configurations of the first tuner 60, the second tuner 70, and the third tuner 80 are the same as those shown in FIG. 3, and the processing at the control unit on the channel selection side is as shown in FIG. The same processing as that shown in FIG.
- the channel can be switched by a certain tuner.
- control is performed to slow down the generation speed of the frequency control voltage when straddling channels selected by other tuners by switching.
- the transient response of the local oscillator 305 (see FIG. 3) at the time of channel selection is delayed, so that the control in the AGC circuit is performed following the level change of the input RF signal. That is, it is possible to suppress deterioration of the image output to the display unit or the like.
- the series of processing in the above-described embodiment can be executed by hardware, but can also be executed by software.
- the program constituting the software is executed by installing it in a control processing unit (such as a central control unit) incorporated in dedicated hardware.
- the step of describing the program constituting the software is not limited to the processing performed in chronological order according to the described order, but is not necessarily processed in chronological order, either in parallel or individually.
- the process to be executed is also included.
- low noise amplifier 303: second BPF
- 304: mixer 305 ... local oscillator, 306 ... intermediate frequency amplifier, 307 ...
- AGC circuit 310 ... PLL circuit, 311 ... programmable frequency divider, 312 ... reference signal generation , 313 ... phase comparator, 314 ... charge pump section, 315 ... frequency control voltage generating unit, 3151 ... DC amplifier, 3152 ... low pass filter, CH1, CH2, CH3 ... channel, Ln1, Ln2, Ln3, LN10 ... control line
Abstract
Description
そして、受信部で受信するチャンネルを変更する場合であり、分配部で分配された受信信号を受信する他の受信部で選局中のチャンネルを横切ることを検知した場合に、PLL部で周波数制御電圧を変化させる速度を遅くする制御を行うようにした。
1.第1の実施の形態(複数のチューナを搭載した受信装置の構成例)
2.第2の実施の形態(スプリッタで分配された信号を、チューナを搭載した複数台の受信装置が受信する場合の構成例)
以下、本発明の第1の実施の形態を、図2~図5を参照して説明する。第1の実施の形態では、本発明の受信装置を、チューナを2台搭載したテレビジョン受像機に適用している。
図2は、本実施の形態における受信装置を適用したテレビジョン受像機の、受信部分の構成例を示したものである。なお、本例ではテレビジョン受像機に適用した場合を例に挙げるが、チューナを有する装置であれば、ビデオレコーダやHDDレコーダ、DVDレコーダ、Blu-ray(登録商標)レコーダ等の記録再生装置や、パーソナルコンピュータ等の他の装置に適用してもよい。
(1)PLL回路310におけるループゲイン
(2)PLL回路310のループフィルタのカットオフ周波数の高さ
以下、図5のフローチャートを参照して、第2のチューナ30の制御部40での処理の例を説明する。なお、本実施の形態では、第2のチューナ30でチャンネルの切り替えを行う場合を例に挙げているため、第2のチューナ30において以下の制御処理が行われるが、逆の場合もあり得る。つまり、第1のチューナ20でチャンネル切り替えが行われる場合には、第1のチューナ20において、以下に説明する処理が行われる。
上述した実施の形態によれば、第2のチューナ30でチャンネルの切り替えが行われる場合であり、その切り替えにより他のチューナで選局されているチャンネルをまたぐ場合に、チャージポンプ部314の電流上限値が最低のレベルに設定され、周波数制御電圧生成部315に供給される電流の量が制限される。これにより、周波数制御電圧生成部315で生成される周波数制御電圧のレベルが、時間をかけて緩やかに変位するようになるため、選局時の局部発振器305の過渡応答も遅くなる。従って、第1のチューナ20での入力インピーダンスの変動も急激なものではなくなる。これにより、第1のチューナ20に入力されるRF信号のレベルも緩やかに変化するようになるため、AGC回路における制御も、入力RF信号のレベル変化に追従して行われるようになる。つまり、表示部等に出力される画像の劣化を抑制することができるようになる。
なお、上述した第1の実施の形態では、チャンネルの切り替えが行われる場合であり、かつその切り替えにより他のチューナで選局されているチャンネルをまたぐ場合にのみ、チャージポンプ部314の電流上限値の設定を変更する場合を例に挙げたが、これに限定されるものではない。例えば、他のチューナで選局中のチャンネルをまたぐか否かの判断は行わず、チャンネルの切り替えを行う場合に、常にこのような制御を行うようにしてもよい。
次に、本発明の第2の実施の形態を、図6~図9を参照して説明する。第2の実施の形態では、本発明の受信装置を、スプリッタにより分配されたRF信号を、チューナを搭載した複数の受信装置が受信する受信装置に適用している。
図6に示したブロック図は、このような形態で構成されたシステムの例を機能的に示したものである。図6に示したシステムには、RF入力信号を分配するスプリッタ50と、第1のチューナ60と、第1のチューナ60を制御する第1の制御部100が含まれる。また、第2のチューナ70と、第2のチューナ70を制御する第2の制御部110とが含まれる。
次に、図7のフローチャートを参照して、チャンネルの選局を行う側の受信装置において行われる制御の例を説明する。図7に示した動作は、第2のチューナ70がチャンネルの切り替えを行う場合の例を示したものである。
上述した第2の実施の形態によれば、チューナを備えた複数の装置に、スプリッタ50(又はスプリッタ50′)によって分配されたRF入力信号を分配する構成においても、あるチューナでチャンネルの切り替えが行われる場合であり、その切り替えにより他のチューナで選局されているチャンネルをまたぐ場合に、周波数制御電圧の生成速度を遅くする制御が行われる。これにより、選局時の局部発振器305(図3参照)の過渡応答が遅くなるため、AGC回路における制御も、入力RF信号のレベル変化に追従して行われるようになる。つまり、表示部等に出力される画像の劣化を抑制することができるようになる。
Claims (12)
- 受信信号を少なくとも2つ以上の信号に分配する分配部で分配された受信信号から、所望のチャンネルの信号を選択して中間周波信号又はベースバンド信号を得る受信部と、
前記受信部で前記中間周波数信号又はベースバンド信号を生成するために必要な周波数信号を生成して、前記受信部に供給する局部発振部と、
前記局部発振器から出力された周波数信号を帰還信号として、前記局部発振器で発振する周波数を制御するための周波数制御電圧を生成するPLL部と、
前記受信部で受信するチャンネルを変更する場合であり、前記分配部で分配された受信信号を受信する他の受信部で選局中のチャンネルを横切ることを検知した場合に、前記PLL部で前記周波数制御電圧を変化させる速度を遅くする制御を行う制御部とを備えた
受信装置。 - 前記制御部による、前記制御電圧を変化させる速度を遅くする制御は、前記PLL部のループゲインを下げる処理又は、前記PLL部のループフィルタのカットオフ周波数を下げる処理により行う
請求項1記載の受信装置。 - 前記受信部及び前記PLL部は、前記分配部で分配された受信信号の数に対応して複数設けられ、
前記制御部は、前記複数の受信部と前記複数のPLL部の制御を行う
請求項2記載の受信装置。 - 前記制御部は、当該受信装置とは別の受信装置と通信線により接続され、前記通信線を介して行われる通信により、前記別の受信装置で選局中のチャンネルの情報を取得する
請求項2記載の受信装置。 - 前記PLL部は、
前記制御部の制御に基づいて所定の周波数を有する基準信号を生成する基準信号発生部と、
前記局部発振部で生成された前記周波数信号と前記基準信号発生部で生成された基準信号との位相の差を比較して出力する位相比較部と、
前記位相比較部からの出力に応じた電流を生成するチャージポンプ部と、
前記チャージポンプ部で生成された電流を増幅する直流アンプと、
前記直流アンプで増幅された電流を積分して直流電圧とし、前記直流電圧を前記局部発振部に供給するローパスフィルタとを備える
請求項2記載の受信装置。 - 前記制御部による前記PLL部のループゲインを下げる処理は、前記チャージポンプ部で生成する電流の上限値を下げること又は、前記DCアンプのゲインを下げることにより行う
請求項5記載の受信装置。 - 前記制御部による前記PLL部のループフィルタのカットオフ周波数を下げる処理は、前記ローパスフィルタのカットオフ周波数を下げることにより行う
請求項5記載の受信装置。 - 前記制御部は、前記受信部でのチャンネルの変更動作が完了した時点で、前記制御電圧を変化させる速度を遅くする制御を終了させる
請求項2記載の受信装置。 - 前記他の受信部で選局中のチャンネルを横切る場合とは、前記チャンネルの遷移時に、前記周波数制御電圧の値が、前記他の受信部に供給されている周波数制御電圧の値と同一になる場合である
請求項2記載の受信装置。 - 前記制御部は、前記チャージポンプ部の電流上限値を変更する場合に、前記電流上限値を設定しうる最低の値に設定する
請求項6記載の受信装置。 - 受信信号を少なくとも2つ以上の信号に分配された受信信号から、所望のチャンネルの信号を選択して中間周波信号又はベースバンド信号を得る受信処理と、
前記受信処理で前記中間周波数信号又はベースバンド信号を生成するために必要な周波数信号を生成する局部発振処理と、
前記周波数信号を帰還信号として、前記局部発振処理で発振する周波数を制御するための周波数制御電圧を生成するPLL処理と、
前記受信するチャンネルを変更する場合であり、前記分配された受信信号を受信する他の受信処理によって選局中のチャンネルを横切ることを検知した場合に、前記PLL処理で前記周波数制御電圧を変化させる速度を遅くする制御処理とを含む
受信方法。 - 受信信号を少なくとも2つ以上の信号に分配された受信信号から、所望のチャンネルの信号を選択して中間周波信号又はベースバンド信号を得る受信処理と、
前記受信処理で前記中間周波数信号又はベースバンド信号を生成するために必要な周波数信号を生成する局部発振処理と、
前記周波数信号を帰還信号として、前記局部発振処理で発振する周波数を制御するための周波数制御電圧を生成するPLL処理と、
前記受信するチャンネルを変更する場合であり、前記分配された受信信号を受信する他の受信処理によって選局中のチャンネルを横切ることを検知した場合に、前記PLL処理で前記周波数制御電圧を変化させる速度を遅くする制御処理とをコンピュータに実行させる
プログラム。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/057,502 US20110134337A1 (en) | 2008-08-11 | 2009-08-06 | Receiver apparatus, receivng method, and program |
EP09806672A EP2315363A1 (en) | 2008-08-11 | 2009-08-06 | Reception device, reception method, and program |
CN2009801312864A CN102119529A (zh) | 2008-08-11 | 2009-08-06 | 接收设备、接收方法以及程序 |
JP2010524714A JPWO2010018780A1 (ja) | 2008-08-11 | 2009-08-06 | 受信装置、受信方法及びプログラム |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008207430 | 2008-08-11 | ||
JP2008-207430 | 2008-08-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2010018780A1 true WO2010018780A1 (ja) | 2010-02-18 |
Family
ID=41668925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2009/063938 WO2010018780A1 (ja) | 2008-08-11 | 2009-08-06 | 受信装置、受信方法及びプログラム |
Country Status (7)
Country | Link |
---|---|
US (1) | US20110134337A1 (ja) |
EP (1) | EP2315363A1 (ja) |
JP (1) | JPWO2010018780A1 (ja) |
KR (1) | KR20110044751A (ja) |
CN (1) | CN102119529A (ja) |
TW (1) | TW201012214A (ja) |
WO (1) | WO2010018780A1 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8928820B2 (en) * | 2013-03-13 | 2015-01-06 | Silcon Laboratories Inc. | Television tuner to capture a cable spectrum |
US8885106B2 (en) | 2013-03-13 | 2014-11-11 | Silicon Laboratories Inc. | Multi-tuner using interpolative dividers |
JP6559078B2 (ja) * | 2016-02-11 | 2019-08-14 | アルパイン株式会社 | 受信装置 |
CN113098538B (zh) * | 2021-03-04 | 2022-07-26 | 河北晶禾电子技术股份有限公司 | 一种用于电源时序异常装置及其控制方法 |
US11901927B2 (en) * | 2022-02-18 | 2024-02-13 | National Instruments Corporation | Dynamic range extension of radio frequency signals using phasing of two or more IQ channels |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62109422A (ja) * | 1985-11-07 | 1987-05-20 | Toshiba Corp | 選局装置 |
JPH04140911A (ja) * | 1990-10-01 | 1992-05-14 | Alpine Electron Inc | Rds受信機の代替局高速サーチ方法 |
JPH06164433A (ja) * | 1992-11-16 | 1994-06-10 | Clarion Co Ltd | 巡回フィルタを用いたfm受信装置 |
JP2000350108A (ja) | 1999-06-04 | 2000-12-15 | Victor Co Of Japan Ltd | テレビジョン受信機 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5479449A (en) * | 1994-05-04 | 1995-12-26 | Samsung Electronics Co. Ltd. | Digital VSB detector with bandpass phase tracker, as for inclusion in an HDTV receiver. |
DE69631393T2 (de) * | 1995-03-29 | 2004-10-21 | Hitachi Ltd | Dekoder für komprimierte und multiplexierte Bild- und Audiodaten |
US6725463B1 (en) * | 1997-08-01 | 2004-04-20 | Microtune (Texas), L.P. | Dual mode tuner for co-existing digital and analog television signals |
DE19929178C2 (de) * | 1999-06-25 | 2002-10-24 | Infineon Technologies Ag | Phasenregelkreissystem |
US7203472B2 (en) * | 2002-03-15 | 2007-04-10 | Nokia Corporation | Method and apparatus providing calibration technique for RF performance tuning |
KR101022637B1 (ko) * | 2002-12-06 | 2011-03-22 | 톰슨 라이센싱 | 대기 모드에서 튜너 전력 손실 감소 |
US20040181813A1 (en) * | 2003-02-13 | 2004-09-16 | Takaaki Ota | Methods and systems for rapid channel change within a digital system |
CN101366189B (zh) * | 2006-01-04 | 2013-06-12 | 汤姆森许可贸易公司 | 信号电平控制设备及方法 |
EP1879376A3 (en) * | 2006-06-13 | 2011-04-06 | Samsung Electronics Co., Ltd. | Fast channel switching method and apparatus for digital broadcast receiver |
US7612618B2 (en) * | 2006-12-04 | 2009-11-03 | Electronics And Telecommunications Research Institute | PLL apparatus for OFDM system having variable channel bands and operating method thereof |
-
2009
- 2009-08-06 JP JP2010524714A patent/JPWO2010018780A1/ja not_active Abandoned
- 2009-08-06 KR KR1020117002648A patent/KR20110044751A/ko not_active Application Discontinuation
- 2009-08-06 EP EP09806672A patent/EP2315363A1/en not_active Withdrawn
- 2009-08-06 WO PCT/JP2009/063938 patent/WO2010018780A1/ja active Application Filing
- 2009-08-06 CN CN2009801312864A patent/CN102119529A/zh active Pending
- 2009-08-06 US US13/057,502 patent/US20110134337A1/en not_active Abandoned
- 2009-08-10 TW TW098126749A patent/TW201012214A/zh unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62109422A (ja) * | 1985-11-07 | 1987-05-20 | Toshiba Corp | 選局装置 |
JPH04140911A (ja) * | 1990-10-01 | 1992-05-14 | Alpine Electron Inc | Rds受信機の代替局高速サーチ方法 |
JPH06164433A (ja) * | 1992-11-16 | 1994-06-10 | Clarion Co Ltd | 巡回フィルタを用いたfm受信装置 |
JP2000350108A (ja) | 1999-06-04 | 2000-12-15 | Victor Co Of Japan Ltd | テレビジョン受信機 |
Also Published As
Publication number | Publication date |
---|---|
EP2315363A1 (en) | 2011-04-27 |
US20110134337A1 (en) | 2011-06-09 |
JPWO2010018780A1 (ja) | 2012-01-26 |
CN102119529A (zh) | 2011-07-06 |
TW201012214A (en) | 2010-03-16 |
KR20110044751A (ko) | 2011-04-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5956098A (en) | Digital broadcasting receiver | |
JP4244929B2 (ja) | 地上波ディジタルtv放送受信システム及びそれに適する地上波ディジタルtv放送受信装置 | |
WO2010018780A1 (ja) | 受信装置、受信方法及びプログラム | |
JP2006050585A (ja) | デジタル放送受信装置及び自動利得制御回路 | |
JP6379746B2 (ja) | 選局回路、受信装置 | |
WO2014199543A1 (ja) | テレビジョン受信装置およびテレビジョン受信方法 | |
JP2003318761A (ja) | 受信制御方法、受信制御装置、受信装置 | |
JP4557057B2 (ja) | 受信装置及び受信方法 | |
JP2010136137A (ja) | 受信装置および方法、並びにプログラム | |
US20080218637A1 (en) | Receiving apparatus, method of controlling apparatus, and program for implementing the method | |
EP1241879A1 (en) | High definition tv signal receiver | |
JP2017028480A (ja) | 受信装置 | |
JP2007251413A (ja) | 放送受信可能チャンネル確認方法及び装置 | |
JP2008177983A (ja) | デジタル放送受信装置 | |
US8619199B1 (en) | Method and apparatus for performing automatic gain control to track signal variations in a wireless communication signal | |
JP2012044313A (ja) | テレビジョン受像機 | |
JP4306091B2 (ja) | 信号受信装置および信号受信方法、並びに記録媒体 | |
JP5323230B1 (ja) | 電子機器、フィルタ調整装置、フィルタ調整方法、及びフィルタ調整プログラム | |
JP6128587B2 (ja) | 放送受信装置 | |
JP2005333198A (ja) | 地上波デジタル放送受信チューナ | |
KR101953618B1 (ko) | 다중 튜너 및 그 제어 방법 | |
KR100555909B1 (ko) | 디지털 재생 장치에서의 오디오 신호 출력 방법 | |
JP2008205762A (ja) | 受信装置、受信方法、およびプログラム、並びにテレビジョン受像機 | |
JPH05336458A (ja) | テレビジョン受信機およびテレビジョン受信チューナ | |
JP2002165147A (ja) | 受信装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200980131286.4 Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 09806672 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2010524714 Country of ref document: JP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2009806672 Country of ref document: EP |
|
ENP | Entry into the national phase |
Ref document number: 20117002648 Country of ref document: KR Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 13057502 Country of ref document: US Ref document number: 826/CHENP/2011 Country of ref document: IN |
|
NENP | Non-entry into the national phase |
Ref country code: DE |