WO2009075073A1 - 不揮発性記憶装置およびその製造方法 - Google Patents

不揮発性記憶装置およびその製造方法 Download PDF

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Publication number
WO2009075073A1
WO2009075073A1 PCT/JP2008/003551 JP2008003551W WO2009075073A1 WO 2009075073 A1 WO2009075073 A1 WO 2009075073A1 JP 2008003551 W JP2008003551 W JP 2008003551W WO 2009075073 A1 WO2009075073 A1 WO 2009075073A1
Authority
WO
WIPO (PCT)
Prior art keywords
resistance change
memory device
nonvolatile memory
wiring
method therefor
Prior art date
Application number
PCT/JP2008/003551
Other languages
English (en)
French (fr)
Inventor
Takumi Mikawa
Kenji Tominaga
Kazuhiko Shimakawa
Ryotaro Azuma
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to CN200880120121.2A priority Critical patent/CN101897024B/zh
Priority to US12/747,060 priority patent/US8198618B2/en
Priority to JP2009545334A priority patent/JP4598147B2/ja
Publication of WO2009075073A1 publication Critical patent/WO2009075073A1/ja

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/82—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays the switching components having a common active material layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx

Landscapes

  • Semiconductor Memories (AREA)

Abstract

　本発明の不揮発性記憶装置は、基板（１）と、第１の配線（３）と、第１のスルーホール（４）に埋め込み形成された第１の充填部（５）と、第１の配線（３）と直交しかつ第１の抵抗変化素子の抵抗変化層（６）、導電層（７）、第２の抵抗変化素子の抵抗変化層（８）をこの順に積層された複数層からなる第２の配線（１１）と、第２のスルーホール（１３）に埋め込み形成された第２の充填部（１４）と、第３の配線（１５）とを備え、第２の配線（１１）の導電層（７）は第１の抵抗変化素子（９）の電極の役割と第２の抵抗変化素子（１０）の電極の役割とを果たすことを特徴とするものである。
PCT/JP2008/003551 2007-12-10 2008-12-02 不揮発性記憶装置およびその製造方法 WO2009075073A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN200880120121.2A CN101897024B (zh) 2007-12-10 2008-12-02 非易失性存储装置及其制造方法
US12/747,060 US8198618B2 (en) 2007-12-10 2008-12-02 Nonvolatile memory device and manufacturing method thereof
JP2009545334A JP4598147B2 (ja) 2007-12-10 2008-12-02 不揮発性記憶装置およびその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007318133 2007-12-10
JP2007-318133 2007-12-19

Publications (1)

Publication Number Publication Date
WO2009075073A1 true WO2009075073A1 (ja) 2009-06-18

Family

ID=40755322

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/003551 WO2009075073A1 (ja) 2007-12-10 2008-12-02 不揮発性記憶装置およびその製造方法

Country Status (4)

Country Link
US (1) US8198618B2 (ja)
JP (1) JP4598147B2 (ja)
CN (1) CN101897024B (ja)
WO (1) WO2009075073A1 (ja)

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* Cited by examiner, † Cited by third party
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JP2009252974A (ja) * 2008-04-04 2009-10-29 Toshiba Corp 不揮発性半導体記憶装置とその製造方法
JP2017085103A (ja) * 2015-10-27 2017-05-18 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． メモリ素子及び半導体素子
WO2022102353A1 (ja) * 2020-11-10 2022-05-19 ソニーセミコンダクタソリューションズ株式会社 半導体装置
JP2022535516A (ja) * 2019-10-14 2022-08-09 長江存儲科技有限責任公司 ３次元相変化メモリデバイスを形成するための方法

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US8565003B2 (en) * 2011-06-28 2013-10-22 Unity Semiconductor Corporation Multilayer cross-point memory array having reduced disturb susceptibility
US20130082232A1 (en) 2011-09-30 2013-04-04 Unity Semiconductor Corporation Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells
JP4611443B2 (ja) * 2007-11-29 2011-01-12 パナソニック株式会社 不揮発性記憶装置およびその製造方法
JP2009224610A (ja) * 2008-03-17 2009-10-01 Toshiba Corp 半導体記憶装置
KR101097433B1 (ko) * 2009-06-02 2011-12-23 주식회사 하이닉스반도체 상변화 메모리 장치 및 그 제조 방법
JP5684104B2 (ja) 2011-12-27 2015-03-11 株式会社東芝 メタルブリッジ型記憶装置の製造方法
JP2014082279A (ja) * 2012-10-15 2014-05-08 Panasonic Corp 不揮発性記憶装置及びその製造方法
US9691981B2 (en) 2013-05-22 2017-06-27 Micron Technology, Inc. Memory cell structures
US8975610B1 (en) 2013-12-23 2015-03-10 Intermolecular, Inc. Silicon based selector element
US9679945B2 (en) * 2015-09-04 2017-06-13 Kabushiki Kaisha Toshiba Semiconductor memory device and method for manufacturing the same
US9553132B1 (en) 2015-09-09 2017-01-24 Kabushiki Kaisha Toshiba Semiconductor memory device
KR102471157B1 (ko) * 2017-11-09 2022-11-25 삼성전자주식회사 메모리 소자
KR102706732B1 (ko) * 2019-04-08 2024-09-19 에스케이하이닉스 주식회사 전자 장치 및 그 제조 방법
US10957741B2 (en) 2019-05-01 2021-03-23 Micron Technology, Inc. Multitier arrangements of integrated devices, and methods of forming sense/access lines
US11410714B2 (en) * 2019-09-16 2022-08-09 Taiwan Semiconductor Manufacturing Co., Ltd. Magnetoresistive memory device and manufacturing method thereof

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JP2004031914A (ja) * 2002-03-14 2004-01-29 Hewlett Packard Co <Hp> 共通の導線を共有する一対の磁気ビットを有するメモリ素子アレイ
JP2005522045A (ja) * 2002-04-04 2005-07-21 株式会社東芝 相変化メモリ装置
WO2004027877A1 (ja) * 2002-09-19 2004-04-01 Sharp Kabushiki Kaisha 抵抗変化機能体およびその製造方法
JP2006514393A (ja) * 2003-03-18 2006-04-27 株式会社東芝 プログラマブル抵抗メモリ装置
JP2006237605A (ja) * 2005-02-24 2006-09-07 Samsung Electronics Co Ltd セルダイオードを採用する相変移記憶素子及びその製造方法
JP2006279042A (ja) * 2005-03-28 2006-10-12 Samsung Electronics Co Ltd 抵抗メモリセル、その形成方法及びこれを利用した抵抗メモリ配列
WO2007102341A1 (ja) * 2006-03-09 2007-09-13 Matsushita Electric Industrial Co., Ltd. 抵抗変化型素子、半導体装置、およびその製造方法
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009252974A (ja) * 2008-04-04 2009-10-29 Toshiba Corp 不揮発性半導体記憶装置とその製造方法
JP2017085103A (ja) * 2015-10-27 2017-05-18 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． メモリ素子及び半導体素子
JP2022535516A (ja) * 2019-10-14 2022-08-09 長江存儲科技有限責任公司 ３次元相変化メモリデバイスを形成するための方法
JP7394881B2 (ja) 2019-10-14 2023-12-08 長江存儲科技有限責任公司 ３次元相変化メモリデバイスを形成するための方法
WO2022102353A1 (ja) * 2020-11-10 2022-05-19 ソニーセミコンダクタソリューションズ株式会社 半導体装置

Also Published As

Publication number Publication date
US8198618B2 (en) 2012-06-12
US20100264393A1 (en) 2010-10-21
JP4598147B2 (ja) 2010-12-15
CN101897024A (zh) 2010-11-24
JPWO2009075073A1 (ja) 2011-04-28
CN101897024B (zh) 2012-07-04

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