WO2008059643A1 - Appareil de circuit électronique tridimensionnel - Google Patents

Appareil de circuit électronique tridimensionnel Download PDF

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Publication number
WO2008059643A1
WO2008059643A1 PCT/JP2007/065508 JP2007065508W WO2008059643A1 WO 2008059643 A1 WO2008059643 A1 WO 2008059643A1 JP 2007065508 W JP2007065508 W JP 2007065508W WO 2008059643 A1 WO2008059643 A1 WO 2008059643A1
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WO
WIPO (PCT)
Prior art keywords
circuit board
electrode
shield case
dimensional electronic
electronic circuit
Prior art date
Application number
PCT/JP2007/065508
Other languages
English (en)
Japanese (ja)
Inventor
Masato Mori
Yoshihiko Yagi
Daisuke Sakurai
Koichi Nagai
Shoichi Kajiwara
Haneo Iwamoto
Yoko Kasai
Osamu Uchida
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to JP2008544084A priority Critical patent/JP5247461B2/ja
Publication of WO2008059643A1 publication Critical patent/WO2008059643A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00—Screening of apparatus or components against electric or magnetic fields
    • H05K9/0007—Casings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00—Screening of apparatus or components against electric or magnetic fields
    • H05K9/0007—Casings
    • H05K9/002—Casings with localised screening
    • H05K9/0039—Galvanic coupling of ground layer on printed circuit board [PCB] to conductive casing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10371—Shields or metal cases
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof

Definitions

  • the present invention relates to a shield structure in a three-dimensional electronic circuit device configured by mounting a functional module mounted with electronic components on a base circuit board.
  • Patent Document 1 In order to improve this problem, three-dimensional electronic circuit devices disclosed in Patent Document 1, Patent Document 2, and the like are known.
  • a three-dimensional electronic circuit device is configured by laminating a second substrate 32 on a first substrate 31 via a bonding member 30.
  • a shield body 33 is provided on the outer peripheral wall surface of the bonding member 30.
  • the electronic circuit portion 34 connected between the first substrate 31 and the second substrate 32 is electrically noised by the shield body 33. Shielded from.
  • the joining member 30 of Patent Document 1 is configured by fixing and holding a predetermined shape of lead terminals such as a plurality of panel elastic metal thin plates in an insulating housing in a predetermined arrangement configuration.
  • Patent Document 2 discloses a three-dimensional electronic circuit device having a shield structure as shown in FIG. This consists of a substrate 36 with electronic components 35 mounted on the top surface and an electronic circuit on the bottom surface.
  • the board 41 having the shield patterns 39 and 40 is sandwiched between the board 36 and the board 38, and the interlayer wiring members 42, 42, 43, and 43 It is a three-dimensional electronic circuit device that is air bonded. As a result, the electronic components 35 and 37 are shielded by the shield patterns 39 and 40.
  • Patent Document 1 JP 2005-333046 A
  • Patent Document 2 Japanese Patent Laid-Open No. 2001-111232
  • the electronic components 35 and 37 between the substrate 36 and the substrate 38 can be shielded from electrical noise.
  • the interlayer wiring members 46 and 47 and the shield patterns 48 and 49 as shown by the virtual line are used. It is necessary to add a substrate 50 having a wiring, and a space for arranging the interlayer wiring members 46, 47 is provided on the upper surface of the substrate 38, and the wiring for connecting the interlayer wiring members 46, 47 to a reference potential or the like is provided. It is necessary to provide a pattern on the upper surface of the substrate 38.
  • the present invention provides an electronic component mounted on the upper surface of the uppermost substrate of a three-dimensional electronic circuit device.
  • An object of the present invention is to provide a three-dimensional electronic circuit device which can be shielded without providing a wiring pattern or the like connected to a reference potential on the upper surface of the uppermost substrate and which can achieve both an electrical noise shielding effect and downsizing.
  • the three-dimensional electronic circuit device includes a first circuit board and a second circuit board stacked via a relay board, and the first electrode formed on the relay board.
  • the first circuit board and the second circuit board Connected to the reference potential on the outer surface of the relay substrate in the state of being interposed between the plates
  • a second electrode is provided, and a space between the first circuit board and the second circuit board is shielded by the second electrode, and the first circuit board of the second circuit board and
  • the shield case is provided so as to cover at least a part of the surface opposite to the opposite surface, and electrically connected to the second electrode.
  • the three-dimensional electronic circuit device according to claim 2 of the present invention is characterized in that, in claim 1, the shield case is electrically connected by contacting the second electrode.
  • the three-dimensional electronic circuit device according to claim 3 of the present invention is characterized in that, in claim 1, the shield case is electrically connected to the second electrode by soldering or brazing.
  • a three-dimensional electronic circuit device is characterized in that, in the first aspect, the shield case is formed of a conductive metal.
  • the three-dimensional electronic circuit device according to claim 5 of the present invention is the stereoscopic electronic circuit device according to claim 1, wherein the shield case is formed of a metal layer on a case main body made of an insulating resin, and the conductive layer is the first layer. It is electrically connected to the two electrodes.
  • a three-dimensional electronic circuit device is the three-dimensional electronic circuit device according to the first aspect, wherein the shield case passes through a notch formed in an outer peripheral portion of the second circuit board.
  • the three-dimensional electronic circuit device according to claim 7 of the present invention is characterized in that, in claim 1, an electronic component is mounted inside the shield case.
  • the second electrode provided on the outer surface of the relay substrate can shield the space between the first circuit board and the second circuit board, and the second electrode A shield case that is electrically connected to the electrode and covers at least part of the surface of the second circuit board opposite to the surface facing the first circuit board provides a reference potential or the like on the upper surface of the second circuit board. It can be shielded without providing a wiring pattern to connect.
  • FIG. 1 is a cross-sectional view of a three-dimensional electronic circuit device according to a first embodiment of the present invention.
  • Figure 2 Exploded view of the same embodiment
  • FIG. 4 is an external perspective view of Embodiment 2 of the three-dimensional electronic circuit device of the present invention.
  • FIG. 5 is a cross-sectional view of the same embodiment
  • FIG. 7 is a sectional view of a three-dimensional electronic circuit device according to a third embodiment of the present invention.
  • FIG. 9 is a sectional view of a three-dimensional electronic circuit device according to a fourth embodiment of the present invention.
  • FIG. 10 is an exploded view of a three-dimensional electronic circuit device according to a fifth embodiment of the present invention.
  • FIG. 12 is a cross-sectional view of the shield case in Embodiment 6 of the three-dimensional electronic circuit device of the present invention.
  • FIG. 13 is a sectional view of a conventional three-dimensional electronic circuit device.
  • FIG. 14 is a sectional view of another conventional three-dimensional electronic circuit device.
  • a first circuit board 101 and a second circuit board 102 are laminated via a relay substrate 100, and the first electrode 1 formed on the relay substrate 100 is interposed therebetween.
  • the circuit pattern on the first circuit board 101 side is connected to the circuit pattern on the second circuit board 102 side.
  • the first and second circuit boards 101 and 102 are, for example, glass epoxy resin or ceramic multilayer circuit boards.
  • Electronic components 3, 4, and 5 are mounted on the circuit pattern on the first circuit board 101 side.
  • Electronic components 6, 7, 8, and 9 are mounted on the circuit pattern on the second circuit board 102 side.
  • the relay substrate 100 has a frame shape on each side, and also as shown in FIG. 1 is formed. Electrode patterns 10 and 11 corresponding to the first electrode 1 are also formed on the upper surface of the first circuit board 101 and the lower surface of the second circuit board 102.
  • the relay board 100 is soldered to the first circuit board 101, and the electronic components 6, 7, 8, 8, are attached to the relay board 100 thus attached.
  • the second circuit board 102 on which 9 is mounted is soldered as shown in FIG.
  • a second electrode 2 is formed on the outer peripheral surface 100e of each side of the relay substrate 100. In a state where the relay board 100 is mounted on the first circuit board 101, the second electrode 2 is connected to the ground pattern that is the reference potential in the first circuit board 101 through the electrode pattern 10. Yes.
  • the shield case 12 made of a conductive metal is placed on the second circuit board 102 while being deformed by inertia as shown by a solid line in FIG. 3B, and the bent piece 12a of the shield case 12 is attached. The assembly is completed by soldering to the second electrode 2.
  • the electronic components 3 to 7 provided in the space between the first circuit board 101 and the second circuit board 102 are shielded by the second electrode 2, and the second circuit board
  • the electronic parts 8 and 9 mounted on the upper surface of 102 can be shielded by the shield case 12.
  • the shield case 12 is not connected to the wiring pattern on the second circuit board 102, but is soldered and shielded to the second electrode 2 provided on the side surface of the relay board 100. Therefore, it is not necessary to form a wiring pattern for connecting the shield case on the second circuit board 102, and the mounting area on the second circuit board 102 is reduced, and accordingly, the second circuit board 102 is reduced. Can be reduced.
  • the mounting area can be reduced by about 20%, and the three-dimensional electronic circuit device can be reduced in size. Realize.
  • the shield case 12 of the first embodiment passes the outside of the edge of the second circuit board 102, and the force that the bent piece 12a of the shield case 12 is soldered to the second electrode 2
  • a notch 102a is formed on the outer periphery of the second circuit board 102, and the bent piece 12a of the shield case 12 passes through the notch 102a and is soldered to the second electrode 2. Only the points attached are different from the first embodiment, and the others are the same.
  • the second circuit board 102 since the second circuit board 102 has a square outer shape, the notch 102a having the thickness of the shield case 12 is formed on the second circuit board 102. The projected area of the three-dimensional electronic circuit device can be further reduced.
  • a first circuit board 101 and a second circuit board 102 are laminated via a relay substrate 100, and the first electrode 1 formed on the relay substrate 100 is interposed therebetween.
  • the circuit pattern on the first circuit board 101 side is connected to the circuit pattern on the second circuit board 102 side.
  • the first and second circuit boards 101 and 102 are, for example, glass epoxy resin or ceramic multilayer circuit boards.
  • the electronic component 13 and 14 force mounted inside the shield case 12 covering the upper surface of the second circuit board 102 is connected to the wiring pattern of the second circuit board 102 via the relay board 15. It is connected.
  • the relay substrates 100 and 15 are frame-shaped, and the first electrodes 1 are formed on each side at a predetermined pitch from the upper surface to the lower surface through the inner peripheral surface.
  • the upper surface of the first circuit board 101 and the lower surface of the second circuit board 102 are also electrically connected to the first electrode 1 of the relay board 100.
  • Polar patterns 10 and 11 are formed.
  • An electrode pattern 16 corresponding to the first electrode 1 of the relay board 15 is also formed on the upper surface of the second circuit board 102.
  • the second electrode 2 is formed as in the first embodiment.
  • the electrode pattern 16 and the wiring pattern 18 are formed on the inner surface of the shield case 12 made of a conductive metal via the insulating layer 17. Then, as shown in FIG. 8B, the electronic components 13 and 14 and the relay substrate 15 are soldered.
  • the shield case 12 is indicated by a solid line with respect to the first and second circuit boards 101 and 102 that have been stacked via the relay board 100.
  • the force that does not cause elastic deformation 3 ⁇ 4 The electronic components 13, 14 mounted on the inner surface of the shield case 12 and the circuit pattern of the second circuit board 102 are connected via the relay board 15 by covering the second circuit board 102. Further, the assembly is completed by electrically connecting and soldering the bent piece 12a of the shield case 12 to the second electrode 2 of the relay substrate 100.
  • the shield case 12 By mounting in the shield case 12 as described above, it is possible to achieve higher mounting than in the first embodiment.
  • the space between the first and second circuit boards 101 and 102 can be shielded by the second electrode 2 of the relay board 100, and the second circuit board 102 can be shielded by the shield case 12. It is possible to shield electronic components mounted on the upper surface of the shield and the inner surface of the shield case 12.
  • the shield case 12 is preferably a three-dimensional wiring member using MID (Molded Interconnect Device).
  • FIG. 9 shows a fourth embodiment of the present invention.
  • the assembly is completed by soldering the bent piece 12a of the shield case 12 to the second electrode 2.
  • the bent piece 12a of the shield case 12 is the second piece. The only difference is that it is not soldered by applying elasticity so that it is pressed against the electrode 2.
  • This Embodiment 4 can be similarly implemented in Embodiment 2 and Embodiment 3.
  • FIG. 10, FIG. 11 (a) and FIG. 11 (b) show Embodiment 5 of the present invention.
  • the force in which the relay board 100 is a frame type in the first embodiment is different from the fifth embodiment only in that two pillar-shaped ones are used.
  • a second electrode 2 is formed on each outer side surface.
  • the columnar relay boards 19a and 19b are attached to the first circuit board 101, and the second circuit board 102 is attached to the first circuit board 101 via the relay boards 19a and 19b.
  • the bent piece 12a of the shield case 12 is soldered to the second electrode 2 through the state shown in FIG.
  • FIG. 12 shows a sixth embodiment of the present invention.
  • the shield case 12 is made of a conductive metal. As shown in Fig. 12, a metal is placed outside the insulating shield case body 20 made of synthetic resin or the like.
  • the conductive layer 21 is formed by soldering, and the conductive layer 21 formed on the bent piece 20a of the shield case body 20 is soldered to the second electrode 2 or the bent piece 20a of the shield case 20 as in the fourth embodiment. Assembling is completed by applying elasticity so that the conductive layer 21 formed on is pressed against the second electrode 2.
  • the force that forms the conductive layer 21 only on the outside of the insulating shield case body 20 the conductive layer 21 is provided on the outside and inside of the insulating shield case body 20. It can also be formed and configured.
  • the wiring pattern is formed on the conductive layer 21 formed inside the shield case body 20 via an insulating layer. And the electronic components 13 and 14 and the relay board 15 are mounted.
  • the electrical connection method between the shield case 12 and the second electrode 2 is performed by soldering or by pressing the bent piece 12a of the shield case 12 with elasticity. Connected force S, contact by fitting, by brazing Contact, contact structure via conductive resin is acceptable.
  • the shield case 12 is attached so as to cover only the electronic component to be shielded or the vicinity thereof, which is attached so as to cover the entire upper surface of the second circuit board 102.
  • the shield case 12 is attached so as to cover at least part of the surface of the second circuit board 102 opposite to the surface facing the first circuit board 101, and is electrically connected to the second electrode 2. Being done! /, If you can! /
  • the three-dimensional circuit device of the present invention has a structure that reduces the shielding effect and mounting area of an electronic circuit, and can be applied to the use of a functional module such as a communication module.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

L'invention concerne un appareil de circuit électronique tridimensionnel dans lequel des première et seconde cartes de circuits imprimés sont empilées sur des cartes de relais ayant une structure capable de blinder et en outre de miniaturiser des composants électroniques montés sur la surface supérieure de la carte la plus au-dessus. Les composants électroniques disposés entre les première et seconde cartes de circuits imprimés (101, 102) sont électriquement blindés par une seconde électrode (2) formée sur la surface latérale d'une carte de relais (100) et les composants électroniques connectés électriquement à la seconde carte de circuits imprimés (102) sont blindés vis-à-vis d'un bruit électrique par un boîtier de blindage (12) électriquement connecté à la seconde électrode (2).
PCT/JP2007/065508 2006-11-16 2007-08-08 Appareil de circuit électronique tridimensionnel WO2008059643A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008544084A JP5247461B2 (ja) 2006-11-16 2007-08-08 立体的電子回路装置

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JP2006-309751 2006-11-16
JP2006309751 2006-11-16

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WO2008059643A1 true WO2008059643A1 (fr) 2008-05-22

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JP (1) JP5247461B2 (fr)
WO (1) WO2008059643A1 (fr)

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WO2014085558A1 (fr) * 2012-11-28 2014-06-05 Robert Bosch Gmbh Entretoise mécanique à connexions électriques sans ressort pour un ensemble à cartes de circuits imprimés multiples
WO2014164186A1 (fr) * 2013-03-11 2014-10-09 Qualcomm Incorporated Enveloppe de protection contre des interférences électromagnétiques pour boîtiers de circuits intégrés multipuce radiofréquence
US20150022978A1 (en) * 2013-07-19 2015-01-22 Motorola Mobility Llc Circuit Assembly and Corresponding Methods
US20150022986A1 (en) * 2013-07-19 2015-01-22 Motorola Mobility Llc Circuit Assembly and Corresponding Methods
CN105451441A (zh) * 2014-08-12 2016-03-30 国基电子（上海）有限公司 电子装置
CN106252339A (zh) * 2016-08-11 2016-12-21 国网辽宁省电力有限公司电力科学研究院 一种高密度射频多芯片封装结构
EP2464206A3 (fr) * 2010-12-10 2018-01-03 LG Electronics Inc. Terminal mobile
JP2021068876A (ja) * 2019-10-28 2021-04-30 Ｎｅｃスペーステクノロジー株式会社 モジュール構造
WO2021210788A1 (fr) * 2020-04-17 2021-10-21 삼성전자 주식회사 Dispositif électronique comprenant un boîtier de blindage
EP4243583A4 (fr) * 2020-12-24 2024-04-17 Samsung Electronics Co Ltd Dispositif électronique comprenant structure de dissipation de chaleur

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JP5699342B2 (ja) * 2013-02-28 2015-04-08 大日本印刷株式会社 電子モジュール、電子モジュールの製造方法

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JPH0745982A (ja) * 1993-07-28 1995-02-14 Toshiba Corp シールドケースとプリント配線板との接続構造
JPH07212060A (ja) * 1994-01-12 1995-08-11 Matsushita Electric Ind Co Ltd 回路モジュール
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Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2464206A3 (fr) * 2010-12-10 2018-01-03 LG Electronics Inc. Terminal mobile
WO2014085558A1 (fr) * 2012-11-28 2014-06-05 Robert Bosch Gmbh Entretoise mécanique à connexions électriques sans ressort pour un ensemble à cartes de circuits imprimés multiples
US9515398B2 (en) 2012-11-28 2016-12-06 Robert Bosch Gmbh Mechanical spacer with non-spring electrical connections for a multiple printed circuit board assembly
JP2016514368A (ja) * 2013-03-11 2016-05-19 クアルコム，インコーポレイテッド 無線周波マルチチップ集積回路パッケージ用の電磁妨害筐体
JP2017143313A (ja) * 2013-03-11 2017-08-17 クアルコム，インコーポレイテッド 無線周波マルチチップ集積回路パッケージ用の電磁妨害筐体
KR20150121244A (ko) * 2013-03-11 2015-10-28 퀄컴 인코포레이티드 무선 주파수 멀티-칩 집적 회로 패키지들을 위한 전자기 간섭 인클로저
CN105074917A (zh) * 2013-03-11 2015-11-18 高通股份有限公司 用于射频多芯片集成电路封装的电磁干扰外壳
WO2014164186A1 (fr) * 2013-03-11 2014-10-09 Qualcomm Incorporated Enveloppe de protection contre des interférences électromagnétiques pour boîtiers de circuits intégrés multipuce radiofréquence
US8987872B2 (en) 2013-03-11 2015-03-24 Qualcomm Incorporated Electromagnetic interference enclosure for radio frequency multi-chip integrated circuit packages
KR101657622B1 (ko) 2013-03-11 2016-09-30 퀄컴 인코포레이티드 전자기 간섭 인클로저를 갖는 무선 주파수 멀티-칩 집적 회로 패키지 및 패키지를 제조하기 위한 방법
US9363892B2 (en) * 2013-07-19 2016-06-07 Google Technology Holdings LLC Circuit assembly and corresponding methods
US20150022978A1 (en) * 2013-07-19 2015-01-22 Motorola Mobility Llc Circuit Assembly and Corresponding Methods
US20150022986A1 (en) * 2013-07-19 2015-01-22 Motorola Mobility Llc Circuit Assembly and Corresponding Methods
CN105451441A (zh) * 2014-08-12 2016-03-30 国基电子（上海）有限公司 电子装置
CN106252339A (zh) * 2016-08-11 2016-12-21 国网辽宁省电力有限公司电力科学研究院 一种高密度射频多芯片封装结构
JP2021068876A (ja) * 2019-10-28 2021-04-30 Ｎｅｃスペーステクノロジー株式会社 モジュール構造
WO2021210788A1 (fr) * 2020-04-17 2021-10-21 삼성전자 주식회사 Dispositif électronique comprenant un boîtier de blindage
EP4243583A4 (fr) * 2020-12-24 2024-04-17 Samsung Electronics Co Ltd Dispositif électronique comprenant structure de dissipation de chaleur

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