WO2008059643A1 - Three-dimensional electronic circuit apparatus - Google Patents

Three-dimensional electronic circuit apparatus Download PDF

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Publication number
WO2008059643A1
WO2008059643A1 PCT/JP2007/065508 JP2007065508W WO2008059643A1 WO 2008059643 A1 WO2008059643 A1 WO 2008059643A1 JP 2007065508 W JP2007065508 W JP 2007065508W WO 2008059643 A1 WO2008059643 A1 WO 2008059643A1
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WO
WIPO (PCT)
Prior art keywords
circuit board
electrode
shield case
dimensional electronic
electronic circuit
Prior art date
Application number
PCT/JP2007/065508
Other languages
French (fr)
Japanese (ja)
Inventor
Masato Mori
Yoshihiko Yagi
Daisuke Sakurai
Koichi Nagai
Shoichi Kajiwara
Haneo Iwamoto
Yoko Kasai
Osamu Uchida
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to JP2008544084A priority Critical patent/JP5247461B2/en
Publication of WO2008059643A1 publication Critical patent/WO2008059643A1/en

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00—Screening of apparatus or components against electric or magnetic fields
    • H05K9/0007—Casings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00—Screening of apparatus or components against electric or magnetic fields
    • H05K9/0007—Casings
    • H05K9/002—Casings with localised screening
    • H05K9/0039—Galvanic coupling of ground layer on printed circuit board [PCB] to conductive casing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10371—Shields or metal cases
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof

Definitions

  • the present invention relates to a shield structure in a three-dimensional electronic circuit device configured by mounting a functional module mounted with electronic components on a base circuit board.
  • Patent Document 1 In order to improve this problem, three-dimensional electronic circuit devices disclosed in Patent Document 1, Patent Document 2, and the like are known.
  • a three-dimensional electronic circuit device is configured by laminating a second substrate 32 on a first substrate 31 via a bonding member 30.
  • a shield body 33 is provided on the outer peripheral wall surface of the bonding member 30.
  • the electronic circuit portion 34 connected between the first substrate 31 and the second substrate 32 is electrically noised by the shield body 33. Shielded from.
  • the joining member 30 of Patent Document 1 is configured by fixing and holding a predetermined shape of lead terminals such as a plurality of panel elastic metal thin plates in an insulating housing in a predetermined arrangement configuration.
  • Patent Document 2 discloses a three-dimensional electronic circuit device having a shield structure as shown in FIG. This consists of a substrate 36 with electronic components 35 mounted on the top surface and an electronic circuit on the bottom surface.
  • the board 41 having the shield patterns 39 and 40 is sandwiched between the board 36 and the board 38, and the interlayer wiring members 42, 42, 43, and 43 It is a three-dimensional electronic circuit device that is air bonded. As a result, the electronic components 35 and 37 are shielded by the shield patterns 39 and 40.
  • Patent Document 1 JP 2005-333046 A
  • Patent Document 2 Japanese Patent Laid-Open No. 2001-111232
  • the electronic components 35 and 37 between the substrate 36 and the substrate 38 can be shielded from electrical noise.
  • the interlayer wiring members 46 and 47 and the shield patterns 48 and 49 as shown by the virtual line are used. It is necessary to add a substrate 50 having a wiring, and a space for arranging the interlayer wiring members 46, 47 is provided on the upper surface of the substrate 38, and the wiring for connecting the interlayer wiring members 46, 47 to a reference potential or the like is provided. It is necessary to provide a pattern on the upper surface of the substrate 38.
  • the present invention provides an electronic component mounted on the upper surface of the uppermost substrate of a three-dimensional electronic circuit device.
  • An object of the present invention is to provide a three-dimensional electronic circuit device which can be shielded without providing a wiring pattern or the like connected to a reference potential on the upper surface of the uppermost substrate and which can achieve both an electrical noise shielding effect and downsizing.
  • the three-dimensional electronic circuit device includes a first circuit board and a second circuit board stacked via a relay board, and the first electrode formed on the relay board.
  • the first circuit board and the second circuit board Connected to the reference potential on the outer surface of the relay substrate in the state of being interposed between the plates
  • a second electrode is provided, and a space between the first circuit board and the second circuit board is shielded by the second electrode, and the first circuit board of the second circuit board and
  • the shield case is provided so as to cover at least a part of the surface opposite to the opposite surface, and electrically connected to the second electrode.
  • the three-dimensional electronic circuit device according to claim 2 of the present invention is characterized in that, in claim 1, the shield case is electrically connected by contacting the second electrode.
  • the three-dimensional electronic circuit device according to claim 3 of the present invention is characterized in that, in claim 1, the shield case is electrically connected to the second electrode by soldering or brazing.
  • a three-dimensional electronic circuit device is characterized in that, in the first aspect, the shield case is formed of a conductive metal.
  • the three-dimensional electronic circuit device according to claim 5 of the present invention is the stereoscopic electronic circuit device according to claim 1, wherein the shield case is formed of a metal layer on a case main body made of an insulating resin, and the conductive layer is the first layer. It is electrically connected to the two electrodes.
  • a three-dimensional electronic circuit device is the three-dimensional electronic circuit device according to the first aspect, wherein the shield case passes through a notch formed in an outer peripheral portion of the second circuit board.
  • the three-dimensional electronic circuit device according to claim 7 of the present invention is characterized in that, in claim 1, an electronic component is mounted inside the shield case.
  • the second electrode provided on the outer surface of the relay substrate can shield the space between the first circuit board and the second circuit board, and the second electrode A shield case that is electrically connected to the electrode and covers at least part of the surface of the second circuit board opposite to the surface facing the first circuit board provides a reference potential or the like on the upper surface of the second circuit board. It can be shielded without providing a wiring pattern to connect.
  • FIG. 1 is a cross-sectional view of a three-dimensional electronic circuit device according to a first embodiment of the present invention.
  • Figure 2 Exploded view of the same embodiment
  • FIG. 4 is an external perspective view of Embodiment 2 of the three-dimensional electronic circuit device of the present invention.
  • FIG. 5 is a cross-sectional view of the same embodiment
  • FIG. 7 is a sectional view of a three-dimensional electronic circuit device according to a third embodiment of the present invention.
  • FIG. 9 is a sectional view of a three-dimensional electronic circuit device according to a fourth embodiment of the present invention.
  • FIG. 10 is an exploded view of a three-dimensional electronic circuit device according to a fifth embodiment of the present invention.
  • FIG. 12 is a cross-sectional view of the shield case in Embodiment 6 of the three-dimensional electronic circuit device of the present invention.
  • FIG. 13 is a sectional view of a conventional three-dimensional electronic circuit device.
  • FIG. 14 is a sectional view of another conventional three-dimensional electronic circuit device.
  • a first circuit board 101 and a second circuit board 102 are laminated via a relay substrate 100, and the first electrode 1 formed on the relay substrate 100 is interposed therebetween.
  • the circuit pattern on the first circuit board 101 side is connected to the circuit pattern on the second circuit board 102 side.
  • the first and second circuit boards 101 and 102 are, for example, glass epoxy resin or ceramic multilayer circuit boards.
  • Electronic components 3, 4, and 5 are mounted on the circuit pattern on the first circuit board 101 side.
  • Electronic components 6, 7, 8, and 9 are mounted on the circuit pattern on the second circuit board 102 side.
  • the relay substrate 100 has a frame shape on each side, and also as shown in FIG. 1 is formed. Electrode patterns 10 and 11 corresponding to the first electrode 1 are also formed on the upper surface of the first circuit board 101 and the lower surface of the second circuit board 102.
  • the relay board 100 is soldered to the first circuit board 101, and the electronic components 6, 7, 8, 8, are attached to the relay board 100 thus attached.
  • the second circuit board 102 on which 9 is mounted is soldered as shown in FIG.
  • a second electrode 2 is formed on the outer peripheral surface 100e of each side of the relay substrate 100. In a state where the relay board 100 is mounted on the first circuit board 101, the second electrode 2 is connected to the ground pattern that is the reference potential in the first circuit board 101 through the electrode pattern 10. Yes.
  • the shield case 12 made of a conductive metal is placed on the second circuit board 102 while being deformed by inertia as shown by a solid line in FIG. 3B, and the bent piece 12a of the shield case 12 is attached. The assembly is completed by soldering to the second electrode 2.
  • the electronic components 3 to 7 provided in the space between the first circuit board 101 and the second circuit board 102 are shielded by the second electrode 2, and the second circuit board
  • the electronic parts 8 and 9 mounted on the upper surface of 102 can be shielded by the shield case 12.
  • the shield case 12 is not connected to the wiring pattern on the second circuit board 102, but is soldered and shielded to the second electrode 2 provided on the side surface of the relay board 100. Therefore, it is not necessary to form a wiring pattern for connecting the shield case on the second circuit board 102, and the mounting area on the second circuit board 102 is reduced, and accordingly, the second circuit board 102 is reduced. Can be reduced.
  • the mounting area can be reduced by about 20%, and the three-dimensional electronic circuit device can be reduced in size. Realize.
  • the shield case 12 of the first embodiment passes the outside of the edge of the second circuit board 102, and the force that the bent piece 12a of the shield case 12 is soldered to the second electrode 2
  • a notch 102a is formed on the outer periphery of the second circuit board 102, and the bent piece 12a of the shield case 12 passes through the notch 102a and is soldered to the second electrode 2. Only the points attached are different from the first embodiment, and the others are the same.
  • the second circuit board 102 since the second circuit board 102 has a square outer shape, the notch 102a having the thickness of the shield case 12 is formed on the second circuit board 102. The projected area of the three-dimensional electronic circuit device can be further reduced.
  • a first circuit board 101 and a second circuit board 102 are laminated via a relay substrate 100, and the first electrode 1 formed on the relay substrate 100 is interposed therebetween.
  • the circuit pattern on the first circuit board 101 side is connected to the circuit pattern on the second circuit board 102 side.
  • the first and second circuit boards 101 and 102 are, for example, glass epoxy resin or ceramic multilayer circuit boards.
  • the electronic component 13 and 14 force mounted inside the shield case 12 covering the upper surface of the second circuit board 102 is connected to the wiring pattern of the second circuit board 102 via the relay board 15. It is connected.
  • the relay substrates 100 and 15 are frame-shaped, and the first electrodes 1 are formed on each side at a predetermined pitch from the upper surface to the lower surface through the inner peripheral surface.
  • the upper surface of the first circuit board 101 and the lower surface of the second circuit board 102 are also electrically connected to the first electrode 1 of the relay board 100.
  • Polar patterns 10 and 11 are formed.
  • An electrode pattern 16 corresponding to the first electrode 1 of the relay board 15 is also formed on the upper surface of the second circuit board 102.
  • the second electrode 2 is formed as in the first embodiment.
  • the electrode pattern 16 and the wiring pattern 18 are formed on the inner surface of the shield case 12 made of a conductive metal via the insulating layer 17. Then, as shown in FIG. 8B, the electronic components 13 and 14 and the relay substrate 15 are soldered.
  • the shield case 12 is indicated by a solid line with respect to the first and second circuit boards 101 and 102 that have been stacked via the relay board 100.
  • the force that does not cause elastic deformation 3 ⁇ 4 The electronic components 13, 14 mounted on the inner surface of the shield case 12 and the circuit pattern of the second circuit board 102 are connected via the relay board 15 by covering the second circuit board 102. Further, the assembly is completed by electrically connecting and soldering the bent piece 12a of the shield case 12 to the second electrode 2 of the relay substrate 100.
  • the shield case 12 By mounting in the shield case 12 as described above, it is possible to achieve higher mounting than in the first embodiment.
  • the space between the first and second circuit boards 101 and 102 can be shielded by the second electrode 2 of the relay board 100, and the second circuit board 102 can be shielded by the shield case 12. It is possible to shield electronic components mounted on the upper surface of the shield and the inner surface of the shield case 12.
  • the shield case 12 is preferably a three-dimensional wiring member using MID (Molded Interconnect Device).
  • FIG. 9 shows a fourth embodiment of the present invention.
  • the assembly is completed by soldering the bent piece 12a of the shield case 12 to the second electrode 2.
  • the bent piece 12a of the shield case 12 is the second piece. The only difference is that it is not soldered by applying elasticity so that it is pressed against the electrode 2.
  • This Embodiment 4 can be similarly implemented in Embodiment 2 and Embodiment 3.
  • FIG. 10, FIG. 11 (a) and FIG. 11 (b) show Embodiment 5 of the present invention.
  • the force in which the relay board 100 is a frame type in the first embodiment is different from the fifth embodiment only in that two pillar-shaped ones are used.
  • a second electrode 2 is formed on each outer side surface.
  • the columnar relay boards 19a and 19b are attached to the first circuit board 101, and the second circuit board 102 is attached to the first circuit board 101 via the relay boards 19a and 19b.
  • the bent piece 12a of the shield case 12 is soldered to the second electrode 2 through the state shown in FIG.
  • FIG. 12 shows a sixth embodiment of the present invention.
  • the shield case 12 is made of a conductive metal. As shown in Fig. 12, a metal is placed outside the insulating shield case body 20 made of synthetic resin or the like.
  • the conductive layer 21 is formed by soldering, and the conductive layer 21 formed on the bent piece 20a of the shield case body 20 is soldered to the second electrode 2 or the bent piece 20a of the shield case 20 as in the fourth embodiment. Assembling is completed by applying elasticity so that the conductive layer 21 formed on is pressed against the second electrode 2.
  • the force that forms the conductive layer 21 only on the outside of the insulating shield case body 20 the conductive layer 21 is provided on the outside and inside of the insulating shield case body 20. It can also be formed and configured.
  • the wiring pattern is formed on the conductive layer 21 formed inside the shield case body 20 via an insulating layer. And the electronic components 13 and 14 and the relay board 15 are mounted.
  • the electrical connection method between the shield case 12 and the second electrode 2 is performed by soldering or by pressing the bent piece 12a of the shield case 12 with elasticity. Connected force S, contact by fitting, by brazing Contact, contact structure via conductive resin is acceptable.
  • the shield case 12 is attached so as to cover only the electronic component to be shielded or the vicinity thereof, which is attached so as to cover the entire upper surface of the second circuit board 102.
  • the shield case 12 is attached so as to cover at least part of the surface of the second circuit board 102 opposite to the surface facing the first circuit board 101, and is electrically connected to the second electrode 2. Being done! /, If you can! /
  • the three-dimensional circuit device of the present invention has a structure that reduces the shielding effect and mounting area of an electronic circuit, and can be applied to the use of a functional module such as a communication module.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

A three-dimensional electronic circuit apparatus in which first and second circuit boards are stacked through relay boards having a structure capable of shielding and furthermore miniaturizing electronic components mounted on the upper surface of the topmost board. The electronic components disposed between the first and second circuit boards (101, 102) are electrically shielded by a second electrode (2) formed on the side surface of a relay board (100) and the electronic components electrically connected to the second circuit board (102) are shielded from an electrical noise by a shield case (12) electrically connected to the second electrode (2).

Description

明 細 書  Specification
立体的電子回路装置  Three-dimensional electronic circuit device
技術分野  Technical field
[0001] 本発明は、電子部品を実装した機能モジュール等をベース回路基板上に実装して 構成された立体的電子回路装置における、シールド構造に関するものである。 背景技術  TECHNICAL FIELD [0001] The present invention relates to a shield structure in a three-dimensional electronic circuit device configured by mounting a functional module mounted with electronic components on a base circuit board. Background art
[0002] 近年、回路基板上に、抵抗器やコンデンサ、コイルなどの受動部品と半導体素子 による能動部品を実装する電子回路装置は、携帯電話機やノートパソコンに代表さ れるモパイル機器の高機能化に伴って、小型、薄型、軽量化が進んでいる。  [0002] In recent years, electronic circuit devices in which passive components such as resistors, capacitors, and coils and active components using semiconductor elements are mounted on a circuit board have been used to increase the functionality of mobile devices such as mobile phones and laptop computers. Along with this, miniaturization, thinning, and weight reduction are progressing.
[0003] しかし、従来の 2次元表面実装技術、例えば、電子部品の小型 ·薄型化、電子部品 を配置する部品間の狭ピッチ化によって実装密度の向上を図るには限界となってい る。そのため 3次元的にモジュール基板を積層して、さらなる高密度化が図られてい  [0003] However, there is a limit to improving the mounting density by conventional two-dimensional surface mounting technology, for example, downsizing and thinning of electronic components and narrowing of pitch between components where electronic components are arranged. For this reason, module boards are stacked three-dimensionally to achieve higher density.
[0004] また、電子回路装置の高密度化により、電気的な配線干渉や外部からのノイズ、電 子回路装置自体から発せられるノイズの影響が製品の機能劣化を招き、電気設計- 回路設計における電気的な対策も高度化している。 [0004] In addition, due to the increase in the density of electronic circuit devices, the effects of electrical wiring interference, external noise, and noise generated from the electronic circuit device itself may lead to functional degradation of the product. Electrical measures are also becoming more sophisticated.
[0005] この問題を改善するために、特許文献 1 ,特許文献 2などに開示されている立体的 電子回路装置が知られてレ、る。  In order to improve this problem, three-dimensional electronic circuit devices disclosed in Patent Document 1, Patent Document 2, and the like are known.
[0006] 例えば図 13では、接合部材 30を介して第 1の基板 31の上に第 2の基板 32を積層 して立体的電子回路装置が構成されている。接合部材 30の外周壁面にシールド体 33が設けられており、この場合、第 1の基板 31と第 2の基板 32の間に接続配置され た電子回路部 34は、シールド体 33によって電気的ノイズから遮蔽される。特許文献 1の接合部材 30は、絶縁性のハウジングに複数のパネ弾性のある金属薄版などによ る所定形状のリード端子をあらかじめ設定した配列構成で固定保持して構成されて いる。  For example, in FIG. 13, a three-dimensional electronic circuit device is configured by laminating a second substrate 32 on a first substrate 31 via a bonding member 30. A shield body 33 is provided on the outer peripheral wall surface of the bonding member 30. In this case, the electronic circuit portion 34 connected between the first substrate 31 and the second substrate 32 is electrically noised by the shield body 33. Shielded from. The joining member 30 of Patent Document 1 is configured by fixing and holding a predetermined shape of lead terminals such as a plurality of panel elastic metal thin plates in an insulating housing in a predetermined arrangement configuration.
[0007] また、特許文献 2には図 14に示すようにシールド構造を有する立体的電子回路装 置が開示されている。これは、上面に電子部品 35を実装した基板 36と、下面に電子 部品 37を実装した基板 38とを積層する場合に、シールドパターン 39, 40とを備えた 基板 41を、基板 36と基板 38の間に挟んで、層間配線部材 42, 42, 43, 43により電 気的に接合された立体的電子回路装置となっている。これにより、電子部品 35, 37 がシールドパターン 39, 40によってシールドされる。 [0007] Further, Patent Document 2 discloses a three-dimensional electronic circuit device having a shield structure as shown in FIG. This consists of a substrate 36 with electronic components 35 mounted on the top surface and an electronic circuit on the bottom surface. When laminating the board 38 on which the component 37 is mounted, the board 41 having the shield patterns 39 and 40 is sandwiched between the board 36 and the board 38, and the interlayer wiring members 42, 42, 43, and 43 It is a three-dimensional electronic circuit device that is air bonded. As a result, the electronic components 35 and 37 are shielded by the shield patterns 39 and 40.
特許文献 1 :特開 2005— 333046号公報  Patent Document 1: JP 2005-333046 A
特許文献 2：特開 2001— 111232号公報  Patent Document 2: Japanese Patent Laid-Open No. 2001-111232
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0008] しかしな力 Sら、図 13に示した立体的電子回路装置では、第 2の基板 32の上に接続 配置された電子回路部 44を、接合部材 30によってシールドすることができないという 課題を有している。 However, in the three-dimensional electronic circuit device shown in FIG. 13, the electronic circuit portion 44 connected and arranged on the second substrate 32 cannot be shielded by the bonding member 30 in the three-dimensional electronic circuit device shown in FIG. have.
[0009] 図 14に示した立体的電子回路装置では、基板 36と基板 38の間の電子部品 35, 3 7を電気的ノイズから遮蔽することが可能となる。しかし、基板 38の上面にも仮想線で 示すように電子部品 45を実装して、これを遮蔽するためには、さらに仮想線で示すよ うに層間配線部材 46, 47とシールドパターン 48, 49とを備えた基板 50を付加するこ とが必要であって、層間配線部材 46, 47を配置するスペースを基板 38の上面に設 け、この層間配線部材 46, 47を基準電位などに接続する配線パターンを基板 38の 上面に設けることが必要である。  In the three-dimensional electronic circuit device shown in FIG. 14, the electronic components 35 and 37 between the substrate 36 and the substrate 38 can be shielded from electrical noise. However, in order to mount the electronic component 45 on the upper surface of the substrate 38 as shown by a virtual line and shield it, the interlayer wiring members 46 and 47 and the shield patterns 48 and 49 as shown by the virtual line are used. It is necessary to add a substrate 50 having a wiring, and a space for arranging the interlayer wiring members 46, 47 is provided on the upper surface of the substrate 38, and the wiring for connecting the interlayer wiring members 46, 47 to a reference potential or the like is provided. It is necessary to provide a pattern on the upper surface of the substrate 38.
[0010] 本発明は、立体的電子回路装置の最上部の基板の上面に実装された電子部品を The present invention provides an electronic component mounted on the upper surface of the uppermost substrate of a three-dimensional electronic circuit device.
、前記最上部の基板の上面に基準電位などに接続する配線パターンなどを設けなく ても遮蔽できる、電気的ノイズの遮蔽効果と小型化を両立できる立体的電子回路装 置を提供することを目的とする。 An object of the present invention is to provide a three-dimensional electronic circuit device which can be shielded without providing a wiring pattern or the like connected to a reference potential on the upper surface of the uppermost substrate and which can achieve both an electrical noise shielding effect and downsizing. And
課題を解決するための手段  Means for solving the problem
[0011] 本発明の請求項 1記載の立体的電子回路装置は、第 1の回路基板と第 2の回路基 板を中継基板を介して積層し、前記中継基板に形成された第 1の電極を介して前記 第 1の回路基板の側の回路パターンと前記第 2の回路基板の側の回路パターンとを 接続した立体的電子回路装置において、前記第 1の回路基板と前記第 2の回路基 板の間に介装された状態における中継基板の外側の面に、基準電位に接続される 第 2の電極を設けて、この第 2の電極によって前記第 1の回路基板と前記第 2の回路 基板の間の空間を遮蔽するとともに、前記第 2の回路基板の前記第 1の回路基板と の対向面とは反対側の面の少なくとも一部を覆うように取り付けられ前記第 2の電極 に電気接続されたシールドケースを設けたことを特徴とする。 [0011] The three-dimensional electronic circuit device according to claim 1 of the present invention includes a first circuit board and a second circuit board stacked via a relay board, and the first electrode formed on the relay board. In the three-dimensional electronic circuit device in which the circuit pattern on the first circuit board side and the circuit pattern on the second circuit board side are connected via the first circuit board, the first circuit board and the second circuit board Connected to the reference potential on the outer surface of the relay substrate in the state of being interposed between the plates A second electrode is provided, and a space between the first circuit board and the second circuit board is shielded by the second electrode, and the first circuit board of the second circuit board and The shield case is provided so as to cover at least a part of the surface opposite to the opposite surface, and electrically connected to the second electrode.
[0012] 本発明の請求項 2記載の立体的電子回路装置は、請求項 1において、前記シール ドケースが前記第 2の電極に接触することにより電気接続されていることを特徴とする [0012] The three-dimensional electronic circuit device according to claim 2 of the present invention is characterized in that, in claim 1, the shield case is electrically connected by contacting the second electrode.
[0013] 本発明の請求項 3記載の立体的電子回路装置は、請求項 1において、前記シール ドケースが前記第 2の電極に半田付けまたはろう付けにより電気接続されていることを 特徴とする。 [0013] The three-dimensional electronic circuit device according to claim 3 of the present invention is characterized in that, in claim 1, the shield case is electrically connected to the second electrode by soldering or brazing.
[0014] 本発明の請求項 4記載の立体的電子回路装置は、請求項 1において、前記シール ドケースが導電体の金属で形成されていることを特徴とする。  [0014] A three-dimensional electronic circuit device according to a fourth aspect of the present invention is characterized in that, in the first aspect, the shield case is formed of a conductive metal.
[0015] 本発明の請求項 5記載の立体的電子回路装置は、請求項 1において、前記シール ドケースを、絶縁樹脂からなるケース本体に金属メツキで導電層を形成し、前記導電 層が前記第 2の電極に電気接続されていることを特徴とする。 [0015] The three-dimensional electronic circuit device according to claim 5 of the present invention is the stereoscopic electronic circuit device according to claim 1, wherein the shield case is formed of a metal layer on a case main body made of an insulating resin, and the conductive layer is the first layer. It is electrically connected to the two electrodes.
[0016] 本発明の請求項 6記載の立体的電子回路装置は、請求項 1において、前記第 2の 回路基板の外周部に形成された切り欠き部を通過して前記シールドケースが前記第[0016] A three-dimensional electronic circuit device according to a sixth aspect of the present invention is the three-dimensional electronic circuit device according to the first aspect, wherein the shield case passes through a notch formed in an outer peripheral portion of the second circuit board.
2の電極に電気接続されて!/、ることを特徴とする。 It is electrically connected to two electrodes! /.
[0017] 本発明の請求項 7記載の立体的電子回路装置は、請求項 1において、前記シール ドケースの内側に電子部品が実装されていることを特徴とする。 [0017] The three-dimensional electronic circuit device according to claim 7 of the present invention is characterized in that, in claim 1, an electronic component is mounted inside the shield case.
発明の効果  The invention's effect
[0018] この構成によれば、中継基板の外側の面に設けられた第 2の電極によって第 1の回 路基板と第 2の回路基板の間の空間を遮蔽することができ、第 2の電極に電気接続さ れて第 2の回路基板の第 1の回路基板との対向面とは反対側の面の少なくとも一部 を覆うシールドケースによって、第 2の回路基板の上面に基準電位などに接続する配 線パターンなどを設けなくても遮蔽できる。  According to this configuration, the second electrode provided on the outer surface of the relay substrate can shield the space between the first circuit board and the second circuit board, and the second electrode A shield case that is electrically connected to the electrode and covers at least part of the surface of the second circuit board opposite to the surface facing the first circuit board provides a reference potential or the like on the upper surface of the second circuit board. It can be shielded without providing a wiring pattern to connect.
図面の簡単な説明  Brief Description of Drawings
[0019] [図 1]本発明の立体的電子回路装置の実施の形態 1における断面図 [図 2]同実施の形態の分解図 FIG. 1 is a cross-sectional view of a three-dimensional electronic circuit device according to a first embodiment of the present invention. [Figure 2] Exploded view of the same embodiment
[図 3(a)]同実施の形態の組み立て工程図  [Fig. 3 (a)] Assembly process diagram of the same embodiment
[図 3(b)]同実施の形態の組み立て工程図  [Fig. 3 (b)] Assembly process diagram of the same embodiment
[図 4]本発明の立体的電子回路装置の実施の形態 2における外観斜視図  FIG. 4 is an external perspective view of Embodiment 2 of the three-dimensional electronic circuit device of the present invention.
[図 5]同実施の形態における断面図  FIG. 5 is a cross-sectional view of the same embodiment
[図 6(a)]同実施の形態の組み立て工程図  [Fig. 6 (a)] Assembly process diagram of the same embodiment
[図 6(b)]同実施の形態の組み立て工程図  [Fig. 6 (b)] Assembly process diagram of the same embodiment
[図 7]本発明の立体的電子回路装置の実施の形態 3における断面図  FIG. 7 is a sectional view of a three-dimensional electronic circuit device according to a third embodiment of the present invention.
[図 8(a)]同実施の形態の組み立て工程図  [Fig. 8 (a)] Assembly process diagram of the same embodiment
[図 8(b)]同実施の形態の組み立て工程図  [Fig. 8 (b)] Assembly process diagram of the same embodiment
[図 8(c)]同実施の形態の組み立て工程図  [Fig. 8 (c)] Assembly process diagram of the same embodiment
[図 9]本発明の立体的電子回路装置の実施の形態 4における断面図  FIG. 9 is a sectional view of a three-dimensional electronic circuit device according to a fourth embodiment of the present invention.
[図 10]本発明の立体的電子回路装置の実施の形態 5における分解図  FIG. 10 is an exploded view of a three-dimensional electronic circuit device according to a fifth embodiment of the present invention.
[図 11(a)]同実施の形態の組み立て工程図  [Fig. 11 (a)] Assembly process diagram of the same embodiment
[図 11(b)]同実施の形態の組み立て工程図  [Fig. 11 (b)] Assembly process diagram of the same embodiment
[図 12]本発明の立体的電子回路装置の実施の形態 6におけるシールドケースの断 面図  FIG. 12 is a cross-sectional view of the shield case in Embodiment 6 of the three-dimensional electronic circuit device of the present invention.
[図 13]従来の立体的電子回路装置の断面図  FIG. 13 is a sectional view of a conventional three-dimensional electronic circuit device.
[図 14]別の従来例の立体的電子回路装置の断面図  FIG. 14 is a sectional view of another conventional three-dimensional electronic circuit device.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0020] 以下、本発明を各実施の形態に基づいて説明する。  Hereinafter, the present invention will be described based on each embodiment.
[0021] (実施の形態 1)  [0021] (Embodiment 1)
図 1〜図 3 (a)と図 3 (b)は本発明の実施の形態 1を示す。  1 to 3 (a) and 3 (b) show the first embodiment of the present invention.
[0022] この立体的電子回路装置は、第 1の回路基板 101と第 2の回路基板 102を中継基 板 100を介して積層し、中継基板 100に形成された第 1の電極 1を介して第 1の回路 基板 101の側の回路パターンと第 2の回路基板 102の側の回路パターンとを接続し て構成されている。第 1 ,第 2の回路基板 101 , 102は、例えば、ガラスエポキシ樹脂 やセラミックの多層回路基板である。 [0023] 第 1の回路基板 101の側の回路パターンには、電子部品 3, 4, 5が実装されている 。第 2の回路基板 102の側の回路パターンには、電子部品 6, 7, 8, 9が実装されて いる。中継基板 100は図 2に示すように枠型で各辺に、図 1にも示すように中継基板 本体 100aの上面 100bから内周面 100cを経て下面 100dにわたつて所定ピッチで 第 1の電極 1が形成されている。第 1の回路基板 101の上面と、第 2の回路基板 102 の下面にも、第 1の電極 1に対応して電極パターン 10, 11が形成されている。 In this three-dimensional electronic circuit device, a first circuit board 101 and a second circuit board 102 are laminated via a relay substrate 100, and the first electrode 1 formed on the relay substrate 100 is interposed therebetween. The circuit pattern on the first circuit board 101 side is connected to the circuit pattern on the second circuit board 102 side. The first and second circuit boards 101 and 102 are, for example, glass epoxy resin or ceramic multilayer circuit boards. [0023] Electronic components 3, 4, and 5 are mounted on the circuit pattern on the first circuit board 101 side. Electronic components 6, 7, 8, and 9 are mounted on the circuit pattern on the second circuit board 102 side. As shown in FIG. 2, the relay substrate 100 has a frame shape on each side, and also as shown in FIG. 1 is formed. Electrode patterns 10 and 11 corresponding to the first electrode 1 are also formed on the upper surface of the first circuit board 101 and the lower surface of the second circuit board 102.
[0024] 組み立ては、図 3 (a)に示すように、第 1の回路基板 101に中継基板 100を半田付 けし、この取り付けられた中継基板 100に対して、電子部品 6 , 7, 8, 9が実装された 第 2の回路基板 102が、図 3 (b)に示すように半田付けされる。  As shown in FIG. 3 (a), the relay board 100 is soldered to the first circuit board 101, and the electronic components 6, 7, 8, 8, are attached to the relay board 100 thus attached. The second circuit board 102 on which 9 is mounted is soldered as shown in FIG.
[0025] 中継基板 100の各辺の外周の面 100eには、第 2の電極 2が形成されている。そし て、中継基板 100を第 1の回路基板 101に実装した状態では、第 2の電極 2は前記 電極パターン 10を介して第 1の回路基板 101中の基準電位であるグランドパターン に接続されている。  A second electrode 2 is formed on the outer peripheral surface 100e of each side of the relay substrate 100. In a state where the relay board 100 is mounted on the first circuit board 101, the second electrode 2 is connected to the ground pattern that is the reference potential in the first circuit board 101 through the electrode pattern 10. Yes.
[0026] さらに、導電性の金属からなるシールドケース 12を図 3 (b)に実線で示すように弹 性変形させながら第 2の回路基板 102に被せて、シールドケース 12の折り曲げ片 12 aを第 2の電極 2に半田付けして組み立てが完了している。  [0026] Further, the shield case 12 made of a conductive metal is placed on the second circuit board 102 while being deformed by inertia as shown by a solid line in FIG. 3B, and the bent piece 12a of the shield case 12 is attached. The assembly is completed by soldering to the second electrode 2.
[0027] この構成によると、第 1の回路基板 101と第 2の回路基板 102の間の空間に設けら れた電子部品 3〜7が第 2の電極 2によって遮蔽され、第 2の回路基板 102の上面に 実装された電子部品 8, 9をシールドケース 12によって遮蔽できる。  According to this configuration, the electronic components 3 to 7 provided in the space between the first circuit board 101 and the second circuit board 102 are shielded by the second electrode 2, and the second circuit board The electronic parts 8 and 9 mounted on the upper surface of 102 can be shielded by the shield case 12.
[0028] ここでシールドケース 12を第 2の回路基板 102の上で配線パターンに接続している のではなく、中継基板 100の側面に設けた第 2の電極 2に半田付けして遮蔽している ため、第 2の回路基板 102の上にシールドケース接続用の配線パターンを形成する 必要が無ぐ第 2の回路基板 102上の実装面積が削減され、それに応じて第 2の回 路基板 102の面積を縮小できる。  Here, the shield case 12 is not connected to the wiring pattern on the second circuit board 102, but is soldered and shielded to the second electrode 2 provided on the side surface of the relay board 100. Therefore, it is not necessary to form a wiring pattern for connecting the shield case on the second circuit board 102, and the mounting area on the second circuit board 102 is reduced, and accordingly, the second circuit board 102 is reduced. Can be reduced.
[0029] 例えば、第 2の回路基板 102上にシールドケース 12を配置するために必要な電極 を 2mm幅で基板外周部全体に形成するとし、第 2の回路基板 102の外寸法を 20m m X 20mm程度とすると、電子部品の実装面積は 18mm X 18mm = 324mm2とな る。また、シールドケース 12を配置するために必要な電極に必要な面積は（20mm X 20mm)一（18mm X 18mm) = 76mm2となる。つまり、本構造によればシールド ケース 12を配置するために必要な電極に必要な 76mm2の実装面積を削減できる。 [0029] For example, if the electrodes necessary for placing the shield case 12 on the second circuit board 102 are formed on the entire outer periphery of the board with a width of 2 mm, the outer dimension of the second circuit board 102 is 20 mm x If it is about 20 mm, the mounting area of the electronic components is 18 mm X 18 mm = 324 mm 2 . In addition, the area required for the electrode required to place the shield case 12 is (20mm X 20mm) one (18mm X 18mm) = 76mm 2 In other words, according to this structure, it is possible to reduce the mounting area of 76 mm 2 necessary for the electrode necessary for arranging the shield case 12.
[0030] 本発明の構造によれば、第 2の回路基板 101へ GND電極端子を形成する必要が なくなるため、約 20%の実装面積の削減が可能となり、立体的電子回路装置の小型 化が実現する。  [0030] According to the structure of the present invention, since it is not necessary to form the GND electrode terminal on the second circuit board 101, the mounting area can be reduced by about 20%, and the three-dimensional electronic circuit device can be reduced in size. Realize.
[0031] (実施の形態 2)  [0031] (Embodiment 2)
図 4〜図 6 (a)と図 6 (b)は本発明の実施の形態 2を示す。  4 to 6 (a) and 6 (b) show the second embodiment of the present invention.
[0032] 実施の形態 1のシールドケース 12は、第 2の回路基板 102の縁よりも外側を通過し てシールドケース 12の折り曲げ片 12aが第 2の電極 2に半田付けされていた力 この 実施の形態 2では、第 2の回路基板 102の外周部に切り欠き部 102aが形成されてお り、シールドケース 12の折り曲げ片 12aがこの切り欠き部 102aを通過して第 2の電極 2に半田付けされている点だけが実施の形態 1と異なっており、その他は同じである。  [0032] The shield case 12 of the first embodiment passes the outside of the edge of the second circuit board 102, and the force that the bent piece 12a of the shield case 12 is soldered to the second electrode 2 In Embodiment 2, a notch 102a is formed on the outer periphery of the second circuit board 102, and the bent piece 12a of the shield case 12 passes through the notch 102a and is soldered to the second electrode 2. Only the points attached are different from the first embodiment, and the others are the same.
[0033] この構成によると、第 2の回路基板 102として外形が正方形の形状のものを用いた 力 第 2の回路基板 102にシールドケース 12の厚み寸法の切り欠き部 102aを形成し たので、更なる立体的電子回路装置の投影面積の縮小が可能となる。  [0033] According to this configuration, since the second circuit board 102 has a square outer shape, the notch 102a having the thickness of the shield case 12 is formed on the second circuit board 102. The projected area of the three-dimensional electronic circuit device can be further reduced.
[0034] (実施の形態 3)  [Embodiment 3]
図 7と図 8 (a)〜図 8 (c)は本発明の実施の形態 3を示す。  7 and 8 (a) to 8 (c) show the third embodiment of the present invention.
[0035] この立体的電子回路装置は、第 1の回路基板 101と第 2の回路基板 102を中継基 板 100を介して積層し、中継基板 100に形成された第 1の電極 1を介して第 1の回路 基板 101の側の回路パターンと第 2の回路基板 102の側の回路パターンとを接続し て構成されている。第 1 ,第 2の回路基板 101 , 102は、例えば、ガラスエポキシ樹脂 やセラミックの多層回路基板である。  In this three-dimensional electronic circuit device, a first circuit board 101 and a second circuit board 102 are laminated via a relay substrate 100, and the first electrode 1 formed on the relay substrate 100 is interposed therebetween. The circuit pattern on the first circuit board 101 side is connected to the circuit pattern on the second circuit board 102 side. The first and second circuit boards 101 and 102 are, for example, glass epoxy resin or ceramic multilayer circuit boards.
[0036] さらに、第 2の回路基板 102の上面に被されているシールドケース 12の内側に実装 された電子部品 13, 14力 中継基板 15を介して第 2の回路基板 102の配線パター ンに接続されている。  [0036] Furthermore, the electronic component 13 and 14 force mounted inside the shield case 12 covering the upper surface of the second circuit board 102 is connected to the wiring pattern of the second circuit board 102 via the relay board 15. It is connected.
[0037] 中継基板 100, 15は、図 2に示すように枠型で各辺には、上面から内周面を経て 下面にわたって所定ピッチで第 1の電極 1が形成されている。第 1の回路基板 101の 上面と、第 2の回路基板 102の下面にも、中継基板 100の第 1の電極 1に対応して電 極パターン 10, 11が形成されている。第 2の回路基板 102の上面にも、中継基板 15 の第 1の電極 1に対応して電極パターン 16が形成されている。 As shown in FIG. 2, the relay substrates 100 and 15 are frame-shaped, and the first electrodes 1 are formed on each side at a predetermined pitch from the upper surface to the lower surface through the inner peripheral surface. The upper surface of the first circuit board 101 and the lower surface of the second circuit board 102 are also electrically connected to the first electrode 1 of the relay board 100. Polar patterns 10 and 11 are formed. An electrode pattern 16 corresponding to the first electrode 1 of the relay board 15 is also formed on the upper surface of the second circuit board 102.
[0038] 中継基板 100の各辺の外周の面 100eには、実施の形態 1と同じように第 2の電極 2 が形成されている。 [0038] On the outer peripheral surface 100e of each side of the relay substrate 100, the second electrode 2 is formed as in the first embodiment.
[0039] 組み立ては、図 8 (a)に示すように、導電性の金属からなるシールドケース 12の内 側の面に絶縁層 17を介して電極パターン 16と配線パターン 18を形成する。そして、 図 8 (b)に示すように電子部品 13, 14と中継基板 15を半田付けする。  In the assembly, as shown in FIG. 8 (a), the electrode pattern 16 and the wiring pattern 18 are formed on the inner surface of the shield case 12 made of a conductive metal via the insulating layer 17. Then, as shown in FIG. 8B, the electronic components 13 and 14 and the relay substrate 15 are soldered.
[0040] つぎに、図 8 (c)に示すように中継基板 100を介して積層の完了した第 1 ,第 2の回 路基板 101 , 102に対して、シールドケース 12を実線で示すように弾性変形させな 力 ¾第 2の回路基板 102に被せることによって、シールドケース 12の内側の面に実装 した電子部品 13, 14と第 2回路基板 102の回路パターンとが、中継基板 15を介して 電気接続され、さらに、シールドケース 12の折り曲げ片 12aを中継基板 100の第 2の 電極 2に半田付けして組み立てが完了している。  Next, as shown in FIG. 8 (c), the shield case 12 is indicated by a solid line with respect to the first and second circuit boards 101 and 102 that have been stacked via the relay board 100. The force that does not cause elastic deformation ¾ The electronic components 13, 14 mounted on the inner surface of the shield case 12 and the circuit pattern of the second circuit board 102 are connected via the relay board 15 by covering the second circuit board 102. Further, the assembly is completed by electrically connecting and soldering the bent piece 12a of the shield case 12 to the second electrode 2 of the relay substrate 100.
[0041] このようにシールドケース 12の内側にも実装することによって、実施の形態 1に比べ て高実装することができる。遮蔽については、中継基板 100の第 2の電極 2によって 第 1 ,第 2の回路基板 101 , 102の間の空間を遮蔽することができ、また、シールドケ ース 12によって、第 2の回路基板 102の上面とシールドケース 12の内面に実装され た電子部品を遮蔽することができる。  [0041] By mounting in the shield case 12 as described above, it is possible to achieve higher mounting than in the first embodiment. With regard to shielding, the space between the first and second circuit boards 101 and 102 can be shielded by the second electrode 2 of the relay board 100, and the second circuit board 102 can be shielded by the shield case 12. It is possible to shield electronic components mounted on the upper surface of the shield and the inner surface of the shield case 12.
[0042] なお、シールドケース 12は MID (Molded Interconnect Device)を用いた立体配線 部材を用いることが好ましい。  [0042] The shield case 12 is preferably a three-dimensional wiring member using MID (Molded Interconnect Device).
[0043] (実施の形態 4)  [0043] (Embodiment 4)
図 9は本発明の実施の形態 4を示す。  FIG. 9 shows a fourth embodiment of the present invention.
[0044] 実施の形態 1ではシールドケース 12の折り曲げ片 12aを第 2の電極 2に半田付けし て組み立てが完了したが、この実施の形態 4では、シールドケース 12の折り曲げ片 1 2aを第 2の電極 2に押し付けるように弾性を付与して半田付けしていない点だけが異 なっている。この実施の形態 4は、実施の形態 2と実施の形態 3においても同様に実 施できる。  In the first embodiment, the assembly is completed by soldering the bent piece 12a of the shield case 12 to the second electrode 2. However, in the fourth embodiment, the bent piece 12a of the shield case 12 is the second piece. The only difference is that it is not soldered by applying elasticity so that it is pressed against the electrode 2. This Embodiment 4 can be similarly implemented in Embodiment 2 and Embodiment 3.
[0045] (実施の形態 5) 図 10と図 11 (a)と図 11 (b)は本発明の実施の形態 5を示す。 [Embodiment 5] FIG. 10, FIG. 11 (a) and FIG. 11 (b) show Embodiment 5 of the present invention.
[0046] 実施の形態 1では中継基板 100は枠型であった力 この実施の形態 5では、 2つの 柱状のものを使用している点だけが異なっており、柱状の中継基板 19a, 19bの外側 の側面にそれぞれ第 2電極 2が形成されている。  [0046] The force in which the relay board 100 is a frame type in the first embodiment is different from the fifth embodiment only in that two pillar-shaped ones are used. A second electrode 2 is formed on each outer side surface.
[0047] 組み立ては、図 11 (a)に示すように第 1の回路基板 101に柱状の中継基板 19a, 1 9bを取り付け、中継基板 19a, 19bを介して第 2の回路基板 102を第 1の回路基板 1 01に取り付けてから、図 1 1 (b)に示す状態を経てシールドケース 12の折り曲げ片 12 aを第 2の電極 2に半田付けして組み立てが完了する。  [0047] As shown in Fig. 11 (a), the columnar relay boards 19a and 19b are attached to the first circuit board 101, and the second circuit board 102 is attached to the first circuit board 101 via the relay boards 19a and 19b. After being attached to the circuit board 1101, the bent piece 12a of the shield case 12 is soldered to the second electrode 2 through the state shown in FIG.
[0048] (実施の形態 6)  [0048] (Embodiment 6)
図 12は本発明の実施の形態 6を示す。  FIG. 12 shows a sixth embodiment of the present invention.
[0049] 上記の各実施の形態ではシールドケース 12は、導電性の金属からなるものであつ た力 図 12に示すように合成樹脂などからなる絶縁性のシールドケース本体 20の外 側に、金属メツキで導電層 21を形成し、シールドケース本体 20の折り曲げ片 20aに 形成された導電層 21を、第 2の電極 2に半田付け、または実施の形態 4のようにシー ルドケース 20の折り曲げ片 20aに形成された導電層 21を第 2の電極 2に押し付ける ように弾性を付与して組み立てが完了する。  [0049] In each of the embodiments described above, the shield case 12 is made of a conductive metal. As shown in Fig. 12, a metal is placed outside the insulating shield case body 20 made of synthetic resin or the like. The conductive layer 21 is formed by soldering, and the conductive layer 21 formed on the bent piece 20a of the shield case body 20 is soldered to the second electrode 2 or the bent piece 20a of the shield case 20 as in the fourth embodiment. Assembling is completed by applying elasticity so that the conductive layer 21 formed on is pressed against the second electrode 2.
[0050] また、実施の形態 3のようにシールドケース 12の内側に電子部品を実装する場合に は、図 12に示した絶縁性のシールドケース本体 20の内側の上に直接に配線パター ンを形成して電子部品と中継基板 15を実装して構成することもできる。  [0050] When electronic components are mounted inside the shield case 12 as in the third embodiment, a wiring pattern is directly placed on the inside of the insulating shield case body 20 shown in FIG. The electronic component and the relay board 15 can be mounted and formed.
[0051] また、図 12では絶縁性のシールドケース本体 20の外側にだけ導電層 21を形成し た力 上記各実施の形態において、絶縁性のシールドケース本体 20の外側と内側 に導電層 21を形成して構成することもできる。この場合に、実施の形態 3のようにシ 一ルドケース 12の内側に電子部品を実装する場合には、シールドケース本体 20の 内側に形成された導電層 21の上に絶縁層を介して配線パターンを形成して電子部 品 13, 14と中継基板 15を実装して構成する。  Also, in FIG. 12, the force that forms the conductive layer 21 only on the outside of the insulating shield case body 20 In each of the above embodiments, the conductive layer 21 is provided on the outside and inside of the insulating shield case body 20. It can also be formed and configured. In this case, when an electronic component is mounted inside the shield case 12 as in the third embodiment, the wiring pattern is formed on the conductive layer 21 formed inside the shield case body 20 via an insulating layer. And the electronic components 13 and 14 and the relay board 15 are mounted.
[0052] 上記の各実施の形態において、シールドケース 12と第 2の電極 2との電気的な接 続方法に関しては、半田付けまたはシールドケース 12の折り曲げ片 12aに弾性を付 与した押し付けによって電気的に接続した力 S、はめ込みによる接触、ろう付けによる 接触、導電性の樹脂を介した接触構造でもかまわなレ、。 [0052] In each of the above-described embodiments, the electrical connection method between the shield case 12 and the second electrode 2 is performed by soldering or by pressing the bent piece 12a of the shield case 12 with elasticity. Connected force S, contact by fitting, by brazing Contact, contact structure via conductive resin is acceptable.
[0053] 上記の各実施の形態においてシールドケース 12は、第 2の回路基板 102の上面の 全部を覆うように取り付けられていた力 遮蔽すべき電子部品またはその近傍だけを 覆うように取り付けられていてもよぐシールドケース 12は第 2の回路基板 102の第 1 の回路基板 101との対向面とは反対側の面の少なくとも一部を覆うように取り付けら れ第 2の電極 2に電気接続されて!/、ればよ!/、。 [0053] In each of the above-described embodiments, the shield case 12 is attached so as to cover only the electronic component to be shielded or the vicinity thereof, which is attached so as to cover the entire upper surface of the second circuit board 102. The shield case 12 is attached so as to cover at least part of the surface of the second circuit board 102 opposite to the surface facing the first circuit board 101, and is electrically connected to the second electrode 2. Being done! /, If you can! /
産業上の利用可能性  Industrial applicability
[0054] 本発明の立体回路装置は、電子回路のシールド効果と実装面積の縮小化する構 造を有し、通信モジュール等の機能モジュールの用途にも適用できる。 [0054] The three-dimensional circuit device of the present invention has a structure that reduces the shielding effect and mounting area of an electronic circuit, and can be applied to the use of a functional module such as a communication module.

Claims

請求の範囲 The scope of the claims
[1] 第 1の回路基板と第 2の回路基板を中継基板を介して積層し、前記中継基板に形 成された第 1の電極を介して前記第 1の回路基板の側の回路パターンと前記第 2の 回路基板の側の回路パターンとを接続した立体的電子回路装置において、 前記第 1の回路基板と前記第 2の回路基板の間に介装された状態における中継基 板の外側の面に、基準電位に接続される第 2の電極を設けて、この第 2の電極によつ て前記第 1の回路基板と前記第 2の回路基板の間の空間を遮蔽するとともに、 前記第 2の回路基板の前記第 1の回路基板との対向面とは反対側の面の少なくと も一部を覆うように取り付けられ前記第 2の電極に電気接続されたシールドケースを 設けた  [1] A first circuit board and a second circuit board are laminated via a relay board, and a circuit pattern on the first circuit board side is arranged via a first electrode formed on the relay board. In the three-dimensional electronic circuit device in which the circuit pattern on the second circuit board side is connected, the outside of the relay board in a state of being interposed between the first circuit board and the second circuit board. A second electrode connected to a reference potential is provided on the surface, and the second electrode shields a space between the first circuit board and the second circuit board by the second electrode. A shield case that is attached so as to cover at least a part of the surface of the second circuit board opposite to the surface facing the first circuit board and is electrically connected to the second electrode is provided.
立体的電子回路装置。  Three-dimensional electronic circuit device.
[2] 前記シールドケースが前記第 2の電極に接触することにより電気接続されている 請求項 1記載の立体的電子回路装置。 2. The three-dimensional electronic circuit device according to claim 1, wherein the shield case is electrically connected by contacting the second electrode.
[3] 前記シールドケースが前記第 2の電極に半田付けまたはろう付けにより電気接続さ れている [3] The shield case is electrically connected to the second electrode by soldering or brazing.
請求項 1記載の立体的電子回路装置。  The three-dimensional electronic circuit device according to claim 1.
[4] 前記シールドケースが導電体の金属で形成されてレ、る [4] The shield case is formed of a conductive metal.
請求項 1記載の立体的電子回路装置。  The three-dimensional electronic circuit device according to claim 1.
[5] 前記シールドケースを、絶縁樹脂からなるケース本体に金属メツキで導電層を形成 し、前記導電層が前記第 2の電極に電気接続されている [5] A conductive layer is formed by metal plating on the case body made of insulating resin, and the conductive layer is electrically connected to the second electrode.
請求項 1記載の立体的電子回路装置。  The three-dimensional electronic circuit device according to claim 1.
[6] 前記第 2の回路基板の外周部に形成された切り欠き部を通過して前記シールドケ ースが前記第 2の電極に電気接続されて!/、る [6] The shield case is electrically connected to the second electrode through a notch formed in the outer peripheral portion of the second circuit board.
請求項 1記載の立体的電子回路装置。  The three-dimensional electronic circuit device according to claim 1.
[7] 前記シールドケースの内側に電子部品が実装されている [7] An electronic component is mounted inside the shield case
請求項 1記載の立体的電子回路装置。  The three-dimensional electronic circuit device according to claim 1.
PCT/JP2007/065508 2006-11-16 2007-08-08 Three-dimensional electronic circuit apparatus WO2008059643A1 (en)

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