WO2007074941A8 - 多層プリント配線板 - Google Patents
多層プリント配線板 Download PDFInfo
- Publication number
- WO2007074941A8 WO2007074941A8 PCT/JP2006/326376 JP2006326376W WO2007074941A8 WO 2007074941 A8 WO2007074941 A8 WO 2007074941A8 JP 2006326376 W JP2006326376 W JP 2006326376W WO 2007074941 A8 WO2007074941 A8 WO 2007074941A8
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wiring board
- printed wiring
- multilayer printed
- regions
- chip
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49139—Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
ビルドアップ配線層の表層にICチップ等の半導体素子を搭載するための実装部を有する多層プリント配線板において、ICチップ等の半導体素子を実装する領域の直下の領域に配設されるスルーホール導体のピッチを、他の領域に配設されるスルーホール導体のピッチよりも小さくして、実装されたICチップのプロセッサコア部のトランジスタへの電源供給の遅延を抑制して、誤作動が生じ難くした。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2006800362256A CN101278392B (zh) | 2005-12-27 | 2006-12-27 | 多层印刷线路板 |
EP06843746A EP1968113A4 (en) | 2005-12-27 | 2006-12-27 | MULTILAYER CONDUCTOR PLATE |
US12/163,286 US7781681B2 (en) | 2005-12-27 | 2008-06-27 | Multilayer printed wiring board |
US12/842,431 US8334466B2 (en) | 2005-12-27 | 2010-07-23 | Multilayer printed wiring board |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005373733A JP4824397B2 (ja) | 2005-12-27 | 2005-12-27 | 多層プリント配線板 |
JP2005-373733 | 2005-12-27 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/163,286 Continuation US7781681B2 (en) | 2005-12-27 | 2008-06-27 | Multilayer printed wiring board |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2007074941A1 WO2007074941A1 (ja) | 2007-07-05 |
WO2007074941A8 true WO2007074941A8 (ja) | 2009-08-27 |
Family
ID=38218157
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2006/326376 WO2007074941A1 (ja) | 2005-12-27 | 2006-12-27 | 多層プリント配線板 |
Country Status (7)
Country | Link |
---|---|
US (2) | US7781681B2 (ja) |
EP (1) | EP1968113A4 (ja) |
JP (1) | JP4824397B2 (ja) |
KR (1) | KR100978774B1 (ja) |
CN (2) | CN101278392B (ja) |
TW (2) | TWI387424B (ja) |
WO (1) | WO2007074941A1 (ja) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100544558C (zh) * | 2004-04-28 | 2009-09-23 | 揖斐电株式会社 | 多层印刷配线板 |
JP4824397B2 (ja) * | 2005-12-27 | 2011-11-30 | イビデン株式会社 | 多層プリント配線板 |
US7462784B2 (en) * | 2006-05-02 | 2008-12-09 | Ibiden Co., Ltd. | Heat resistant substrate incorporated circuit wiring board |
WO2010134511A1 (ja) * | 2009-05-20 | 2010-11-25 | 日本電気株式会社 | 半導体装置及び半導体装置の製造方法 |
US8624127B2 (en) | 2010-02-26 | 2014-01-07 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
CN102783258B (zh) * | 2010-02-26 | 2016-08-03 | 三菱电机株式会社 | 印刷线路板的制造方法以及印刷线路板 |
US9048233B2 (en) * | 2010-05-26 | 2015-06-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package systems having interposers |
JP5775747B2 (ja) * | 2011-06-03 | 2015-09-09 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
JP5730152B2 (ja) * | 2011-07-26 | 2015-06-03 | 京セラサーキットソリューションズ株式会社 | 配線基板 |
US20130062210A1 (en) * | 2011-09-13 | 2013-03-14 | Hoya Corporation | Manufacturing method of substrate and manufacturing method of wiring substrate |
JP5797534B2 (ja) * | 2011-11-24 | 2015-10-21 | 京セラサーキットソリューションズ株式会社 | 配線基板 |
KR102043733B1 (ko) * | 2012-05-10 | 2019-11-12 | 히타치가세이가부시끼가이샤 | 다층 배선 기판 |
CN102711394B (zh) * | 2012-06-25 | 2016-02-24 | 广州美维电子有限公司 | 一种用于电路板的电镀互连加工工艺 |
DE112013004691T5 (de) * | 2012-09-25 | 2015-07-02 | Denso Corporation | Elektronische Vorrichtung |
CN103153002B (zh) * | 2013-02-21 | 2016-04-13 | 广州兴森快捷电路科技有限公司 | 具有三面包夹孔铜结构印制电路板的制造方法 |
JP6013960B2 (ja) * | 2013-03-28 | 2016-10-25 | 京セラ株式会社 | 配線基板 |
JP5894221B2 (ja) * | 2014-06-11 | 2016-03-23 | 京セラ株式会社 | インターポーザー、それを用いた実装構造体及び電子機器 |
CN104141904B (zh) * | 2014-07-22 | 2017-12-05 | 上海博恩世通光电股份有限公司 | 一种插入式双面固晶全周发光led功率型灯丝模组 |
US9325536B2 (en) | 2014-09-19 | 2016-04-26 | Dell Products, Lp | Enhanced receiver equalization |
US9317649B2 (en) | 2014-09-23 | 2016-04-19 | Dell Products, Lp | System and method of determining high speed resonance due to coupling from broadside layers |
US9313056B1 (en) | 2014-11-07 | 2016-04-12 | Dell Products, Lp | System aware transmitter adaptation for high speed serial interfaces |
TWI605733B (zh) * | 2016-11-10 | 2017-11-11 | 南亞電路板股份有限公司 | 電路板及其製造方法 |
JP6263286B1 (ja) * | 2017-01-13 | 2018-01-17 | 日本特殊陶業株式会社 | スパークプラグの製造方法 |
KR20190041215A (ko) * | 2017-10-12 | 2019-04-22 | 주식회사 아모그린텍 | 인쇄회로기판 제조 방법 및 이에 의해 제조된 인쇄회로기판 |
JP6984442B2 (ja) | 2018-01-25 | 2021-12-22 | 富士通株式会社 | 基板、電子装置、及び基板の設計支援方法 |
US20220078909A1 (en) * | 2018-12-25 | 2022-03-10 | Kyocera Corporation | Electronic component mounting substrate and electronic device |
US20200343271A1 (en) * | 2019-04-29 | 2020-10-29 | Innolux Corporation | Electronic device |
WO2021142599A1 (zh) * | 2020-01-14 | 2021-07-22 | 深圳市大疆创新科技有限公司 | 一种芯片封装结构及封装方法 |
US11956898B2 (en) * | 2020-09-23 | 2024-04-09 | Apple Inc. | Three-dimensional (3D) copper in printed circuit boards |
Family Cites Families (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5543661A (en) * | 1994-05-31 | 1996-08-06 | Sumitomo Metal Ceramics Inc. | Semiconductor ceramic package with terminal vias |
JPH11289025A (ja) * | 1998-04-01 | 1999-10-19 | Ngk Spark Plug Co Ltd | ビルドアップ多層配線基板 |
EP1868423A1 (en) * | 1998-09-17 | 2007-12-19 | Ibiden Co., Ltd. | Multilayer build-up wiring board |
US6333857B1 (en) * | 1998-12-25 | 2001-12-25 | Ngk Spark Plug Co., Ltd. | Printing wiring board, core substrate, and method for fabricating the core substrate |
US6538213B1 (en) * | 2000-02-18 | 2003-03-25 | International Business Machines Corporation | High density design for organic chip carriers |
US6534852B1 (en) * | 2000-04-11 | 2003-03-18 | Advanced Semiconductor Engineering, Inc. | Ball grid array semiconductor package with improved strength and electric performance and method for making the same |
JP2002374066A (ja) | 2001-06-14 | 2002-12-26 | Ibiden Co Ltd | 多層プリント配線板の製造方法 |
US6566761B1 (en) * | 2002-05-03 | 2003-05-20 | Applied Micro Circuits Corporation | Electronic device package with high speed signal interconnect between die pad and external substrate pad |
US8129625B2 (en) * | 2003-04-07 | 2012-03-06 | Ibiden Co., Ltd. | Multilayer printed wiring board |
JP2005033176A (ja) * | 2003-06-20 | 2005-02-03 | Ngk Spark Plug Co Ltd | コンデンサ及びコンデンサの製造方法 |
JP2005033195A (ja) * | 2003-06-20 | 2005-02-03 | Ngk Spark Plug Co Ltd | コンデンサ及びコンデンサの製造方法 |
US6885541B2 (en) | 2003-06-20 | 2005-04-26 | Ngk Spark Plug Co., Ltd. | Capacitor, and capacitor manufacturing process |
KR100688103B1 (ko) * | 2003-09-29 | 2007-03-02 | 이비덴 가부시키가이샤 | 프린트 배선판용 층간 절연층, 프린트 배선판 및 그 제조방법 |
TW200531610A (en) | 2004-01-30 | 2005-09-16 | Ibiden Co Ltd | Multilayer printed wiring board and method for manufacturing same |
JP4291729B2 (ja) * | 2004-04-23 | 2009-07-08 | 新光電気工業株式会社 | 基板及び半導体装置 |
CN100544558C (zh) | 2004-04-28 | 2009-09-23 | 揖斐电株式会社 | 多层印刷配线板 |
JP4521223B2 (ja) * | 2004-05-21 | 2010-08-11 | イビデン株式会社 | プリント配線板 |
EP1753278A4 (en) | 2004-05-27 | 2010-05-19 | Ibiden Co Ltd | MULTILAYER PRINTED CIRCUIT BOARD |
JP2006024698A (ja) * | 2004-07-07 | 2006-01-26 | Toshiba Corp | 半導体装置及びその製造方法 |
JP3979405B2 (ja) * | 2004-07-13 | 2007-09-19 | セイコーエプソン株式会社 | 電気光学装置、実装構造体及び電子機器 |
DE102004047753B4 (de) * | 2004-09-30 | 2009-01-02 | Advanced Micro Devices, Inc., Sunnyvale | Verbesserte Chip-Kontaktierungsanordnung für Chip-Träger für Flip-Chip-Anwendungen |
JP4971152B2 (ja) * | 2005-06-13 | 2012-07-11 | イビデン株式会社 | プリント配線板 |
JP4546415B2 (ja) * | 2005-09-01 | 2010-09-15 | 日本特殊陶業株式会社 | 配線基板、セラミックキャパシタ |
US7742314B2 (en) * | 2005-09-01 | 2010-06-22 | Ngk Spark Plug Co., Ltd. | Wiring board and capacitor |
JP4824397B2 (ja) * | 2005-12-27 | 2011-11-30 | イビデン株式会社 | 多層プリント配線板 |
US7462784B2 (en) | 2006-05-02 | 2008-12-09 | Ibiden Co., Ltd. | Heat resistant substrate incorporated circuit wiring board |
US7843302B2 (en) | 2006-05-08 | 2010-11-30 | Ibiden Co., Ltd. | Inductor and electric power supply using it |
US7616470B2 (en) * | 2006-06-16 | 2009-11-10 | International Business Machines Corporation | Method for achieving very high bandwidth between the levels of a cache hierarchy in 3-dimensional structures, and a 3-dimensional structure resulting therefrom |
US8395054B2 (en) | 2009-03-12 | 2013-03-12 | Ibiden Co., Ltd. | Substrate for mounting semiconductor element and method for manufacturing substrate for mounting semiconductor element |
US8829355B2 (en) | 2009-03-27 | 2014-09-09 | Ibiden Co., Ltd. | Multilayer printed wiring board |
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2005
- 2005-12-27 JP JP2005373733A patent/JP4824397B2/ja active Active
-
2006
- 2006-12-27 WO PCT/JP2006/326376 patent/WO2007074941A1/ja active Application Filing
- 2006-12-27 CN CN2006800362256A patent/CN101278392B/zh active Active
- 2006-12-27 TW TW095149141A patent/TWI387424B/zh active
- 2006-12-27 CN CN2010102453328A patent/CN101916752B/zh active Active
- 2006-12-27 KR KR1020087005431A patent/KR100978774B1/ko active IP Right Grant
- 2006-12-27 EP EP06843746A patent/EP1968113A4/en not_active Withdrawn
- 2006-12-27 TW TW100114816A patent/TW201141344A/zh unknown
-
2008
- 2008-06-27 US US12/163,286 patent/US7781681B2/en active Active
-
2010
- 2010-07-23 US US12/842,431 patent/US8334466B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
TWI387424B (zh) | 2013-02-21 |
TW200742524A (en) | 2007-11-01 |
WO2007074941A1 (ja) | 2007-07-05 |
CN101278392A (zh) | 2008-10-01 |
CN101916752A (zh) | 2010-12-15 |
CN101278392B (zh) | 2010-09-29 |
JP4824397B2 (ja) | 2011-11-30 |
JP2007180076A (ja) | 2007-07-12 |
EP1968113A4 (en) | 2012-06-13 |
KR100978774B1 (ko) | 2010-08-30 |
US20100288544A1 (en) | 2010-11-18 |
CN101916752B (zh) | 2012-08-22 |
EP1968113A1 (en) | 2008-09-10 |
US20090000812A1 (en) | 2009-01-01 |
US7781681B2 (en) | 2010-08-24 |
KR20080038204A (ko) | 2008-05-02 |
TW201141344A (en) | 2011-11-16 |
US8334466B2 (en) | 2012-12-18 |
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