WO2005013318B1 - Procede d’obtention d’une couche mince de qualite accrue par co-implantation et recuit thermique - Google Patents
Procede d’obtention d’une couche mince de qualite accrue par co-implantation et recuit thermiqueInfo
- Publication number
- WO2005013318B1 WO2005013318B1 PCT/FR2004/002038 FR2004002038W WO2005013318B1 WO 2005013318 B1 WO2005013318 B1 WO 2005013318B1 FR 2004002038 W FR2004002038 W FR 2004002038W WO 2005013318 B1 WO2005013318 B1 WO 2005013318B1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- finishing step
- rta
- oxidation
- donor substrate
- stabox
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract 22
- 238000002513 implantation Methods 0.000 title claims abstract 5
- 238000000137 annealing Methods 0.000 title claims 6
- 239000000758 substrate Substances 0.000 claims abstract 16
- 238000004151 rapid thermal annealing Methods 0.000 claims abstract 12
- 239000000463 material Substances 0.000 claims abstract 2
- 239000004065 semiconductor Substances 0.000 claims abstract 2
- 230000003647 oxidation Effects 0.000 claims 9
- 238000007254 oxidation reaction Methods 0.000 claims 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 6
- 239000001257 hydrogen Substances 0.000 claims 6
- 229910052739 hydrogen Inorganic materials 0.000 claims 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims 4
- 239000001307 helium Substances 0.000 claims 4
- 229910052734 helium Inorganic materials 0.000 claims 4
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims 4
- 229910052786 argon Inorganic materials 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 claims 1
- 239000000203 mixture Substances 0.000 claims 1
- 230000003313 weakening effect Effects 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Recrystallisation Techniques (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04786008A EP1652230A2 (fr) | 2003-07-29 | 2004-07-29 | Procede d' obtention d' une couche mince de qualite accrue par co-implantation et recuit thermique |
JP2006521623A JP2007500435A (ja) | 2003-07-29 | 2004-07-29 | 共注入と熱アニールによって特性の改善された薄層を得るための方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR03/09304 | 2003-07-29 | ||
FR0309304A FR2858462B1 (fr) | 2003-07-29 | 2003-07-29 | Procede d'obtention d'une couche mince de qualite accrue par co-implantation et recuit thermique |
US10/691,403 | 2003-10-21 | ||
US10/691,403 US7081399B2 (en) | 2003-07-29 | 2003-10-21 | Method for producing a high quality useful layer on a substrate utilizing helium and hydrogen implantations |
Publications (3)
Publication Number | Publication Date |
---|---|
WO2005013318A2 WO2005013318A2 (fr) | 2005-02-10 |
WO2005013318A3 WO2005013318A3 (fr) | 2005-03-24 |
WO2005013318B1 true WO2005013318B1 (fr) | 2005-05-19 |
Family
ID=34117569
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FR2004/002038 WO2005013318A2 (fr) | 2003-07-29 | 2004-07-29 | Procede d’obtention d’une couche mince de qualite accrue par co-implantation et recuit thermique |
Country Status (5)
Country | Link |
---|---|
US (2) | US20060223283A1 (fr) |
EP (1) | EP1652230A2 (fr) |
JP (1) | JP2007500435A (fr) |
KR (1) | KR20060030911A (fr) |
WO (1) | WO2005013318A2 (fr) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2773261B1 (fr) | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
ATE441206T1 (de) | 2004-12-28 | 2009-09-15 | Soitec Silicon On Insulator | Verfahren zum erhalten einer dünnen schicht mit einer geringen dichte von líchern |
FR2880988B1 (fr) * | 2005-01-19 | 2007-03-30 | Soitec Silicon On Insulator | TRAITEMENT D'UNE COUCHE EN SI1-yGEy PRELEVEE |
FR2889887B1 (fr) | 2005-08-16 | 2007-11-09 | Commissariat Energie Atomique | Procede de report d'une couche mince sur un support |
FR2891281B1 (fr) | 2005-09-28 | 2007-12-28 | Commissariat Energie Atomique | Procede de fabrication d'un element en couches minces. |
FR2895563B1 (fr) | 2005-12-22 | 2008-04-04 | Soitec Silicon On Insulator | Procede de simplification d'une sequence de finition et structure obtenue par le procede |
FR2910179B1 (fr) | 2006-12-19 | 2009-03-13 | Commissariat Energie Atomique | PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART |
FR2914495B1 (fr) * | 2007-03-29 | 2009-10-02 | Soitec Silicon On Insulator | Amelioration de la qualite d'une couche mince par recuit thermique haute temperature. |
EP2161741B1 (fr) * | 2008-09-03 | 2014-06-11 | Soitec | Procédé de fabrication d'un semi-conducteur sur un substrat isolant doté d'une densité réduite de défauts SECCO |
US7927975B2 (en) | 2009-02-04 | 2011-04-19 | Micron Technology, Inc. | Semiconductor material manufacture |
FR2947098A1 (fr) | 2009-06-18 | 2010-12-24 | Commissariat Energie Atomique | Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince |
FR2949606B1 (fr) | 2009-08-26 | 2011-10-28 | Commissariat Energie Atomique | Procede de detachement par fracture d'un film mince de silicium mettant en oeuvre une triple implantation |
FR2953640B1 (fr) * | 2009-12-04 | 2012-02-10 | S O I Tec Silicon On Insulator Tech | Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante |
JP5703920B2 (ja) * | 2011-04-13 | 2015-04-22 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
JP2013143407A (ja) | 2012-01-06 | 2013-07-22 | Shin Etsu Handotai Co Ltd | 貼り合わせsoiウェーハの製造方法 |
JP6056516B2 (ja) | 2013-02-01 | 2017-01-11 | 信越半導体株式会社 | Soiウェーハの製造方法及びsoiウェーハ |
JP6086031B2 (ja) | 2013-05-29 | 2017-03-01 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
CN114050123A (zh) * | 2021-10-29 | 2022-02-15 | 上海新昇半导体科技有限公司 | 一种soi晶圆及其最终处理方法 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3412470B2 (ja) * | 1997-09-04 | 2003-06-03 | 三菱住友シリコン株式会社 | Soi基板の製造方法 |
FR2774510B1 (fr) * | 1998-02-02 | 2001-10-26 | Soitec Silicon On Insulator | Procede de traitement de substrats, notamment semi-conducteurs |
JPH11307472A (ja) * | 1998-04-23 | 1999-11-05 | Shin Etsu Handotai Co Ltd | 水素イオン剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
US6236104B1 (en) * | 1998-09-02 | 2001-05-22 | Memc Electronic Materials, Inc. | Silicon on insulator structure from low defect density single crystal silicon |
JP2000124092A (ja) * | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
FR2797713B1 (fr) * | 1999-08-20 | 2002-08-02 | Soitec Silicon On Insulator | Procede de traitement de substrats pour la microelectronique et substrats obtenus par ce procede |
WO2001028000A1 (fr) * | 1999-10-14 | 2001-04-19 | Shin-Etsu Handotai Co., Ltd. | Procede de fabrication d'une tranche de soi, et tranche de soi |
JP3943782B2 (ja) * | 1999-11-29 | 2007-07-11 | 信越半導体株式会社 | 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ |
TW452866B (en) * | 2000-02-25 | 2001-09-01 | Lee Tien Hsi | Manufacturing method of thin film on a substrate |
JP2001274368A (ja) * | 2000-03-27 | 2001-10-05 | Shin Etsu Handotai Co Ltd | 貼り合わせウエーハの製造方法およびこの方法で製造された貼り合わせウエーハ |
FR2809867B1 (fr) * | 2000-05-30 | 2003-10-24 | Commissariat Energie Atomique | Substrat fragilise et procede de fabrication d'un tel substrat |
US6600173B2 (en) * | 2000-08-30 | 2003-07-29 | Cornell Research Foundation, Inc. | Low temperature semiconductor layering and three-dimensional electronic circuits using the layering |
JP2003017723A (ja) * | 2001-06-29 | 2003-01-17 | Shin Etsu Handotai Co Ltd | 半導体薄膜の製造方法及び太陽電池の製造方法 |
FR2827078B1 (fr) * | 2001-07-04 | 2005-02-04 | Soitec Silicon On Insulator | Procede de diminution de rugosite de surface |
US6593212B1 (en) * | 2001-10-29 | 2003-07-15 | The United States Of America As Represented By The Secretary Of The Navy | Method for making electro-optical devices using a hydrogenion splitting technique |
FR2855910B1 (fr) * | 2003-06-06 | 2005-07-15 | Commissariat Energie Atomique | Procede d'obtention d'une couche tres mince par amincissement par auto-portage provoque |
US7772087B2 (en) * | 2003-12-19 | 2010-08-10 | Commissariat A L'energie Atomique | Method of catastrophic transfer of a thin film after co-implantation |
FR2867307B1 (fr) * | 2004-03-05 | 2006-05-26 | Soitec Silicon On Insulator | Traitement thermique apres detachement smart-cut |
FR2925221B1 (fr) * | 2007-12-17 | 2010-02-19 | Commissariat Energie Atomique | Procede de transfert d'une couche mince |
-
2004
- 2004-07-29 JP JP2006521623A patent/JP2007500435A/ja active Pending
- 2004-07-29 KR KR1020067001760A patent/KR20060030911A/ko active Search and Examination
- 2004-07-29 WO PCT/FR2004/002038 patent/WO2005013318A2/fr active Application Filing
- 2004-07-29 EP EP04786008A patent/EP1652230A2/fr not_active Withdrawn
-
2006
- 2006-06-05 US US11/446,357 patent/US20060223283A1/en not_active Abandoned
-
2015
- 2015-02-18 US US14/625,407 patent/US20150221545A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
JP2007500435A (ja) | 2007-01-11 |
WO2005013318A2 (fr) | 2005-02-10 |
WO2005013318A3 (fr) | 2005-03-24 |
US20060223283A1 (en) | 2006-10-05 |
KR20060030911A (ko) | 2006-04-11 |
US20150221545A1 (en) | 2015-08-06 |
EP1652230A2 (fr) | 2006-05-03 |
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