WO2000079580A1 - Procede de fabrication d'un dispositif semi-conducteur - Google Patents
Procede de fabrication d'un dispositif semi-conducteur Download PDFInfo
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- WO2000079580A1 WO2000079580A1 PCT/JP1999/003290 JP9903290W WO0079580A1 WO 2000079580 A1 WO2000079580 A1 WO 2000079580A1 JP 9903290 W JP9903290 W JP 9903290W WO 0079580 A1 WO0079580 A1 WO 0079580A1
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- WIPO (PCT)
- Prior art keywords
- diffusion furnace
- gas
- temperature
- nitrogen
- semiconductor wafer
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 62
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 238000009792 diffusion process Methods 0.000 claims abstract description 105
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 99
- 239000007789 gas Substances 0.000 claims abstract description 85
- 238000000034 method Methods 0.000 claims abstract description 54
- 239000012298 atmosphere Substances 0.000 claims abstract description 48
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 13
- 238000010438 heat treatment Methods 0.000 claims description 12
- 229910001882 dioxygen Inorganic materials 0.000 claims description 9
- 230000000087 stabilizing effect Effects 0.000 claims description 9
- 229910052757 nitrogen Inorganic materials 0.000 abstract description 43
- 229910052760 oxygen Inorganic materials 0.000 abstract description 25
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 24
- 239000001301 oxygen Substances 0.000 abstract description 24
- 230000003647 oxidation Effects 0.000 abstract description 20
- 238000007254 oxidation reaction Methods 0.000 abstract description 20
- 238000001816 cooling Methods 0.000 abstract description 8
- 239000012535 impurity Substances 0.000 abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 238000000137 annealing Methods 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- 239000000758 substrate Substances 0.000 abstract description 5
- 239000000203 mixture Substances 0.000 abstract description 4
- 235000012431 wafers Nutrition 0.000 description 58
- 238000000605 extraction Methods 0.000 description 7
- 238000003780 insertion Methods 0.000 description 4
- 230000037431 insertion Effects 0.000 description 4
- 239000012299 nitrogen atmosphere Substances 0.000 description 4
- 239000010453 quartz Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000011282 treatment Methods 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- 238000011156 evaluation Methods 0.000 description 3
- 230000006641 stabilisation Effects 0.000 description 3
- 238000011105 stabilization Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000003028 elevating effect Effects 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 150000002431 hydrogen Chemical class 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000009279 wet oxidation reaction Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000007872 degassing Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011068 loading method Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000001028 reflection method Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
- C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
- C23C8/08—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases only one element being applied
- C23C8/10—Oxidising
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/005—Oxydation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
- H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
Definitions
- the present invention relates to a method for manufacturing a semiconductor device that generates a thermal oxide film, and more particularly to a method for manufacturing a semiconductor device that can generate a high-quality thermal oxide film.
- the thermal oxide film is formed using, for example, a vertical diffusion furnace 10 as shown in FIG.
- the vertical diffusion furnace 10 includes a cylindrical diffusion furnace 1 made of a quartz tube whose lower end is open. Then, when performing a thermal oxidation treatment, first, a wafer boat 3 on which a plurality of semiconductor wafers are mounted is inserted from the opening, and the opening is sealed. Next, the diffusion furnace 1 is heated from the periphery by the heater 4 arranged around the diffusion furnace 1. Then, in this state, through the gas supply port 5 provided on the upper portion of the diffusion furnace 1 is introduced nitrogen N 2, oxygen O 2, water vapor H 2 0 or the like in a diffusion furnace 1. As a result, the semiconductor wafer on the wafer boat 3 is subjected to a thermal oxidation process.
- an introduction step of introducing the wafer boat 3 into the diffusion furnace 1 a stabilization step of stabilizing the temperature inside the furnace, an oxidation step of forming an oxide film, an annealing step of performing an annealing process, and a wafer boat 3 outside the furnace.
- a stabilization step of stabilizing the temperature inside the furnace an oxidation step of forming an oxide film
- an annealing step of performing an annealing process and a wafer boat 3 outside the furnace.
- drawer step withdrawing, for each series of steps, nitrogen N 2, oxygen O 2, the atmospheric gas, such as water H 2 0 are appropriately introduced into the diffusion furnace 1.
- the wafer boat 3 is pulled in a high-purity nitrogen atmosphere in order to avoid oxidation. I'm trying to start.
- the present applicant considers that when the semiconductor wafer is inserted into the diffusion furnace 1 made of a quartz tube, or when the semiconductor wafer is pulled out from the diffusion furnace 1, Focusing on the fact that oxygen and other impurity gases and particles in the atmosphere are contained in the atmosphere gas due to entrainment in the atmosphere, see, for example, Japanese Patent Application Laid-Open No. Hei 4 (1995) -329960. A series of thermal oxidation treatments were performed using a so-called mouth-lock diffusion furnace equipped with a mouth-lock chamber as shown below.
- the mouthpiece diffusion furnace 100 is provided with a mouthpiece lock chamber 6 at the lower end opening of a diffusion furnace 1 made of a quartz tube.
- the load lock chamber 6 is provided with a pump DP for deaeration, and a gate G! For shutting off the diffusion furnace 1 and the load lock chamber 6, and a mouth for shutting off the lock chamber 6 from the outside.
- a gas inlet 7 for introducing nitrogen gas is provided in a gate G 2 for loading a wafer and a load inlet chamber 6.
- a thermal oxidation treatment was performed in the following procedure.
- an oxidation step is performed in a high-purity atmosphere gas of hydrogen gas and oxygen gas.
- the atmosphere gas in the diffusion furnace 1 is switched to high-purity nitrogen to perform a temperature lowering step.
- the pump DP is operated to evacuate the load lock chamber 6 and nitrogen gas is introduced through the gas inlet 7.
- the gate is opened and the wafer boat 3 is moved to the load lock chamber 6.
- the temperature lowering step and the extracting step were performed in a high-purity nitrogen atmosphere containing no impurity gas such as oxygen in the atmosphere or particles.
- this thermal oxide film generation method when the cooling step and the extraction E extent, the influence of the stress generated at the interface between the thermal oxide film and the silicon substrate, distortion occurs in the S i 0 2 ZS i binding, to stress It turned out to be a brittle insulating film.
- the lifetime when the lifetime was measured for the generated thermal oxide film, the lifetime was compared with the thermal oxide film generated using the conventional method using the vertical diffusion furnace 10 shown in FIG. was also found to drop significantly.
- the present invention has been made in view of the above-mentioned conventional unsolved problems, and has as its object to provide a method of manufacturing a semiconductor device capable of providing a high-quality thermal oxide film. Disclosure of the invention
- the present invention is a method for manufacturing a semiconductor device in which a semiconductor wafer is subjected to a heat treatment in a diffusion furnace having a load lock chamber, wherein the semiconductor wafer is drawn out of the diffusion furnace.
- a method of manufacturing a semiconductor device characterized in that the atmosphere gas of the semiconductor wafer is a mixed gas of a nitrogen gas and an oxygen gas that does not substantially change the oxide film thickness of the semiconductor wafer.
- Atmosphere gas is also the above mixed gas It was made to be.
- the port-lock chamber is evacuated, and then nitrogen gas is introduced into the port-lock chamber, and the semiconductor gas is introduced into the diffusion furnace while introducing the mixed gas.
- the wafer was moved to the mouth lock chamber.
- a moving step of moving the semiconductor wafer from the load lock chamber to the diffusion furnace; and an atmosphere gas of the semiconductor wafer in the moving step and a preceding step in the diffusion furnace until the heat treatment is started. was also used as the mixed gas.
- the pre-process is a temperature raising process of raising the temperature in the diffusion furnace to a predetermined temperature, and a stabilizing process of stabilizing the temperature in the diffusion furnace after the temperature is raised.
- the mixed gas contained 0.1 to 10% of oxygen gas.
- the nitrogen gas and the oxygen gas are high-purity gases having a purity of about 99.999% or more.
- FIG. 1 is a schematic configuration diagram showing an example of a single-dock diffusion furnace used in the present invention.
- Figure 2 shows the cumulative rupture rate versus the stress application time, which represents the results of the TDDB evaluation.
- FIG. 3 is a schematic configuration diagram showing an example of a conventional vertical diffusion furnace. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 schematically shows a load lock diffusion furnace 100 used in the present invention.
- the load lock diffusion furnace 100 includes a cylindrical diffusion furnace 1 made of a quartz tube having an open lower end, and a load lock chamber 6 provided at an opening of the diffusion furnace 1.
- a wafer boat 3 on which a plurality of semiconductor wafers are mounted is inserted into the diffusion furnace 1, and the diffusion furnace 1 is disposed around the diffusion furnace 1 by a heater 4. Heat 1 from its surroundings.
- the gas supply port 5 which conducts the top of the diffusion furnace 1 is introduced nitrogen N 2, oxygen O 2, water vapor H 2 0 or the like in a diffusion furnace 1.
- the gas introduced through the gas supply port 5 is sequentially exhausted from an exhaust port (not shown), and accordingly, the semiconductor wafer is subjected to a thermal oxidation process.
- the opening one-locked chamber 6, openable gate G to block, and the gate G 2 of the wafer ⁇ needful in the mouth one-locked chamber 6 is provided between the diffusion furnace 1 and the load lock chamber 6 ing. Further, a pump DP for deaeration and a gas supply port 7 for supplying nitrogen N 2 gas are provided.
- an introduction step of introducing the wafer boat 3 into the diffusion furnace 1 a heating step of elevating the temperature in the furnace to a desired temperature, a stabilization step of stabilizing the temperature in the furnace, and an oxidation step of forming an oxide film.
- the gate is closed, the wafer boat 3 is once introduced into the load lock chamber 6, the gate G 2 is closed, and the load lock chamber 6 is closed. Replace the atmosphere with a nitrogen gas atmosphere.
- the gate Open G and move wafer boat 3 into diffusion furnace 1.
- the diffusion furnace 1 through the gas supply port 5, by introducing nitrogen N 2 and oxygen 0 2 traces, the furnace environment, the temperature 7 0 0 ° C, nitrogen N 2 9 9%, oxygen 0 2 1% high-purity atmospheric gas is introduced. Then, the gate G, is kept closed, and the diffusion furnace 1 is set to the standby state.
- the temperature in the furnace is raised to 85 (TC) over 30 minutes while maintaining the atmosphere gas in the standby state (temperature rising step). Then, since the furnace temperature to stabilize and improve the temperature uniformity between the semiconductor wafers in and the semiconductor wafer, 8 5 0 ° C, nitrogen N 2 9 9%, oxygen 0 2 1% high purity Hold the semiconductor wafer in the ambient gas for 15 minutes (stabilization process).
- the atmosphere gas in the diffusion furnace 1 was exchanged. Nitrogen N 2 was introduced into the diffusion furnace 1, and the atmosphere gas was removed at a temperature of 850 ° C. and a high-purity atmosphere gas of 100% nitrogen. Perform anneal treatment for a minute (anneal step).
- the lifetime was measured for the thermal oxide film formed by the above steps.
- the influence of the surface condition of the sample on the semiconductor wafer A sample was generated by growing a negligible thermal oxide film (about 80 OA).
- This sample was measured using the waveguide method (reflection method). Specifically, the sample is irradiated with infrared light, and the conductivity that changes due to the generated excess carriers is captured as a change in the amount of reflection of the microphone mouth wave, and the slope of the change in the amount of reflection that decreases exponentially is calculated. Seeking lifetime.
- thermal oxide film formed using a conventional vertical diffusion furnace 10 without a load lock shown in FIG. 3, and a load lock diffusion furnace 100 shown in FIG. thermal oxide film drawer step was generated by performing a nitrogen N 2 1 0 0% of high-purity atmosphere was also measured lifetime Ri by the waveguide method.
- the thermal oxide film formed using the conventional vertical diffusion furnace 10 was formed by the following steps.
- the furnace temperature to stabilize and improve the temperature uniformity between the semiconductor wafer within or semiconductor wafer, 8 5 0 ° C, nitrogen N 2 9 9%, oxygen 0 2 1% in the atmosphere gas Then, the semiconductor wafer is held for 15 minutes.
- the wafer boat 3 is pulled out in a high-purity atmosphere gas of 850 ° C. and nitrogen N 2 100% over 15 minutes (drawing step).
- a thermal oxide film formed by performing the temperature lowering step and the extracting step in a high-purity atmosphere of nitrogen N 2 100% was formed by the following steps. .
- the insertion step, the temperature raising step, the oxidation step, and the annealing step are the same as those in the above-described embodiment.
- the temperature inside the diffusion furnace 1 is increased from 850 ° C to 700 ° C in a high-purity atmosphere gas of nitrogen N 2 100% (actually 99.999% or more). The temperature dropped over 40 minutes.
- nitrogen N 2 was supplied to the load lock chamber 6 from the gas supply port 7. Then, in the diffusion furnace 1, the wafer boat 3 in an atmosphere of 700 ° C. and nitrogen N 2 100% is placed in a mouth-locking chamber 6 filled with nitrogen N 2 for 20 minutes. Pulled out (drawing process).
- the lifetime of the thermal oxide film generated by the method of the present invention was 150 to 300 [s
- the lifetime of the thermal oxide film generated in the conventional vertical diffusion furnace 10 is 150 to 300 [/ s]
- the temperature reduction step and the extraction step are performed with high purity of nitrogen N 2 100%.
- the lifetime of the thermally oxidized film formed in a simple atmosphere was 5 s or less.
- the conventional vertical oxide film can be formed by the same process as that performed when measuring the thermal oxide film and the lifetime described above, based on the method for manufacturing a thermal oxide film according to the present invention.
- a thermal oxide film was formed using a diffusion furnace 10, and the TDDB evaluation was performed on the thermal oxide film.
- a sample having an M0S structure having a thermal oxide film with a thickness of 65 A was prepared using each of the generation methods, and several tens of M0S capacitor TEGs (areas of 6500 A ⁇ m 2 )
- the destruction state current of 1 mA flowing through the sample) when a constant electric field ( ⁇ 12 MV / cm) was continuously applied was investigated. The measurement was performed for one hour.
- FIG. 2 As a result, the result shown in FIG. 2 was obtained.
- ⁇ indicates a case where a thermal oxide film was generated by a conventional thermal oxide film generation method using a vertical diffusion furnace 10; Represents the case.
- the MOS capacitor formed using the thermal oxide film generation method according to the present invention is used. It was confirmed that TEG has a longer membrane life.
- oxygen 0 2 Is about 0.1 to 10%, preferably about 0.1 to 2%.
- concentration should be such that it can recover the bond cut due to the strain at the interface between the silicon substrate and the thermal oxide film and does not promote oxidation.
- oxygen 0 2 introduced in the heating step and stabilizing step is obtained by introducing to prevent mono- Maruetchi the silicon substrate surface in these processes (heat treatment induced electromotive defect), its concentration, It is not limited to 1%. The point is that the concentration should be such that thermal etching can be avoided and oxidation is not promoted.
- the oxidation step, H 2: 0 2 1: there has been described a case where the WET oxidation carried out 2 in an atmospheric gas satisfying, not limited thereto, 0 2 1 0 0 It is also possible to carry out dry oxidation in an atmosphere gas of%.
- the present invention is not limited to this.
- the product When the temperature is not extremely lowered, that is, when the drawing process is performed without performing the temperature lowering process such as when performing the thermal oxidation process at a relatively low temperature, or when the temperature is lowered as a result of the drawing, nitrogen N 2 9 9%, oxygen 0 2 1% to obtain a similar effect even when to carry out a high-purity atmosphere gas can Rukoto.
- the atmosphere gas of the semiconductor wafer is substantially changed from the nitrogen gas to the oxide film thickness of the semiconductor wafer.
- a mixed gas with an oxygen gas that does not fluctuate is used, and the oxygen gas is set to 0.1 to 10%. it can.
- the temperature in the diffusion furnace is lowered to a predetermined temperature, and then the semiconductor wafer is drawn out of the diffusion furnace.
- the ambient gas is also nitrogen gas. Since a gas mixture with oxygen gas is used, a better thermal oxide film can be obtained.
- the load lock chamber is evacuated and then nitrogen gas is introduced into the opening lock chamber. Thereafter, the semiconductor wafer is opened while the mixed gas is introduced into the diffusion furnace. Since the semiconductor wafer is moved to the chamber, impurities such as the air can be blocked, and the semiconductor wafer can be easily moved to the mouth lock chamber in an atmosphere gas composed of a high-purity mixed gas.
- a moving step of moving the semiconductor wafer from the load lock chamber to the diffusion furnace a heating step of elevating the temperature inside the diffusion furnace to a predetermined temperature, and a stabilizing step of stabilizing the temperature inside the diffusion furnace after the temperature rise.
- Heat treatment in the diffusion furnace Since the atmosphere gas of the semiconductor wafer in the pre-process before the start is mixed gas, a higher quality thermal oxide film can be obtained.
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Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9355602A JPH11186257A (ja) | 1997-12-24 | 1997-12-24 | 半導体装置の製造方法 |
DE19983456T DE19983456B4 (de) | 1999-06-21 | 1999-06-21 | Verfahren zur Herstellung einer Halbleitervorrichtung |
US09/763,127 US6593253B1 (en) | 1997-12-24 | 1999-06-21 | Method of manufacturing semiconductor device |
PCT/JP1999/003290 WO2000079580A1 (fr) | 1997-12-24 | 1999-06-21 | Procede de fabrication d'un dispositif semi-conducteur |
KR1020017002165A KR20010106449A (ko) | 1999-06-21 | 1999-06-21 | 반도체 장치의 제조 방법 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9355602A JPH11186257A (ja) | 1997-12-24 | 1997-12-24 | 半導体装置の製造方法 |
PCT/JP1999/003290 WO2000079580A1 (fr) | 1997-12-24 | 1999-06-21 | Procede de fabrication d'un dispositif semi-conducteur |
Publications (1)
Publication Number | Publication Date |
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WO2000079580A1 true WO2000079580A1 (fr) | 2000-12-28 |
Family
ID=26440150
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP1999/003290 WO2000079580A1 (fr) | 1997-12-24 | 1999-06-21 | Procede de fabrication d'un dispositif semi-conducteur |
Country Status (3)
Country | Link |
---|---|
US (1) | US6593253B1 (ja) |
JP (1) | JPH11186257A (ja) |
WO (1) | WO2000079580A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR20020070769A (ko) * | 2001-03-02 | 2002-09-11 | 미쓰비시덴키 가부시키가이샤 | 열처리 장치 및 이를 이용한 열처리 방법 및 반도체장치의 제조 방법 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH11186257A (ja) | 1997-12-24 | 1999-07-09 | Asahi Kasei Micro Syst Co Ltd | 半導体装置の製造方法 |
CN101225550B (zh) * | 2007-01-15 | 2010-05-19 | 中芯国际集成电路制造(上海)有限公司 | 改善晶圆缺陷的方法 |
JP2012174819A (ja) * | 2011-02-21 | 2012-09-10 | Sokudo Co Ltd | 熱処理装置および熱処理方法 |
MY188961A (en) * | 2013-07-01 | 2022-01-14 | Solexel Inc | High-throughput thermal processing methods for producing high-efficiency crystalline silicon solar cells |
CN110620030B (zh) * | 2018-06-19 | 2022-07-22 | 北京北方华创微电子装备有限公司 | 硅晶片钝化方法和硅晶片的少子寿命的获取方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH0478137A (ja) * | 1990-07-20 | 1992-03-12 | Hitachi Ltd | 熱処理装置システム |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS5910060B2 (ja) * | 1976-03-01 | 1984-03-06 | 株式会社日立製作所 | 半導体装置の製造方法 |
JPS544069A (en) | 1977-06-13 | 1979-01-12 | Hitachi Ltd | Producing method of oxide film |
KR0155158B1 (ko) * | 1989-07-25 | 1998-12-01 | 카자마 젠쥬 | 종형 처리 장치 및 처리방법 |
US5271732A (en) * | 1991-04-03 | 1993-12-21 | Tokyo Electron Sagami Kabushiki Kaisha | Heat-treating apparatus |
JPH07101675B2 (ja) | 1991-05-01 | 1995-11-01 | 国際電気株式会社 | 縦型拡散・cvd装置 |
JP3203708B2 (ja) | 1991-10-11 | 2001-08-27 | ソニー株式会社 | 縦型拡散炉による酸化膜の形成方法 |
US5352636A (en) * | 1992-01-16 | 1994-10-04 | Applied Materials, Inc. | In situ method for cleaning silicon surface and forming layer thereon in same chamber |
JP3194062B2 (ja) * | 1993-08-06 | 2001-07-30 | 日本真空技術株式会社 | 熱酸化膜の形成方法 |
US6276072B1 (en) * | 1997-07-10 | 2001-08-21 | Applied Materials, Inc. | Method and apparatus for heating and cooling substrates |
JPH11186257A (ja) | 1997-12-24 | 1999-07-09 | Asahi Kasei Micro Syst Co Ltd | 半導体装置の製造方法 |
JPH11288893A (ja) * | 1998-04-03 | 1999-10-19 | Nec Corp | 半導体製造装置及び半導体装置の製造方法 |
-
1997
- 1997-12-24 JP JP9355602A patent/JPH11186257A/ja active Pending
-
1999
- 1999-06-21 WO PCT/JP1999/003290 patent/WO2000079580A1/ja not_active Application Discontinuation
- 1999-06-21 US US09/763,127 patent/US6593253B1/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0478137A (ja) * | 1990-07-20 | 1992-03-12 | Hitachi Ltd | 熱処理装置システム |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020070769A (ko) * | 2001-03-02 | 2002-09-11 | 미쓰비시덴키 가부시키가이샤 | 열처리 장치 및 이를 이용한 열처리 방법 및 반도체장치의 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
US6593253B1 (en) | 2003-07-15 |
JPH11186257A (ja) | 1999-07-09 |
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