US20160225690A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
US20160225690A1
US20160225690A1 US14/916,136 US201414916136A US2016225690A1 US 20160225690 A1 US20160225690 A1 US 20160225690A1 US 201414916136 A US201414916136 A US 201414916136A US 2016225690 A1 US2016225690 A1 US 2016225690A1
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US
United States
Prior art keywords
metal plate
metal
solder
semiconductor
power unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US14/916,136
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English (en)
Inventor
Takuya Kadoguchi
Takahiro Hirano
Takanori Kawashima
Tomomi Okumura
Masayoshi Nishihata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Toyota Motor Corp
Original Assignee
Denso Corp
Toyota Motor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp, Toyota Motor Corp filed Critical Denso Corp
Assigned to TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION reassignment TOYOTA JIDOSHA KABUSHIKI KAISHA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HIRANO, TAKAHIRO, KADOGUCHI, TAKUYA, KAWASHIMA, TAKANORI, NISHIHATA, MASAYOSHI, OKUMURA, TOMOMI
Publication of US20160225690A1 publication Critical patent/US20160225690A1/en
Abandoned legal-status Critical Current

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Definitions

  • the invention relates to a semiconductor device including opposed first and second metal plates, a plurality of semiconductor elements each interposed between the first metal plate and the second metal plate, metal blocks each interposed between the first metal plate and a corresponding one of the semiconductor elements, solder members each interposed between the first metal plate and a corresponding one of the metal blocks and connecting the first metal plate with the corresponding one of the metal blocks, and a resin molding sealing the semiconductor elements and the metal blocks between the first metal plate and the second metal plate, wherein a face of the first metal plate, which is on an opposite side of a face of the first metal plate to which the metal blocks are connected via the solder members, is exposed from the resin molding.
  • a semiconductor device including a plurality of semiconductor elements each interposed between two opposed metal plates (see, for example, Japanese Patent No. 4702196).
  • the plurality of semiconductor elements are arranged on the metal plates side by side.
  • These plurality of semiconductor elements are respectively a power transistor (IGBT) that constitutes an arm element of a power converter and a reflux diode connected in parallel with the power transistor, and each are bonded to the metal plates via a corresponding solder member and a corresponding metal block.
  • IGBT power transistor
  • grooved metal plate in which grooves are formed on a bonding face, to which the metal blocks are bonded
  • the grooves allow redundant solder to flow thereinto and prevent spreading of the solder.
  • the grooves each are formed on the bonding face of the grooved metal plate along the outer periphery of a region in which the corresponding solder member is provided, and are formed individually in correspondence with the metal blocks arranged on the metal plate.
  • Each of the grooves for the metal blocks is formed in an annular shape on the bonding face of the grooved metal plate so as to have a size designed for the size of the corresponding metal block.
  • the invention provides a semiconductor device that is able to reduce the size of each of metal plates on which a plurality of semiconductor elements or metal blocks are arranged side by side.
  • An aspect of the invention provides a semiconductor device.
  • the semiconductor device includes: opposed first and second metal plates; a plurality of semiconductor elements each interposed between the first metal plate and the second metal plate; a metal block interposed between the first metal plate and each of the semiconductor elements; a solder member interposed between the first metal plate and the metal block and connecting the first metal plate to the metal block; and a resin molding sealing the semiconductor elements and the metal block between the first metal plate and the second metal plate.
  • a face of the first metal plate which is on an opposite side of a face of the first metal plate to which the metal block is connected via the solder member, is exposed from the resin molding.
  • the first metal plate has a groove formed along an outer periphery of a region in which the solder member is provided, the groove collectively surrounding the solder member.
  • FIG. 1 is an overall perspective view of a semiconductor device according to a first embodiment of the invention
  • FIG. 2 is a schematic plan view of the semiconductor device shown in FIG. 1 ;
  • FIG. 3 is a layout plan of the configuration of a relevant portion of the semiconductor device according to the first embodiment
  • FIG. 4 is a cross-sectional view of the semiconductor device according to the first embodiment, taken along the line IVA-IVA or the line IVB-IVB in FIG. 3 ;
  • FIG. 5 is a view that shows bonding faces of metal plates of the semiconductor device according to the first embodiment
  • FIG. 6 is an enlarged cross-sectional view of a relevant portion of the semiconductor device according to the first embodiment
  • FIG. 7A and FIG. 7B are views that show part of the procedure of assembling the semiconductor device according to the first embodiment
  • FIG. 8A and FIG. 8B are views for illustrating an advantageous effect of the semiconductor device according to the first embodiment
  • FIG. 9A to FIG. 9C are views for illustrating the characteristic of a semiconductor device according to a comparative embodiment, which is compared with the semiconductor device according to the first embodiment;
  • FIG. 10A to FIG. 10C are views for illustrating the characteristic of the semiconductor device according to the first embodiment
  • FIG. 11 is a layout plan of the configuration of a relevant portion of a semiconductor device according to a second embodiment of the invention.
  • FIG. 12A and FIG. 12B are cross-sectional views of the semiconductor device according to the second embodiment, respectively taken along the line XIIA-XIIA and the line XIIB-XIIB in FIG. 11 ;
  • FIG. 13 is a layout plan of the configuration of a relevant portion of a semiconductor device according to a third embodiment of the invention.
  • FIG. 14A and FIG. 14B are cross-sectional views of the semiconductor device according to the third embodiment, respectively taken along the line XIVA-XIVA and the line XIVB-XIVB in FIG. 13 ;
  • FIG. 15 is a cross-sectional view of a relevant portion of a semiconductor device according to an alternative embodiment of the invention.
  • FIG. 16A to FIG. 16C are views that respectively show bonding faces of metal plates of semiconductor devices according to alternative embodiments of the invention.
  • FIG. 1 shows an overall perspective view of a semiconductor device 20 according to a first embodiment of the invention.
  • FIG. 2 shows a schematic plan view of the semiconductor device 20 shown in FIG. 1 .
  • the semiconductor device 20 is a power semiconductor module that is mounted on, for example, a hybrid vehicle, an electric vehicle, or the like, and that is used in a power converter, such as an inverter that converts electric power.
  • the semiconductor device 20 has a molded structure in which arm elements arranged at the upper and lower sides of the power converter are integrated with each other, and has a double-sided cooling structure in which heat of incorporated semiconductor elements is radiated from both top face and bottom face.
  • Each of the semiconductor elements 26 , 30 is a power semiconductor switching element, such as an insulated gate bipolar transistor (IGBT), that undergoes switching operation at the time of converting electric power.
  • Each of the semiconductor elements 28 , 32 is a reflux diode that is required in order to circulate current at the time of interrupting a corresponding one of the semiconductor elements 26 , 30 .
  • the semiconductor elements 26 , 30 are respectively referred to as semiconductor switching elements 26 , 30
  • the semiconductor elements 28 , 32 are respectively referred to as diodes 28 , 32 .
  • the upper arm power unit 22 includes the single semiconductor switching element 26 and the single diode 28 as the two semiconductor elements 26 , 28 .
  • the semiconductor switching element 26 and the diode 28 are connected in parallel with each other.
  • the width of the semiconductor switching element 26 which is a semiconductor chip, in the first direction X is substantially the same as the width of the diode 28 , which is a semiconductor chip, in the first direction X.
  • the lower arm power unit 24 includes the single semiconductor switching element 30 and the single diode 32 as the two semiconductor elements 30 , 32 .
  • the semiconductor switching element 30 and the diode 32 are connected in parallel with each other.
  • the width of the semiconductor switching element 30 which is a semiconductor chip, in the first direction X is substantially the same as the width of the diode 32 , which is a semiconductor chip, in the first direction X.
  • the semiconductor switching element 26 and the semiconductor switching element 30 are connected in series with each other between the high-potential power supply and the low-potential power supply.
  • the diode 28 and the diode 32 are connected in series with each other between the high-potential power supply and the low-potential power supply.
  • Each of the semiconductor switching elements 26 , 30 has a collector electrode, an emitter electrode and a gate electrode.
  • the collector electrode is formed on one face of the semiconductor chip, and the emitter electrode and the gate electrode are formed on the other face of the semiconductor chip.
  • a cathode electrode is formed on one face of the semiconductor chip, and an anode electrode is formed on the other face of the semiconductor chip.
  • FIG. 3 shows a layout plan of the configuration of a relevant portion of each of the upper arm power unit 22 and the lower arm power unit 24 of the semiconductor device 20 according to the present embodiment.
  • FIG. 4 shows a cross-sectional view of the upper arm power unit 22 according to the present embodiment, taken along the line IVA-IVA or the line IVB-IVB in FIG. 3 .
  • reference numerals when taken along the line IVB-IVB are shown in parentheses.
  • the lower arm power unit 24 according to the present embodiment also has a similar cross section to the cross section shown in FIG. 4 .
  • FIG. 5 is a view that shows a bonding face of a metal plate of the upper arm power unit 22 and a bonding face of a metal plate of the lower arm power unit 24 according to the present embodiment.
  • FIG. 6 shows an enlarged cross-sectional view of a relevant portion of each of the upper arm power unit 22 and the lower arm power unit 24 according to the present embodiment.
  • the upper arm power unit 22 includes a pair of opposed metal plates 34 , 36 .
  • Each of the metal plates 34 , 36 is a lead frame formed in a planar shape.
  • the metal plates 34 , 36 are electric conductors formed of a metal, such as copper, nickel and aluminum.
  • the surfaces of the metal plates 34 , 36 may be plated with silver, gold, or the like.
  • the metal plates 34 , 36 are respectively provided on both faces of each of the semiconductor switching element 26 and the diode 28 . That is, the semiconductor switching element 26 and the diode 28 each are interposed between the pair of metal plates 34 , 36 , and are sandwiched by both metal plates 34 , 36 .
  • the semiconductor switching element 26 and diode 28 of the upper arm power unit 22 are placed on the metal plates 34 , 36 (specifically, die pads thereof) side by side with space S 1 in an in-plane direction (specifically, second direction Y perpendicular to the first direction X).
  • the metal plates 34 , 36 each have an area larger than the sum of the sizes (areas) of the semiconductor elements 26 , 28 that are the semiconductor chips.
  • the size (length) of the space S 1 between the semiconductor switching element 26 and the diode 28 on each of the metal plates 34 , 36 just needs to be set to a necessary minimum distance in terms of ensuring the heat radiation of each of the semiconductor elements 26 , 28 .
  • the size of the space S 1 is set so as to be at least larger than the height of each of metal blocks 44 , 50 (described later) in a third direction Z.
  • One face of the semiconductor switching element 26 and one face of the diode 28 face the metal plate 34 .
  • One face of the semiconductor switching element 26 is bonded to the metal plate 34 via a solder member 38 .
  • One face of the diode 28 is bonded to the metal plate 34 via a solder member 40 .
  • the solder members 38 , 40 are made of an electrically conductive member, such as tin.
  • the collector electrode of the semiconductor switching element 26 is electrically thermally connected to the metal plate 34 via the solder member 38 .
  • the cathode electrode of the diode 28 is electrically thermally connected to the metal plate 34 via the solder member 40 .
  • a high-potential connection terminal P connected to the high-potential power supply is connected to the metal plate 34 .
  • the voltage of the high-potential power supply is applied to the metal plate 34 via the high-potential connection terminal P.
  • the metal plate 34 is referred to as high-potential metal plate 34 .
  • the other face of the semiconductor switching element 26 and the other face of the diode 28 face the metal plate 36 .
  • the other face of the semiconductor switching element 26 is bonded to the metal plate 36 via a solder member 42 , the metal block 44 and a solder member 46 .
  • the other face of the diode 28 is bonded to the metal plate 36 via a solder member 48 , the metal block 50 and a solder member 52 .
  • the metal block 44 has a size designed for the size of the semiconductor switching element 26 , and is formed in substantially a rectangular parallelepiped shape.
  • the metal block 50 has a size designed for the size of the diode 28 , and is formed in substantially a rectangular parallelepiped shape.
  • the semiconductor switching element 26 and the diode 28 have substantially the same width in the first direction X, so the metal blocks 44 , 50 have substantially the same width in the first direction X.
  • the lower arm power unit 24 has a similar structure to that of the upper arm power unit 22 shown in FIG. 3 and FIG. 4 .
  • the lower arm power unit 24 includes a pair of opposed metal plates 54 , 56 .
  • Each of the metal plates 54 , 56 is a lead frame formed in a planar shape.
  • the metal plates 54 , 56 are electric conductors formed of a metal, such as copper, nickel and aluminum.
  • the surfaces of the metal plates 54 , 56 may be plated with silver, gold, or the like.
  • the metal plates 54 , 56 may be formed of the same metal as the metal plates 34 , 36 . At least one of the metal plates 54 , 56 (for example, only the metal plate 54 ) may be cut after being formed integrally with the metal plate 34 or the metal plate 36 (for example, only the metal plate 34 ).
  • the metal plates 54 , 56 are respectively provided on both faces of each of the semiconductor switching element 30 and the diode 32 . That is, the semiconductor switching element 30 and the diode 32 each are interposed between the pair of metal plates 54 56 , and are sandwiched by both metal plates 54 , 56 .
  • the semiconductor switching element 30 and diode 32 of the lower arm power unit 24 are placed on the metal plates 54 , 56 (specifically, die pads thereof) side by side with space S 2 in an in-plane direction (specifically, the second direction Y).
  • the metal plates 54 , 56 each have an area larger than the sum of the sizes (areas) of the semiconductor elements 30 , 32 that are the semiconductor chips.
  • the size (length) of the space S 2 between the semiconductor switching element 30 and the diode 32 on each of the metal plates 54 , 56 is substantially the same as the size of the above-described space S 1 , and just need's to be set to a necessary minimum distance in terms of ensuring the heat radiation of each of the semiconductor elements 30 , 32 .
  • heat generated from the semiconductor element 30 or the semiconductor element 32 is easily transferred to the metal plates 54 , 56 via the metal blocks 44 , 50 and is then easily released from the radiation faces of the metal plates 54 , 56 to the outside as compared to the case where the heat is transferred to the other one of the semiconductor elements 32 , 30 . Therefore, the heat radiation of the semiconductor elements 30 , 32 is ensured.
  • the lower arm power unit 24 has a similar configuration to that of the upper arm power unit 22 , hereinafter, like reference numerals denote the same components of the lower arm power unit 24 as the components of the upper arm power unit 22 .
  • One face of the semiconductor switching element 30 and one face of the diode 32 face the metal plate 54 .
  • One face of the semiconductor switching element 30 is bonded to the metal plate 54 via the solder member 38 .
  • One face of the diode 32 is bonded to the metal plate 54 via the solder member 40 .
  • the collector electrode of the semiconductor switching element 30 is electrically thermally connected to the metal plate 54 via the solder member 38 .
  • the cathode electrode of the diode 32 is electrically thermally connected to the metal plate 54 via the solder member 40 .
  • the output terminal O is connected to the metal plate 54 .
  • the output terminal O is connected to a load, or the like.
  • the metal plate 54 is referred to as output metal plate 54 .
  • the other face of the semiconductor switching element 30 and the other face of the diode 32 face the metal plate 56 .
  • the other face of the semiconductor switching element 30 is bonded to the metal plate 56 via the solder member 42 , the metal block 44 and the solder member 46 .
  • the other face of the diode 32 is bonded to the metal plate 56 via the solder member 48 , the metal block 50 and the solder member 52 .
  • the emitter electrode of the semiconductor switching element 30 is electrically thermally connected to the metal plate 56 via the solder members 42 , 46 and the metal block 44 .
  • the anode electrode of the diode 32 is electrically thermally connected to the metal plate 56 via the solder members 48 , 52 and the metal block 50 .
  • a low-potential connection terminal N connected to the low-potential power supply is connected to the metal plate 56 .
  • the voltage of the low-potential power supply is applied to the metal plate 56 via the low-potential connection terminal N.
  • the metal plate 56 is referred to as low-potential metal plate 56 .
  • the upper arm power unit 22 and the lower arm power unit 24 are formed such that the high-potential metal plate 34 of the upper arm power unit 22 and the output metal plate 54 of the lower arm power unit 24 face each other via space S 3 in the first direction X and the output metal plate 36 of the upper arm power unit 22 and the low-potential metal plate 56 of the lower arm power unit 24 face each other via the space S 3 in the first direction X.
  • the high-potential metal plate 34 of the upper arm power unit 22 and the output metal plate 54 of the lower arm power unit 24 are located at substantially the same level
  • the output metal plate 36 of the upper arm power unit 22 and the low-potential metal plate 56 of the lower arm power unit 24 are located at substantially the same level.
  • the gate electrode of the semiconductor switching element 26 of the upper arm power unit 22 is connected to one of control terminals 62 via a corresponding one of signal wires 60 .
  • the gate electrode of the semiconductor switching element 30 of the lower arm power unit 24 is connected to one of control terminals 66 via a corresponding one of signal wires 64 .
  • the signal wires 60 , 64 are bonding wires made of, for example, aluminum, copper, or the like.
  • the high-potential connection terminal P, the low-potential connection terminal N and the output terminal O are provided so as to protrude outward from the end of each of the upper arm power unit 22 and the lower arm power unit 24 in the second direction Y (for example, from the outer end adjacent to the diode 28 of the two types of semiconductor elements 26 , 28 arranged side by side in the second direction Y and adjacent to the diode 32 of the two types of semiconductor elements 30 , 32 arranged side by side in the second direction Y).
  • the control terminals 62 , 66 are provided so as to protrude outward from the end across in the second direction Y from the end at which the high-potential connection terminal P, the low-potential connection terminal N and the output terminal O of the upper arm power unit 22 and lower arm power unit 24 are provided.
  • An electronic control unit mainly formed of a microcomputer is connected to the control terminals 62 , 66 .
  • a control signal is supplied from the ECU to the gate electrode of the semiconductor switching element 26 via the corresponding control terminal 62 and the corresponding signal wire 60
  • a control signal is supplied from the ECU to the to the gate electrode of the semiconductor switching element 30 via the corresponding control terminal 66 and the corresponding signal wire 64 .
  • the area (size) of each of the control terminals 62 , 66 through which only a small current flows may be smaller than the area (size) of each of the high-potential connection terminal P, the low-potential connection terminal N and the output terminal O through which a large current can flow.
  • the semiconductor switching element 26 and the diode 28 are sandwiched between the high-potential metal plate 34 and the output metal plate 36 that face each other in the third direction Z.
  • the semiconductor switching element 30 and the diode 32 are sandwiched between the output metal plate 54 and the low-potential metal plate 56 that face each other in the third direction Z.
  • Each of the upper arm power unit 22 and the lower arm power unit 24 has a predetermined thickness in the third direction Z. The thicknesses of the arm power units 22 , 24 in the third direction Z are substantially the same.
  • a groove 70 is provided on the metal plate 36 . That is, the metal plate 36 has the groove 70 .
  • the groove 70 is provided only on the metal plate 36 different from the metal plate 34 to which the semiconductor elements 26 , 28 are directly bonded via the corresponding solder members 38 , 40 .
  • the semiconductor elements 26 , 28 are bonded to the metal plate 36 via the corresponding solder members 42 , 48 , the corresponding metal blocks 44 , 50 and the corresponding solder members 46 , 52 (that is, the metal blocks 44 , 50 are connected to the metal plate 36 via the corresponding solder members 46 , 52 ).
  • the groove 70 is a groove that prevents spreading of the solder members 46 , 52 on a bonding face of the metal plate 36 , to which the metal blocks 44 , 50 are connected via the corresponding solder members 46 , 52 (that is, the solder members 46 , 52 are provided).
  • the groove 70 is formed along the outer peripheries of regions 80 , 82 (regions surrounded by the dashed lines in FIG. 5 ) in which the solder members 46 , 52 are provided on the bonding face of the metal plate 36 to which the metal blocks 44 , 50 are connected, and is formed in an annular and frame shape so as to collectively surround the solder member 46 corresponding to the semiconductor switching element 26 -side metal block 44 and the solder member 52 corresponding to the diode 28 -side metal block 50 .
  • the groove 70 is formed to integrally connect a groove provided along the outer periphery of the region 80 in which the solder member 46 corresponding to the semiconductor switching element 26 -side metal block 44 is provided with a groove provided along the outer periphery of the region 82 in which the solder member 52 corresponding to the diode 28 -side metal block 50 is provided.
  • no groove is formed at a boundary portion between the region 80 and the region 82 .
  • the distance on the metal plate 36 between portions of the groove 70 on both sides of the metal block 44 in the first direction X is substantially the same as the distance on the metal plate 36 between portions of the groove 70 on both sides of the metal block 50 in the first direction X.
  • the width of the region 80 on the metal plate 36 in the first direction X is substantially the same as the width of the region 82 on the metal plate 36 in the first direction X.
  • the solder member 46 is provided in the region 80 .
  • the solder member 52 is provided in the region 82 .
  • the groove 70 is an annular groove that is formed in substantially a rectangular shape collectively surrounding the solder members 46 , 52 on the bonding face of the metal plate 36 , and is continuous around the regions 80 , 82 of the metal plate 36 , in which the solder members 46 , 52 are respectively provided.
  • the depth and width of the groove 70 in the metal plate 36 are set to such an extent that a predetermined amount of solder of the solder members 46 , 52 is allowed to flow in.
  • a groove 72 is provided on the metal plate 56 . That is, the metal plate 56 has the groove 72 .
  • the groove 72 is provided only on the metal plate 56 different from the metal plate 54 to which the semiconductor elements 30 , 32 are directly bonded via the corresponding solder members 38 , 40 .
  • the semiconductor elements 30 , 32 are bonded to the metal plate 56 via the corresponding solder members 42 , 48 , the corresponding metal blocks 44 , 50 and the corresponding solder members 46 , 52 (that is, the metal blocks 44 , 50 are connected to the metal plate 56 via the corresponding solder members 46 , 52 ).
  • the groove 72 is a groove that prevents spreading of the solder members 46 , 52 on a bonding face of the metal plate 56 , to which the metal blocks 44 , 50 are connected via the corresponding solder members 46 , 52 (that is, the solder members 46 , 52 are provided).
  • the groove 72 is formed along the outer peripheries of regions 84 , 86 (regions surrounded by the dashed lines in FIG. 5 ) in which the solder members 46 52 are provided on the bonding face of the metal plate 56 , to which the metal blocks 44 , 50 are connected, and is formed in an annular and frame shape so as to collectively surround the solder member 46 corresponding to the semiconductor switching element 30 -side metal block 44 and the solder member 52 corresponding to the diode 32 -side metal block 50 .
  • the groove 72 is formed to integrally connect a groove provided along the outer periphery of the region 84 in which the solder member 46 corresponding to the semiconductor switching element 30 -side metal block 44 is provided with a groove provided along the outer periphery of the region 86 in which the solder member 52 corresponding to the diode 32 -side metal block 50 is provided.
  • no groove is formed at a boundary portion between the region 84 and the region 86 .
  • the distance on the metal plate 56 between portions of the groove 72 on both sides of the metal block 44 in the first direction X is substantially the same as the distance on the metal plate 56 between portions of the groove 72 on both sides of the metal block 50 in the first direction X.
  • the width of the region 84 on the metal plate 56 in the first direction X is substantially the same as the width of the region 86 on the metal plate 56 in the first direction X.
  • the solder member 46 is provided in the region 84 .
  • the solder member 52 is provided in the region 86 .
  • the groove 72 is an annular groove that is formed in substantially a rectangular shape collectively surrounding the solder members 46 , 52 on the bonding face of the metal plate 56 , and is continuous around the regions 84 , 86 of the metal plate 56 , in which the solder members 46 , 52 are respectively provided.
  • the depth and width of the groove 72 on the metal plate 56 are set to such an extent that a predetermined amount of solder of the solder members 46 , 52 is allowed to flow in.
  • the semiconductor switching element 26 and the diode 28 are arranged side by side with the space S 1 in the second direction Y between the metal plates 34 , 36 .
  • the semiconductor switching element 30 and the diode 32 are arranged side by side with the space S 2 in the second direction Y between the metal plates 54 , 56 .
  • the upper arm power unit 22 and the lower arm power unit 24 are arranged side by side in the first direction X perpendicular to the second direction Y and the third direction Z.
  • the upper arm power unit 22 and the lower arm power unit 24 are arranged such that the semiconductor switching elements 26 , 30 face each other in the first direction X and the diodes 28 , 32 face each other in the first direction X, and are arranged with the space S 3 therebetween.
  • the size (length) of the space S 3 just needs to be set to, for example, a necessary minimum distance in terms of ensuring the heat radiation of each of the semiconductor elements 26 , 28 , 30 , 32 .
  • the output metal plate 36 of the upper arm power unit 22 has a joint portion 36 a that protrudes toward the lower arm power unit 24 at the end in the first direction X.
  • the output metal plate 54 of the lower arm power unit 24 has a joint portion 54 a that protrudes toward the upper arm power unit 22 at the end in the first direction X.
  • the output metal plate 36 of the upper arm power unit 22 and the output metal plate 54 of the lower arm power unit 24 are connected to each other such that the joint portions 36 a , 54 a are in contact with each other.
  • the low-potential metal plate 56 of the lower arm power unit 24 has a joint portion 56 a that protrudes toward the upper arm power unit 22 at the end in the first direction X.
  • the joint portion 56 a is provided so as to be offset in the second direction Y from the joint portion 54 a of the output metal plate 54 and be offset in the second direction Y from the joint portion 36 a of the output metal plate 36 of the upper arm power unit 22 when viewed in the third direction Z.
  • the joint portion 56 a of the low-potential metal plate 56 of the lower arm power unit 24 is in contact with and connected to a protruding portion Na extending from the low-potential connection terminal N.
  • the semiconductor device 20 has a molded structure in which the upper arm power unit 22 and the lower arm power unit 24 arranged side by side in the first direction X are integrally resin-sealed.
  • the semiconductor device 20 includes a resin molding 74 that integrally resin-seals the upper arm power unit 22 and the lower arm power unit 24 .
  • the resin molding 74 seals the semiconductor elements 26 , 28 and metal blocks 44 , 50 of the upper arm power unit 22 between the metal plates 34 , 36 , and seals the semiconductor elements 30 , 32 and metal blocks 44 , 50 of the lower arm power unit 24 between the metal plates 54 , 56 .
  • the resin molding 74 is made of, for example, epoxy resin, or the like.
  • the above-described resin sealing is carried out by pouring the molten resin molding 74 into a die in which the upper arm power unit 22 and the lower arm power unit 24 are accommodated. Pouring of the molten resin molding 74 into the die is carried out in the second direction Y from substantially near the center in the first direction X at the side of the two power units 22 , 24 , at which the control terminals 62 , 66 are provided (that is, the side at which the signal wires 60 , 64 that respectively connect the control terminals 62 , 66 with the gate electrodes of the semiconductor switching elements 26 , 30 are provided).
  • Resin sealing by the resin molding 74 is carried out such that part of each of the high-potential connection terminal P, the low-potential connection terminal N, the output terminal O and the control terminals 62 , 66 is contained. Therefore, part of each of the high-potential connection terminal P, the low-potential connection terminal N, the output terminal O and the control terminals 62 , 66 is exposed so as to protrude outward from the body side (the side surrounded by the resin molding 74 ) of the semiconductor device 20 .
  • Resin sealing is carried out by using the resin molding 74 such that each of faces (heat radiation faces) of the metal plates 34 , 36 , 54 , 56 on the opposite side of the bonding faces bonded to the metal blocks 44 , 50 is exposed to the outside. Therefore, each of the radiation faces of the metal plates 34 , 36 , 54 , 56 on the opposite side of the bonding faces bonded to the metal blocks 44 , 50 is exposed to the outside.
  • a heatsink, or the like, is attached in proximity to each of the heat radiation faces of the metal plates 34 , 36 , 54 , 56 on the opposite side of the bonding faces bonded to the metal blocks 44 , 50 . Therefore, each of the upper arm power unit 22 and the lower arm power unit 24 is cooled from both upper and lower faces.
  • the metal plates 34 , 36 , 54 , 56 function as radiation plates that radiate heat from the upper arm power unit 22 and the lower arm power unit 24 .
  • FIG. 7A and FIG. 7B are views that show part of the procedure of assembling the semiconductor device 20 according to the present embodiment.
  • FIG. 7A shows a state before the metal plates 36 , 56 are assembled.
  • FIG. 7B shows a state after the metal plates 36 , 56 are assembled.
  • the semiconductor elements 26 , 28 are mounted on the bonding face of the high-potential metal plate 34 of the upper arm power unit 22 via the solder members 38 , 40 , and the metal blocks 44 , 50 are laminated and mounted on the semiconductor elements 26 , 28 via the solder members 42 , 48 .
  • the semiconductor elements 30 , 32 are mounted on the bonding face of the output metal plate 54 of the lower arm power unit 24 via the solder members 38 , 40 , and the metal blocks 44 , 50 are laminated and mounted on the semiconductor elements 30 , 32 via the solder members 42 , 48 .
  • the high-potential metal plate 34 and the output metal plate 54 may be integrally formed in advance, the semiconductor elements 26 , 28 , 30 , 32 and the metal blocks 44 , 50 may be mounted on the high-potential metal plate 34 and the output metal plate 54 and then resin-sealed by the resin molding 74 as will be described later. After completion of the resin sealing, a redundant portion coupling the high-potential metal plate 34 to the output metal plate 54 may be cut to be separated.
  • the semiconductor switching element 26 and the diode 28 have substantially the same width in the first direction X.
  • the semiconductor switching element 26 and the diode 28 are arranged side by side on the high-potential metal plate 34 in the second direction Y, and the ends of the semiconductor switching element 26 and the diode 28 in the first direction X are aligned with each other.
  • the semiconductor switching element 30 and the diode 32 have substantially the same width in the first direction X.
  • the semiconductor switching element 30 and the diode 32 are arranged side by side on the output metal plate 54 in the second direction Y, and the ends of the semiconductor switching element 30 and the diode 32 in the first direction X are aligned with each other.
  • the metal blocks 44 , 50 have substantially the same width in the first direction X as described above. At the time of the mounting, the metal blocks 44 , 50 are arranged side by side in the second direction Y, and the ends of the metal blocks 44 , 50 in the first direction X are aligned with each other.
  • the position of the semiconductor switching element 26 in the first direction X and the position of the diode 28 in the first direction X substantially coincide with each other without any offset in the first direction X on the high-potential metal plate 34 .
  • the position of the semiconductor switching element 30 in the first direction X and the position of the diode 32 in the first direction X substantially coincide with each other without any offset in the first direction X on the output metal plate 54 .
  • the position of the metal block 44 in the first direction X and the position of the metal block 50 in the first direction X substantially coincide with each other without any offset in the first direction X on each of the high-potential metal plate 34 and the output metal plate 54 .
  • the signal wires 60 are subsequently bonded to the semiconductor switching element 26 , and then, as shown in FIG. 7B , the output metal plate 36 is laminated and mounted on the metal blocks 44 , 50 via the solder members 46 , 52 .
  • the signal wires 64 are subsequently bonded to the semiconductor switching element 30 and then, as shown in FIG. 7B , the low-potential metal plate 56 is laminated and mounted on the metal blocks 44 , 50 via the solder members 46 , 52 .
  • solder foils that constitute the solder members 46 , 52 are attached to the surfaces of the metal blocks 44 , 50 , the metal plates 36 , 56 are laminated on the metal blocks 44 , 50 such that each of the grooves 70 , 72 collectively surrounds the corresponding solder members 46 , 52 , and the solder foils are melted to bond the metal blocks 44 , 50 to the metal plates 36 , 56 .
  • the structure of the upper arm power unit 22 and the structure of the lower arm power unit 24 are subsequently pressed while being accommodated in a die, and then the resin molding 74 is poured into the die.
  • the upper arm power unit 22 and the lower arm power unit 24 are resin-sealed by the resin molding 74 .
  • part of the resin molding 74 and part of each of the metal plates 34 , 36 , 54 , 56 are cut.
  • the heat radiation faces of the metal plates 34 , 36 , 54 , 56 are exposed to the outside.
  • the semiconductor device 20 is manufactured by assembling the following manner.
  • the semiconductor switching element 26 and the diode 28 are sealed between the metal plates 34 , 36 of the upper arm power unit 22 by the resin molding 74 .
  • the semiconductor switching element 30 and the diode 32 are sealed between the metal plates 54 , 56 of the lower arm power unit 24 by the resin molding 74 .
  • those upper arm power unit 22 and lower arm power unit 24 are integrated by the resin molding 74 .
  • solder of the solder members 46 , 52 flowed into the grooves 70 , 72 of the metal plates 36 , 56 , stay in the grooves 70 , 72 . Therefore, with the grooves 70 , 72 formed on the bonding faces of the metal plates 36 , 56 , it is possible to prevent solder of the solder members 46 , 52 from spreading in the in-plane directions of the metal plates 36 , 56 .
  • the grooves 70 , 72 of the metal plates 36 , 56 it is possible to absorb tolerance variations in the height of each of the upper arm power unit 22 and the lower arm power unit 24 in the lamination direction Z. It is difficult to provide the semiconductor elements 26 to 32 with grooves that allow redundant solder for absorbing tolerance variations to flow thereinto because there may occur an inconvenience that, for example, the solder members 42 , 48 adhere to the surfaces of the semiconductor elements 26 to 32 due to wraparound of solder of the solder members 42 , 48 .
  • FIG. 8A and FIG. 8B are views for illustrating the advantageous effect of the semiconductor device 20 according to the present embodiment.
  • FIG. 8A is a view that shows a bonding face of a metal plate 102 of a semiconductor device 100 according to a comparative embodiment, which is compared with the semiconductor device 20 according to the present embodiment.
  • FIG. 8B is a view that shows the bonding face of each of the metal plates 36 , 56 of the semiconductor device 20 according to the present embodiment.
  • the groove 70 formed on the bonding face of the metal plate 36 is formed on the bonding face along the outer peripheries of the regions 80 , 82 in which the solder members 46 , 52 are provided so as to collectively surround the semiconductor switching element 26 -side solder member 46 and the diode 28 -side solder member 52
  • the groove 72 formed on the bonding face of the metal plate 56 is formed on the bonding face along the outer peripheries of the regions 84 , 86 in which the solder members 46 , 52 are provided so as to collectively surround the semiconductor switching element 30 -side solder member 46 and the diode 32 -side solder member 52 (see FIG. 8B ).
  • the groove 70 of the upper arm power unit 22 prevents spreading of both the semiconductor switching element 26 -side solder member 46 and the diode 28 -side solder member 52 .
  • the groove 72 of the lower arm power unit 24 prevents spreading of both the semiconductor switching element 30 -side solder member 46 and the diode 32 -side solder member 52 .
  • a groove corresponding to the solder member 46 and a groove corresponding to the solder member 52 do not need to be provided separately between the region in which the semiconductor switching element 26 -side solder member 46 is provided and the region in which the diode 28 -side solder member 52 is provided on the bonding face of the metal plate 36 or between the region in which the semiconductor switching element 30 -side solder member 46 is provided and the region in which the diode 32 -side solder member 52 is provided on the bonding face of the metal plate 56 .
  • the semiconductor device 20 it is not required to consider the widths of both the grooves 104 , 106 unlike the semiconductor device 100 according to the comparative embodiment at the time of determining the size of the space S 1 between the semiconductor switching element 26 and the diode 28 that are placed side by side in the second direction Y on the metal plates 34 , 36 of the upper arm power unit 22 , and it is sufficient that the size of the space S 1 is set to a necessary minimum distance for ensuring the heat radiation of each of the semiconductor elements 26 , 28 . This also applies to the size of the space S 2 between the semiconductor switching element 30 and diode 32 of the lower arm power unit 24 .
  • the semiconductor device 20 according to the present embodiment in comparison with the semiconductor device 100 according to the comparative embodiment, it is possible to reduce the width of each of the metal plates 34 , 36 in the second direction Y, on which the two types of semiconductor elements 26 , 28 of the upper arm power unit 22 are arranged side by side in the second direction Y, and the width of each of the metal plates 54 , 56 in the second direction Y, on which the two types of semiconductor elements 30 , 32 of the lower arm power unit 24 are arranged side by side in the second direction Y.
  • it is possible to reduce the size and weight of each of the metal plates 34 , 36 , 54 , 56 with the result that it is possible to reduce the size and weight of the semiconductor device 20 itself.
  • the width of the semiconductor switching element 26 of the upper arm power unit 22 in the first direction X is substantially the same as the width of the diode 28 of the upper arm power unit 22 in the first direction X.
  • the width of the semiconductor switching element 30 of the lower arm power unit 24 in the first direction X is substantially the same as the width of the diode 32 of the lower arm power unit 24 in the first direction X.
  • the reel width of the solder foil that is used as the solder member 38 that bonds the metal plate 34 to the semiconductor switching element 26 in the upper arm power unit 22 is substantially the same as the reel width of the solder foil that is used as the solder member 40 that bonds the metal plate 34 to the diode 28 .
  • the reel width of the solder foil that is used as the solder member 38 that bonds the metal plate 54 to the semiconductor switching element 30 in the lower arm power unit 24 is substantially the same as the reel width of the solder foil that is used as the solder member 40 that bonds the metal plate 54 to the diode 32 .
  • the widths of the metal blocks 44 , 50 in the first direction X are substantially the same.
  • the reel width of the solder foil that is used as the solder member 42 that bonds the semiconductor switching element 26 to the metal block 44 in the upper arm power unit 22 is substantially the same as the reel width of the solder foil that is used as the solder member 48 that bonds the diode 28 to the metal block 50 .
  • the reel width of the solder foil that is used as the solder member 46 that bonds the metal block 44 to the metal plate 36 in the upper arm power unit 22 is substantially the same as the reel width of the solder foil that is used as the solder member 52 that bonds the metal block 50 to the metal plate 36 .
  • the reel width of the solder foil that is used as the solder member 42 that bonds the semiconductor switching element 30 to the metal block 44 is substantially the same as the reel width of the solder foil that is used as the solder member 48 that bonds the diode 32 to the metal block 50
  • the reel width of the solder foil that is used as the solder member 46 that bonds the metal block 44 to the metal plate 56 is substantially the same as the reel width of the solder foil that is used as the solder member 52 that bonds the metal block 50 to the metal plate 56 .
  • the semiconductor device 20 has an integrated molded structure in which the upper arm power unit 22 and the lower arm power unit 24 are mounted side by side in the first direction X.
  • the groove 70 provided on the metal plate 36 of the upper arm power unit 22 is formed in substantially a rectangular shape so as to collectively surround the solder member 46 corresponding to the semiconductor switching element 26 -side metal block 44 and the solder member 52 corresponding to the diode 28 -side metal block 50 .
  • the groove 72 provided on the metal plate 56 of the lower arm power unit 24 is formed in substantially a rectangular shape so as to collectively surround the solder member 46 corresponding to the semiconductor switching element 30 -side metal block 44 and the solder member 52 corresponding to the diode 32 -side metal block 50 .
  • the arrangement positional relationship between the solder member 46 corresponding to the semiconductor switching element 26 -side metal block 44 and the solder member 52 corresponding to the diode 28 -side metal block 50 which are arranged side by side in the second direction Y within the frame surrounded by the groove 70 of the metal plate 36 or the arrangement positional relationship between the solder member 46 corresponding to the semiconductor switching element 30 -side metal block 44 and the solder member 52 corresponding to the diode 32 -side metal block 50 , which are arranged side by side in the second direction Y within the frame surrounded by the groove 72 of the metal plate 56 , is allowed to be inverted within the frame surrounded by the corresponding one of the groove
  • the semiconductor switching element 26 and the solder member 46 may be arranged on the metal plate 36 at the side in the second direction Y, at which the joint portion 36 a is provided, and the diode 28 and the solder member 52 may be arranged at the side in the second direction Y, at which the joint portion 36 a is not provided, or the semiconductor switching element 30 and the solder member 46 may be arranged on the metal plate 56 at the side in the second direction Y, at which the joint portion 56 a is provided, and the diode 32 and the solder member 52 may be arranged at the side in the second direction Y, at which the joint portion 56 a is not provided.
  • the diode 28 and the solder member 52 may be arranged on the metal plate 36 at the side in the second direction Y, at which the joint portion 36 a is provided and the semiconductor switching element 26 and the solder member 46 may be aiTanged at the side in the second direction Y, at which the joint portion 36 a is not provided, or the diode 32 and the solder member 52 may be arranged on the metal plate 56 at the side in the second direction Y, at which the joint portion 56 a is provided and the semiconductor switching element 30 and the solder member 46 may be arranged at the side in the second direction Y, at which the joint portion 56 a is not provided.
  • the orientation in which the two grooves 104 , 106 are arranged on the metal plate 102 that is used for the upper arm power unit 22 in which the two types of semiconductor elements 26 , 28 are arranged is inverted in the second direction Y from the orientation in which the two grooves 104 , 106 are arranged on the metal plate 102 that is used for the lower arm power unit 24 in which the two types of semiconductor elements 30 , 32 are mounted. Therefore, it is difficult to use the same member for the upper arm power unit 22 -side metal plate 102 and the lower arm power unit 24 -side metal plate 102 .
  • FIG. 9A to FIG. 9C are views for illustrating the characteristic of a semiconductor device 110 according to a comparative embodiment, which is compared with the semiconductor device 20 according to the present embodiment.
  • FIG. 10A to FIG. 10C are views for illustrating the characteristic of the semiconductor device 20 according to the present embodiment.
  • FIG. 9A shows the layout of the semiconductor elements on the metal plate in the semiconductor device.
  • FIG. 10A shows the layout of the semiconductor elements on the metal plate in the semiconductor device.
  • FIG. 9B shows the cross-sectional view of the semiconductor device shown in FIG. 9A .
  • FIG. 10B shows the cross-sectional view of the semiconductor device shown in FIG. 10A .
  • FIG. 9C is a view that shows a shearing stress based on a location on the cross section shown in FIG. 9B in the semiconductor device.
  • FIG. 10C is a view that shows a shearing stress based on a location on the cross section shown in FIG. 10B in the semiconductor device.
  • the semiconductor switching element 26 and diode 28 of the upper arm power unit 22 have substantially the same width in the first direction X, and are arranged on the metal plates 34 , 36 side by side in the second direction Y such that the ends in the first direction X are aligned with each other.
  • the semiconductor switching element 30 and diode 32 of the lower arm power unit 24 have substantially the same width in the first direction X and are arranged on the metal plates 54 , 56 side by side in the second direction Y such that the ends in the first direction X are aligned with each other.
  • each of the semiconductor switching elements 26 , 30 in the first direction X is different from the width of a corresponding one of the diodes 28 , 32 in the first direction X as shown in FIG. 9A .
  • the semiconductor switching element 26 and the diode 28 or the semiconductor switching element 30 and the diode 32 are arranged on the pair of metal plates 112 , 114 side by side in the second direction Y, while the ends in the first direction X are not aligned with each other.
  • the point at which the orientation of shearing stress changes at the contact face between the resin molding 74 and the metal plate 112 or the metal plate 114 is farther from the end of the semiconductor switching element 26 or the semiconductor switching element 30 in the second direction Y (see FIG. 9B and FIG. 9C ). Therefore, in the semiconductor device 110 according to the comparative embodiment, a distance of progress at the time of peeling of the resin molding 74 from the metal plate 112 or the metal plate 114 extends, so the peeling becomes easy to progress.
  • the semiconductor switching element 26 and the diode 28 or the semiconductor switching element 30 and the diode 32 do not face each other in the second direction Y, so the semiconductor switching element 26 and the diode 28 or the semiconductor switching element 30 and the diode 32 face each other in the second direction Y.
  • the point at which the direction of shearing stress changes at the contact face between the resin molding 74 and each of the metal plate 34 , 36 , 54 , 56 is substantially the center between the end of a corresponding one of the semiconductor switching elements 26 , 30 in the second direction Y and the end of a corresponding one of the diodes 28 , 32 in the second direction Y.
  • the shearing stress at the space S 1 in the second direction Y between the semiconductor switching element 26 and the diode 28 or the shearing stress at the space S 2 in the second direction Y between the semiconductor switching element 30 and the diode 32 is balanced in the second direction Y with respect to substantially the center of the space S 1 or the space S 2 .
  • the semiconductor switching elements 26 , 30 and the diodes 28 , 32 may be regarded as “semiconductor elements” according to the aspect of the invention
  • one of the pair of metal plates 34 , 36 of the upper arm power unit 22 and one of the pair of metal plates 54 , 56 of the lower arm power unit 24 may be regarded as “first metal plates” according to the aspect of the invention
  • the other one of the metal plates 34 , 36 of the upper arm power unit 22 and the other one of the metal plates 54 , 56 of the lower arm power unit 24 may be regarded as “second metal plates” according to the aspect of the invention
  • the regions 80 , 82 , 84 , 86 may be regarded as “regions” according to the aspect of the invention
  • the second direction Y may be regarded as “predetermined direction” according to the aspect of the invention
  • the first direction X may be regarded as “perpendicular direction” according to the aspect of the invention.
  • FIG. 11 is a layout plan, of the configuration of a relevant portion of each of an upper arm power unit 202 and a lower arm power unit 204 of a semiconductor device 200 according to a second embodiment of the invention.
  • FIG. 12A and FIG. 12B are cross-sectional views of the upper arm power unit 202 according to the present embodiment, taken along the line XIIA-XIIA and the line XIIB-XIIB in FIG. 11 .
  • FIG. 12A shows the cross-sectional view taken along the line XIIA-XIIA.
  • FIG. 12B shows the cross-sectional view taken along the line XIIB-XIIB.
  • like reference numerals denote the same components as those used in the above-described first embodiment, and the description thereof is omitted or simplified.
  • the semiconductor device 200 includes the upper arm power unit 202 and the lower arm power unit 204 .
  • the upper arm power unit 202 constitutes an upper arm that is connected to the high-potential power supply.
  • the lower arm power unit 204 constitutes a lower arm that is connected to the low-potential power supply.
  • the upper arm power unit 202 includes two different types of semiconductor elements 206 , 208 .
  • the lower arm power unit 204 includes two different types of semiconductor elements 210 , 212 .
  • the semiconductor elements 206 , 208 , 210 , 212 each are formed of a semiconductor chip formed in a thin rectangular shape, and respectively have the same configurations and functions as the semiconductor elements 26 , 28 , 30 , 32 according to the above-described first embodiment except the widths thereof.
  • the upper arm power unit 202 and the lower arm power unit 204 respectively have the same configurations and functions as the upper arm power unit 22 and the lower arm power unit 24 according to the first embodiment except the widths of the semiconductor elements 206 , 208 , 210 , 212 , the sizes of solder members associated with the widths, and the like.
  • the width of the semiconductor switching element 206 in the first direction X is different from the width of the diode 208 in the first direction X.
  • the width of the semiconductor switching element 210 in the first direction X is different from the width of the diode 212 in the first direction X.
  • the width of the diode 208 in the first direction X is larger than the width of the semiconductor switching element 206 in the first direction X
  • the width of the diode 212 in the first direction X is larger than the width of the semiconductor switching element 210 in the first direction X.
  • the metal blocks 44 , 50 are formed in substantially a rectangular parallelepiped shape, and the metal blocks 44 , 50 have substantially the same width in the first direction X.
  • the semiconductor switching element 206 and the diode 208 are arranged side by side in the second direction Y on the metal plates 34 , 36 , and the metal blocks 44 , 50 are respectively laminated on the semiconductor elements 206 , 208 .
  • the metal block 44 is laminated on the semiconductor switching element 206 such that the metal block 44 is located at substantially the center in the first direction X with respect to the semiconductor element 206 .
  • the metal block 50 is laminated on the diode 208 such that the metal block 50 is located at substantially the center in the first direction X with respect to the semiconductor element 208 .
  • These metal blocks 44 , 50 are arranged side by side in the second direction Y on the metal plates 34 , 36 such that the ends in the first direction X are aligned with each other without any offset in the first direction X.
  • the semiconductor switching element 210 and the diode 212 are arranged side by side in the second direction Y on the metal plates 54 , 56 , and the metal blocks 44 , 50 are respectively laminated on the semiconductor elements 210 , 212 .
  • the metal block 44 is laminated on the semiconductor switching element 210 such that the metal block 44 is located at substantially the center in the first direction X with respect to the semiconductor element 210 .
  • the metal block 50 is laminated on the diode 212 such that the metal block 50 is located at substantially the center in the first direction X with respect to the semiconductor element 212 .
  • These metal blocks 44 , 50 are arranged side by side in the second direction Y on the metal plates 54 , 56 such that the ends in the first direction X are aligned without any offset in the first direction X.
  • the groove 72 formed on the bonding face of the metal plate 56 is formed on the bonding face along the outer peripheries of the regions 84 , 86 in which the solder members 46 , 52 are provided, and is formed in an annular and frame shape so as to collectively surround the solder member 46 corresponding to the semiconductor switching element 210 -metal block 44 and the solder member 52 corresponding to the diode 212 -side metal block 50 .
  • the groove 70 is an annular groove that is formed in substantially a rectangular shape collectively surrounding the solder members 46 , 52 on the bonding face of the metal plate 36 , and is continuous around the regions 80 , 82 of the metal plate 36 , in which the solder members 46 , 52 are respectively provided.
  • the groove 72 is an annular groove that is formed in substantially a rectangular shape collectively surrounding the solder members 46 , 52 on the bonding face of the metal plate 56 , and is continuous around the regions 84 , 86 of the metal plate 56 , in which the solder members 46 , 52 are respectively provided.
  • the groove 70 of the upper arm power unit 202 prevents spreading of both the semiconductor switching element 206 -side solder member 46 and the diode 208 -side solder member 52 .
  • the groove 72 of the lower arm power unit 204 prevents spreading of both the semiconductor switching element 210 -side solder member 46 and the diode 212 -side solder member 52 .
  • a groove corresponding to the solder member 46 and a groove corresponding to the solder member 52 do not need to be provided individually for the region in which the semiconductor switching element 206 -side solder member 46 is provided and the region in which the diode 208 -side solder member 52 is provided on the bonding face of the metal plate 36 or for the region in which the semiconductor switching element 210 -side solder member 46 is provided and the region in which the diode 212 -side solder member 52 is provided on the bonding face of the metal plate 56 .
  • the semiconductor device 200 it is possible to reduce the width of each of the metal plates 34 , 36 in the second direction Y, on which the two types of semiconductor elements 206 , 208 of the upper arm power unit 202 are arranged side by side in the second direction Y, and the width of each of the metal plates 54 , 56 in the second direction Y, on which the two types of semiconductor elements 210 , 212 of the lower arm power unit 204 are arranged side by side in the second direction Y. Therefore, it is possible to reduce the size and weight of each of the metal plates 34 , 36 , 54 , 56 , and, by extension, it is possible to reduce the size and weight of the semiconductor device 200 itself.
  • the reel width of the solder foil that is used as the solder member 42 that bonds the semiconductor switching element 206 to the metal block 44 in the upper arm power unit 202 is substantially the same as the reel width of the solder foil that is used as the solder member 48 that bonds the diode 208 to the metal block 50 .
  • the reel width of the solder foil that is used as the solder member 46 that bonds the metal block 44 to the metal plate 36 in the upper arm power unit 202 is substantially the same as the reel width of the solder foil that is used as the solder member 52 that bonds the metal block 50 to the metal plate 36 .
  • the reel width of the solder foil that is used as the solder member 42 that bonds the semiconductor switching element 210 to the metal block 44 is substantially the same as the reel width of the solder foil that is used as the solder member 48 that bonds the diode 212 to the metal block 50
  • the reel width of the solder foil that is used as the solder member 46 that bonds the metal block 44 to the metal plate 56 is substantially the same as the reel width of the solder foil that is used as the solder member 52 that bonds the metal block 50 to the metal plate 56 .
  • the arrangement positional relationship between the semiconductor switching element 206 -side solder member 46 and the diode 208 -side solder member 52 which are arranged side by side in the second direction Y within the frame surrounded by the groove 70 of the metal plate 36 or the arrangement positional relationship between the semiconductor switching element 210 -side solder member 46 and the diode 212 -side solder member 52 , which are arranged side by side in the second direction Y within the frame surrounded by the groove 72 of the metal plate 56 , is allowed to be inverted within the frame surrounded by the corresponding one of the grooves 70 , 72 .
  • the semiconductor switching element 206 and the solder member 46 may be arranged on the metal plate 36 at the side in the second direction Y, at which the joint portion 36 a is provided, and the diode 208 and the solder member 52 may be arranged at the side in the second direction Y, at which the joint portion 36 a is not provided, or the semiconductor switching element 210 and the solder member 46 may be arranged on the metal plate 56 at the side in the second direction Y, at which the joint portion 56 a is provided, and the diode 212 and the solder member 52 may be arranged at the side in the second direction Y, at which the joint portion 56 a is not provided.
  • the diode 208 and the solder member 52 may be arranged on the metal plate 36 at the side in the second direction Y, at which the joint portion 36 a is provided and the semiconductor switching element 206 and the solder member 46 may be arranged at the side in the second direction Y, at which the joint portion 36 a is not provided, or the diode 212 and the solder member 52 may be arranged on the metal plate 56 at the side in the second direction Y, at which the joint portion 56 a is provided and the semiconductor switching element 210 and the solder member 46 may be arranged at the side in the second direction Y, at which the joint portion 56 a is not provided.
  • the semiconductor device 200 it is possible to commonalize the metal plate 36 that is used for the upper arm power unit 202 and the metal plate 56 that is used for the lower arm power unit. 204 , and it is possible to constitute both the upper arm power unit 202 and the lower arm power unit 204 by changing the order of arrangement of the semiconductor switching element 206 and the diode 208 and the order of arrangement of the semiconductor switching element 210 and the diode 212 in the second direction Y on the metal plates 36 , 56 having the same shape. Therefore, it is possible to reduce the types of components (specifically the metal plates 36 , 56 ) that are used in the semiconductor device 200 into only one-type component.
  • the semiconductor device 300 includes the upper arm power unit 302 and the lower arm power unit 304 .
  • the upper arm power unit 302 constitutes an upper arm that is connected to the high-potential power supply.
  • the lower arm power unit 304 constitutes a lower arm that is connected to the low-potential power supply.
  • the upper arm power unit 302 includes two different types of semiconductor elements 306 , 308 .
  • the lower arm power unit 304 includes two different types of semiconductor elements 310 , 312 .
  • the width of the semiconductor switching element 306 in the first direction X is different from the width of the diode 308 in the first direction X.
  • the width of the semiconductor switching element 310 in the first direction X is different from the width of the diode 312 in the first direction X.
  • the width of the diode 308 in the first direction X is smaller than the width of the semiconductor switching element 306 in the first direction X
  • the width of the diode 312 in the first direction X is smaller than the width of the semiconductor switching element 310 in the first direction X.
  • one face of the semiconductor switching element 306 is bonded to the metal plate 34 via the solder member 38 .
  • One face of the diode 308 is bonded to the metal plate 34 via the solder member 40 .
  • the other face of the semiconductor switching element 306 is bonded to the metal plate 36 via the solder member 42 , a metal block 314 and the solder member 46 .
  • the other face of the diode 308 is bonded to the metal plate 36 via the solder member 48 , a metal block 316 and the solder member 52 .
  • one face of the semiconductor switching element 310 is bonded to the metal plate 54 via the solder member 38 .
  • One face of the diode 312 is bonded to the metal plate 54 via the solder member 40 .
  • the other face of the semiconductor switching element 310 is bonded to the metal plate 56 via the solder member 42 , the metal block 314 and the solder member 46 .
  • the other face of the diode 312 is bonded to the metal plate 36 via the solder member 48 , the metal block 316 and the solder member 52 .
  • the metal block 314 has a size designed for the size of the semiconductor switching element 306 or the semiconductor switching element 310 , and is formed in substantially a rectangular parallelepiped shape as shown in FIG. 14A .
  • the metal block 316 has a size designed for the size of the diode 308 or the diode 312 , but the metal block 316 is formed in a shape different from the shape of the metal block 314 .
  • the shape of the metal block 314 is different from the shape of the metal block 316 .
  • the shape of the metal block 314 is substantially a rectangular parallelepiped shape, while the shape of the metal block 316 is a protruded shape in cross section as shown in FIG. 14B .
  • the metal block 316 is formed as follows.
  • the width of a portion in the first direction X, at which the metal plate 36 -side solder member 52 is provided is substantially the same as the width of the metal block 314 in the first direction X, and the width of a portion in the first direction X, at which the metal plate 56 -side solder member 52 is provided, is substantially the same as the width of the metal block 314 in the first direction X.
  • the width of a portion in the first direction X, at which the diode 308 -side solder member 48 is provided is designed for the width of the diode 308 in the first direction X and is smaller than the width of a portion in the first direction X, at which the metal plate 36 -side solder member 52 is provided (that is, the width of the metal block 314 in the first direction X), and the width of a portion in the first direction X, at which the diode 312 -side solder member 48 is provided, is designed for the width of the diode 312 in the first direction X and is smaller than the width of a portion in the first direction X, at which the metal plate 56 -side solder member 52 is provided (that is, the width of the metal block 314 in the first direction X).
  • the width of the metal block 314 in the first direction X is substantially the same as the width of the portion of the metal block 316 in the first direction X, at which the metal plate 36 -side solder member 52 is provided.
  • the width of the metal block 314 in the first direction X is substantially the same as the width of the portion of the metal block 316 in the first direction X, at which the metal plate 56 -side solder member 52 is provided.
  • the semiconductor switching element 306 and the diode 308 are arranged side by side in the second direction Y on the metal plates 34 , 36 , the metal block 314 is laminated on the semiconductor element 306 , and the metal block 316 is laminated on the semiconductor element 308 .
  • the metal block 314 is laminated on the semiconductor switching element 306 such that the metal block 314 is located at substantially the center in the first direction X with respect to the semiconductor element 306 .
  • the metal block 316 is laminated on the diode 308 such that the metal block 316 is located at substantially the center in the first direction X with respect to the semiconductor element 308 .
  • These metal blocks 314 , 316 are arranged side by side in the second direction Y on the metal plates 34 , 36 such that the ends in the first direction X are aligned with each other without any offset in the first direction X.
  • the semiconductor switching element 310 and the diode 312 are arranged side by side in the second direction Y on the metal plates 54 , 56 , the metal block 314 is laminated on the semiconductor element 310 , and the metal block 316 is laminated on the semiconductor element 312 .
  • the metal block 314 is laminated on the semiconductor switching element 310 such that the metal block 314 is located at substantially the center in the first direction X with respect to the semiconductor element 310 .
  • the metal block 316 is laminated on the diode 312 such that the metal block 316 is located at substantially the center in the first direction X with respect to the semiconductor element 312 .
  • These metal blocks 314 , 316 are arranged side by side in the second direction Y on the metal plates 54 , 56 such that the ends in the first direction X are aligned with each other without any offset in the first direction X.
  • the groove 70 formed on the bonding face of the metal plate 36 is formed on the bonding face along the outer peripheries of the regions 80 , 82 in which the solder members 46 , 52 are provided, and is formed in an annular and frame shape so as to collectively surround the solder member 46 corresponding to the semiconductor switching element 306 -side metal block 314 and the solder member 52 corresponding to the diode 308 -side metal block 316 .
  • the distance between portions of the groove 70 on both sides of the metal block 314 in the first direction X on the metal plate 36 is substantially the same as the distance between portions of the groove 70 on both sides of the metal block 316 in the first direction X on the metal plate 36 .
  • the width of the region 80 on the metal plate 36 in the first direction X is substantially the same as the width of the region 82 on the metal plate 36 in the first direction X.
  • the solder member 46 is provided in the region 80 .
  • the solder member 52 is provided in the region 82 .
  • the distance between portions of the groove 72 on both sides of the metal block 314 in the first direction X on the metal plate 56 is substantially the same as the distance between portions of the groove 72 on both sides of the metal block 316 in the first direction X on the metal plate 56 .
  • the width of the region 84 on the metal plate 56 in the first direction X is substantially the same as the width of the region 86 on the metal plate 56 in the first direction X.
  • the solder member 46 is provided in the region 84 .
  • the solder member 52 is provided in the region 86 .
  • the groove 70 of the upper arm power unit 302 prevents spreading of both the semiconductor switching element 306 -side solder member 46 and the diode 308 -side solder member 52 .
  • the groove 72 of the lower arm power unit 304 prevents spreading of both the semiconductor switching element 310 -side solder member 46 and the diode 312 -side solder member 52 .
  • a groove corresponding to the solder member 46 and a groove corresponding to the solder member 52 do not need to be provided individually for the region in which the semiconductor switching element 306 -side solder member 46 is provided and the region in which the diode 308 -side solder member 52 is provided on the bonding face of the metal plate 36 or for the region in which the semiconductor switching element 310 -side solder member 46 is provided and the region in which the diode 312 -side solder member 52 is provided on the bonding face of the metal plate 56 .
  • the semiconductor device 300 it is possible to reduce the width of each of the metal plates 34 , 36 in the second direction Y, on which the two types of semiconductor elements 306 , 308 of the upper arm power unit 302 are arranged side by side in the second direction Y, and the width of each of the metal plates 54 , 56 in the second direction Y, on which the two types of semiconductor elements 310 , 312 of the lower arm power unit 304 are arranged side by side in the second direction Y. Therefore, it is possible to reduce the size and weight of each of the metal plates 34 , 36 , 54 , 56 and, by extension, it is possible to reduce the size and weight of the semiconductor device 300 itself.
  • the reel width of the solder foil that is used as the solder member 46 that bonds the metal block 314 to the metal plate 36 in the upper arm power unit 302 is substantially the same as the reel width of the solder foil that is used as the solder member 52 that bonds the metal block 316 to the metal plate 36 .
  • the reel width of the solder foil that is used as the solder member 46 that bonds the metal block 314 to the metal plate 56 is substantially the same as the reel width of the solder foil that is used as the solder member 52 that bonds the metal block 316 to the metal plate 56 .
  • solder foils that are attached as the solder members 46 respectively interposed between the metal blocks 314 and the metal plates 36 , 56 and for the solder foils that are attached as the solder members 52 respectively interposed between the metal blocks 316 and the metal plates 36 , 56 . Therefore, it is possible to reduce the number of types of solder foil that is used in the semiconductor device 300 .
  • the arrangement positional relationship between the semiconductor switching element 306 -side solder member 46 and the diode 308 -side solder member 52 which are arranged side by side in the second direction Y within the frame surrounded by the groove 70 of the metal plate 36 or the arrangement positional relationship between the semiconductor switching element 310 -side solder member 46 and the diode 312 -side solder member 52 , which are arranged side by side in the second direction Y within the frame surrounded by the groove 72 of the metal plate 56 , is allowed to be inverted within the frame surrounded by the corresponding one of the grooves 70 , 72 .
  • the semiconductor switching element 306 and the solder member 46 may be arranged on the metal plate 36 at the side in the second direction Y, at which the joint portion 36 a is provided, and the diode 308 and the solder member 52 may be arranged at the side in the second direction Y, at which the joint portion 36 a is not provided, or the semiconductor switching element 310 and the solder member 46 may be arranged on the metal plate 56 at the side in the second direction Y, at which the joint portion 56 a is provided, and the diode 312 and the solder member 52 may be arranged at the side in the second direction Y, at which the joint portion 56 a is not provided.
  • the diode 308 and the solder member 52 may be arranged on the metal plate 36 at the side in the second direction Y, at which the joint portion 36 a is provided and the semiconductor switching element 306 and the solder member 46 may be arranged at the time in the second direction Y, at which the joint portion 36 a is not provided, or the diode 312 and the solder member 52 may be arranged on the metal plate 56 at the side in the second direction Y, at which the joint portion 56 a is provided and the semiconductor switching element 310 and the solder member 46 may be arranged at the side in the second direction Y, at which the joint portion 56 a is not provided.
  • the semiconductor device 300 it is possible to commonalize the metal plate 36 that is used for the upper arm power unit 302 and the metal plate 56 that is used for the lower arm power unit 304 , and it is possible to constitute both the upper arm power unit 302 and the lower arm power unit 304 by changing the order of arrangement of the semiconductor switching element 306 and the diode 308 and the order of arrangement of the semiconductor switching element 310 and the diode 312 in the second direction Y on the metal plates 36 , 56 having the same shape. Therefore, it is possible to reduce the types of components (specifically the metal plates 36 , 56 ) that are used in the semiconductor device 300 into only one-type component.
  • the semiconductor switching elements 306 , 310 and the diodes 308 , 312 may be regarded as “semiconductor elements” according to the aspect of the invention.
  • the metal block 316 of each of the upper arm power unit 302 and the lower arm power unit 304 is formed in a shape different from the shape of the metal block 314 formed in substantially a rectangular parallelepiped shape, and is specifically formed in a protruded shape in cross section.
  • the invention is not limited to this shape.
  • the metal block 316 just needs to be formed such that the width of a portion in the first direction X, at which the diode 308 -side solder member 48 or the diode 312 -side solder member 48 is provided, is smaller than the width of a portion in the first direction X, at which the metal plate 36 -side solder member 52 or the metal plate 56 -side solder member 52 , designed for the width of the diode 308 or the diode 312 in the first direction X is provided (that is, the width of the metal block 314 in the first direction X), and may be, for example, formed in a tapered shape in cross section as shown in FIG. 15 .
  • each of the arm power units includes the two semiconductor elements. Instead, each of the arm power units may include three or more semiconductor elements. Each of the arm power units includes two different types of semiconductor elements. Instead, each of the arm power units may include semiconductor elements of the same type. For example, each of the arm power units may include two semiconductor switching elements and a single diode. Conversely, each of the arm power units may include a single semiconductor switching element and two diodes. The semiconductor switching element and the diode are used as the two different types of semiconductor elements of each of the arm power units. Instead, another combination of semiconductor elements may be used as the two different types of semiconductor elements of each of the arm power units.
  • the two types of semiconductor elements of each arm power unit are bonded to each of the metal plates 34 , 54 via the independent separate solder members 38 , 40 . That is, the solder members 38 , 40 that respectively bond the two semiconductor elements to the bonding face of the same metal plate 34 or the metal plate 54 are separated and independent of each other.
  • the metal blocks corresponding to the two types of semiconductor elements are bonded to each of the metal plates 36 , 56 via the independent separate solder members 46 , 52 . That is, the solder members 46 , 52 that bond the two metal blocks to the bonding face of each of the same metal plates 36 , 56 are separated and independent of each other.
  • the invention is not limited to this configuration.
  • the above-described solder members 38 , 40 may be integrated with each other or the above-described solder members 46 , 52 may be integrated with each other.
  • the two metal blocks provided in correspondence with the two types of semiconductor elements of each arm power unit are separated and independent of each other.
  • the invention is not limited to this configuration. Two metal blocks corresponding to the two types of semiconductor elements may be integrated with each other.
  • the groove 70 formed on the bonding face of the metal plate 36 is formed along the outer peripheries of the regions 80 , 82 in which the solder members 46 , 52 are provided
  • the groove 72 formed on the bonding face of the metal plate 56 is formed along the outer peripheries of the regions 84 , 86 in which the solder members 46 , 52 are provided
  • the groove 70 is formed in an annular and frame shape so as to collectively surround the semiconductor switching element-side solder member 46 and the diode-side solder member 52
  • the groove 72 is formed in an annular and frame shape so as to collectively surround the semiconductor switching element-side solder member 46 and the diode-side solder member 52 .
  • the groove 70 may be formed so as to include an annular portion 70 a formed in the annular and frame shape and, as shown in FIG. 16A , extend in the first direction X between the region 80 in which the semiconductor switching element-side solder member 46 is provided and the region 82 in which the diode-side solder member 52 is provided on the bonding face of the metal plate 36 and include a shared portion 70 b into which both the solder members 46 , 52 are allowed to flow in.
  • the groove 72 may be formed so as to include an annular portion 72 a formed in the annular and frame shape and, as shown in FIG.
  • the groove 70 formed on the bonding face of the metal plate 36 is an annular groove formed in substantially a rectangular shape collectively surrounding the solder members 46 , 52
  • the groove 72 formed on the bonding face of the metal plate 56 is an annular groove formed in substantially a rectangular shape collectively surrounding the solder members 46 , 52 .
  • the invention is not limited to this configuration.
  • the shape of the groove 70 may have a recess or a protrusion so as to be designed for each of the semiconductor switching element-side width and the diode-side width on the bonding face of the metal plate 36
  • the shape of the groove 72 may have a recess or a protrusion so as to be designed for each of the semiconductor switching element-side width and the diode-side width on the bonding face of the metal plate 56 , as shown in FIG. 16B .
  • the groove 70 formed on the bonding face of the metal plate 36 is continuous on the outer peripheries of the regions 80 , 82 of the metal plate 36 in which the solder members 46 , 52 are provided, and the groove 72 formed on the bonding face of the metal plate 56 is continuous on the outer peripheries of the regions 84 , 86 of the metal plate 56 in which the solder members 46 , 52 are provided.
  • the invention is not limited to this configuration.
  • the groove 70 may be intermittently continuous on the outer peripheries of the regions 80 , 82 of the metal plate 36 in which the solder members 46 , 52 are provided, and the groove 72 may be intermittently continuous on the outer peripheries of the regions 84 , 86 of the metal plate 56 in which the solder members 46 , 52 are provided, as shown in FIG. 16C .
  • the groove 70 may be formed in substantially an annular shape on the outer peripheries of the regions 80 , 82 of the metal plate 36 in which the solder members 46 , 52 are provided, and may be not continuous in an annular shape with part being cut.
  • the groove 72 may be formed in substantially an annular shape on the outer peripheries of the regions 84 , 86 of the metal plate 56 in which the solder members 46 , 52 are provided, and may be not continuous in an annular shape with part being cut.
  • the two types of semiconductor elements of the upper arm power unit are arranged side by side in the second direction Y on the metal plates 34 , 36 and arranged such that the ends in the first direction X are aligned with each other without any offset in the first direction X
  • the two types of semiconductor elements of the lower arm power unit are arranged side by side in the second direction Y on the metal plates 54 , 56 and arranged such that the ends in the first direction X are aligned with each other without any offset in the first direction X.
  • the invention is not limited to this configuration.
  • Two types of semiconductor elements arranged side by side in the second direction Y on the metal plates 34 , 36 may be arranged such that the ends in the first direction X deviate from each other with an offset in the first direction X
  • two types of semiconductor elements arranged side by side in the second direction Y on the metal plates 54 , 56 may be arranged such that the ends in the first direction X deviate from each other with an offset in the first direction X.
  • the groove 70 is formed at a position designed for the arrangement positions of the two types of semiconductor elements on the bonding face of the metal plate 36
  • the groove 72 is formed at a position designed for the arrangement positions of the two types of semiconductor elements on the bonding face of the metal plate 56
  • the groove 70 formed on the bonding face of the metal plate 36 is formed along the outer peripheries of the regions 80 , 82 in which the solder members 46 , 52 are provided, and the groove 72 formed on the bonding face of the metal plate 56 is formed along the outer peripheries of the regions 84 , 86 in which the solder members 46 , 52 are provided.
  • the groove 70 may be formed on the bonding face of the metal plate 36 so as to span between the inner side and outer side of the outer peripheral end of each of the metal blocks 44 , 314 bonded via the solder members 46 , 52 ( FIG. 6 ), may be formed on the outer side of the outer peripheral end of each of the metal blocks 44 , 314 ( FIG.
  • the groove 72 may be formed on the bonding face of the metal plate 56 so as to span between the inner side and outer side of the outer peripheral end of each of the metal blocks 50 , 316 bonded via the solder members 46 , 52 ( FIG. 6 ), may be formed on the outer side of the outer peripheral end of each of the metal blocks 50 , 316 ( FIG. 17A ) or may be formed on the inner side of the outer peripheral end of each of the metal blocks 50 , 316 ( FIG. 17B ).

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US14/916,136 2013-09-05 2014-08-29 Semiconductor device Abandoned US20160225690A1 (en)

Applications Claiming Priority (3)

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JP2013-184472 2013-09-05
JP2013184472A JP6114149B2 (ja) 2013-09-05 2013-09-05 半導体装置
PCT/IB2014/001646 WO2015033197A2 (en) 2013-09-05 2014-08-29 Semiconductor device

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180277462A1 (en) * 2017-03-21 2018-09-27 Toyota Jidosha Kabushiki Kaisha Semiconductor device, manufacturing method for semiconductor device, and electrode plate
US10103091B2 (en) 2017-03-09 2018-10-16 Toyota Jidosha Kabushiki Kaisha Semiconductor device
US10699997B2 (en) 2018-02-09 2020-06-30 Denso Corporation Semiconductor device
US11784105B2 (en) * 2018-03-07 2023-10-10 Mitsubishi Electric Corporation Semiconductor device and power converter

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6350364B2 (ja) * 2015-04-01 2018-07-04 株式会社デンソー 接続構造体
JP6972928B2 (ja) * 2017-10-31 2021-11-24 株式会社デンソー 半導体装置
JP6958259B2 (ja) * 2017-11-08 2021-11-02 株式会社デンソー 半導体装置
SG11202004755QA (en) * 2018-01-30 2020-06-29 Hitachi Chemical Co Ltd Semiconductor device production method and film-shaped adhesive
JP7103437B2 (ja) * 2018-12-27 2022-07-20 三菱電機株式会社 半導体装置および半導体装置の製造方法
JP7088094B2 (ja) * 2019-03-19 2022-06-21 株式会社デンソー 半導体装置
JP7452233B2 (ja) * 2020-05-01 2024-03-19 株式会社デンソー 半導体装置および電力変換装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030001286A1 (en) * 2000-01-28 2003-01-02 Ryoichi Kajiwara Semiconductor package and flip chip bonding method therein
US20060046352A1 (en) * 2004-08-25 2006-03-02 Low Al L Substrate grooves to reduce underfill fillet bridging
US20070057373A1 (en) * 2005-09-12 2007-03-15 Denso Corporation Semiconductor device having metallic plate with groove
US20100289127A1 (en) * 2009-05-14 2010-11-18 Renesas Technology Corp. Semiconductor device
US20110199736A1 (en) * 2010-02-15 2011-08-18 Denso Corporation Power converter

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3269745B2 (ja) 1995-01-17 2002-04-02 株式会社日立製作所 モジュール型半導体装置
JP3934079B2 (ja) 2003-05-08 2007-06-20 株式会社ルネサステクノロジ 半導体装置
US20040262781A1 (en) * 2003-06-27 2004-12-30 Semiconductor Components Industries, Llc Method for forming an encapsulated device and structure
JP3905078B2 (ja) * 2003-12-08 2007-04-18 京セラ株式会社 発光装置
JP2006156606A (ja) * 2004-11-29 2006-06-15 Nippon Inter Electronics Corp 半導体装置の製造方法
JP5947537B2 (ja) * 2011-04-19 2016-07-06 トヨタ自動車株式会社 半導体装置及びその製造方法
US8466548B2 (en) * 2011-05-31 2013-06-18 Infineon Technologies Ag Semiconductor device including excess solder
KR20130012500A (ko) * 2011-07-25 2013-02-04 삼성전자주식회사 칩 패키지 구조물 및 그 제조 방법
JP2014093356A (ja) 2012-11-01 2014-05-19 Toyota Motor Corp 半導体装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030001286A1 (en) * 2000-01-28 2003-01-02 Ryoichi Kajiwara Semiconductor package and flip chip bonding method therein
US20060046352A1 (en) * 2004-08-25 2006-03-02 Low Al L Substrate grooves to reduce underfill fillet bridging
US20070057373A1 (en) * 2005-09-12 2007-03-15 Denso Corporation Semiconductor device having metallic plate with groove
US20100289127A1 (en) * 2009-05-14 2010-11-18 Renesas Technology Corp. Semiconductor device
US20110199736A1 (en) * 2010-02-15 2011-08-18 Denso Corporation Power converter

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10103091B2 (en) 2017-03-09 2018-10-16 Toyota Jidosha Kabushiki Kaisha Semiconductor device
US20180277462A1 (en) * 2017-03-21 2018-09-27 Toyota Jidosha Kabushiki Kaisha Semiconductor device, manufacturing method for semiconductor device, and electrode plate
US10475727B2 (en) * 2017-03-21 2019-11-12 Toyota Jidosha Kabushiki Kaisha Semiconductor device, manufacturing method for semiconductor device, and electrode plate
US10699997B2 (en) 2018-02-09 2020-06-30 Denso Corporation Semiconductor device
US11784105B2 (en) * 2018-03-07 2023-10-10 Mitsubishi Electric Corporation Semiconductor device and power converter

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US9831160B2 (en) 2017-11-28
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WO2015033197A3 (en) 2015-08-13
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CN105518841A (zh) 2016-04-20
JP2015053343A (ja) 2015-03-19

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