TWI758133B - 製備多層結構的方法 - Google Patents
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- TWI758133B TWI758133B TW110109587A TW110109587A TWI758133B TW I758133 B TWI758133 B TW I758133B TW 110109587 A TW110109587 A TW 110109587A TW 110109587 A TW110109587 A TW 110109587A TW I758133 B TWI758133 B TW I758133B
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- H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
- H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H10P14/6927—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
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- H10P14/69—Inorganic materials
- H10P14/694—Inorganic materials composed of nitrides
- H10P14/6943—Inorganic materials composed of nitrides containing silicon
- H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H10P90/19—Preparing inhomogeneous wafers
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- H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
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- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201662429922P | 2016-12-05 | 2016-12-05 | |
| US62/429,922 | 2016-12-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW202131500A TW202131500A (zh) | 2021-08-16 |
| TWI758133B true TWI758133B (zh) | 2022-03-11 |
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ID=60997530
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW110109587A TWI758133B (zh) | 2016-12-05 | 2017-12-05 | 製備多層結構的方法 |
| TW106142589A TWI727123B (zh) | 2016-12-05 | 2017-12-05 | 高電阻率絕緣體上矽結構及其製造方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW106142589A TWI727123B (zh) | 2016-12-05 | 2017-12-05 | 高電阻率絕緣體上矽結構及其製造方法 |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US10468295B2 (https=) |
| EP (2) | EP4009361B1 (https=) |
| JP (2) | JP6801105B2 (https=) |
| KR (2) | KR102587815B1 (https=) |
| CN (2) | CN110352484B (https=) |
| SG (1) | SG10201913059PA (https=) |
| TW (2) | TWI758133B (https=) |
| WO (1) | WO2018106535A1 (https=) |
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| JP6344271B2 (ja) * | 2015-03-06 | 2018-06-20 | 信越半導体株式会社 | 貼り合わせ半導体ウェーハ及び貼り合わせ半導体ウェーハの製造方法 |
| JP6447439B2 (ja) * | 2015-09-28 | 2019-01-09 | 信越半導体株式会社 | 貼り合わせsoiウェーハの製造方法 |
| US10622247B2 (en) * | 2016-02-19 | 2020-04-14 | Globalwafers Co., Ltd. | Semiconductor on insulator structure comprising a buried high resistivity layer |
| FR3066858B1 (fr) * | 2017-05-23 | 2019-06-21 | Soitec | Procede pour minimiser une distorsion d'un signal dans un circuit radiofrequence |
| CN107611144B (zh) * | 2017-09-19 | 2019-10-11 | 武汉华星光电技术有限公司 | 一种层间绝缘层的制备方法、层间绝缘层及液晶显示面板 |
| US10943813B2 (en) | 2018-07-13 | 2021-03-09 | Globalwafers Co., Ltd. | Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability |
| FR3098642B1 (fr) * | 2019-07-12 | 2021-06-11 | Soitec Silicon On Insulator | procédé de fabrication d'une structure comprenant une couche mince reportée sur un support muni d’une couche de piégeage de charges |
| US11171015B2 (en) * | 2019-09-11 | 2021-11-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-layered polysilicon and oxygen-doped polysilicon design for RF SOI trap-rich poly layer |
| FR3104322B1 (fr) * | 2019-12-05 | 2023-02-24 | Soitec Silicon On Insulator | Procédé de formation d'un substrat de manipulation pour une structure composite ciblant des applications rf |
| US12176202B2 (en) * | 2020-10-08 | 2024-12-24 | Okmetic Oy | Manufacture method of a high-resistivity silicon handle wafer for a hybrid substrate structure |
| FR3116151A1 (fr) * | 2020-11-10 | 2022-05-13 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de formation d’une structure de piegeage d’un substrat utile |
| TWM633935U (zh) * | 2021-04-07 | 2022-11-11 | 日商信越化學工業股份有限公司 | 積層體的製造系統、積層體以及半導體裝置 |
| JP7692638B2 (ja) * | 2021-04-16 | 2025-06-16 | テクタス コーポレイション | 窒化ガリウム発光ダイオード用のシリコン二重ウェーハ基板 |
| US11869869B2 (en) * | 2021-04-22 | 2024-01-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Heterogeneous dielectric bonding scheme |
| US12533766B2 (en) | 2021-06-11 | 2026-01-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Simplified carrier removable by reduced number of CMP processes |
| CN113437016A (zh) | 2021-06-25 | 2021-09-24 | 武汉新芯集成电路制造有限公司 | 半导体器件及其制造方法 |
| EP4287239A1 (en) * | 2022-06-02 | 2023-12-06 | Imec VZW | A low loss semiconductor substrate |
| FR3137493B1 (fr) * | 2022-06-29 | 2024-10-04 | Soitec Silicon On Insulator | Procede de fabrication d’une structure comportant une couche barriere a la diffusion d’especes atomiques |
| FR3137490B1 (fr) * | 2022-07-04 | 2024-05-31 | Soitec Silicon On Insulator | Procede de fabrication d’une structure comportant une couche barriere a la diffusion d’especes atomiques |
| WO2024115410A1 (fr) | 2022-11-29 | 2024-06-06 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes. |
| JP2026511208A (ja) | 2022-11-29 | 2026-04-10 | ソイテック | 電荷トラップ層を含む支持体、そのような支持体を含む複合基板、および関連する製造方法 |
| EP4627621A1 (fr) | 2022-11-29 | 2025-10-08 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes |
| FR3146020B1 (fr) | 2023-02-20 | 2025-07-18 | Soitec Silicon On Insulator | Support comprenant une couche de piégeage de charges, substrat composite comprenant un tel support et procédé de fabrication associés |
| FR3163488A1 (fr) * | 2024-06-12 | 2025-12-19 | Soitec | Substrat photonique et utilisation d’un tel substrat dans un dispositif de modulation optique |
| WO2025257265A1 (fr) * | 2024-06-12 | 2025-12-18 | Soitec | Procédé de fabrication d'un substrat photonique |
| CN121240528A (zh) * | 2025-12-01 | 2025-12-30 | 上海超硅半导体股份有限公司 | 绝缘体上半导体及其制备方法 |
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| SG10201913059PA (en) | 2020-02-27 |
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| CN115714130A (zh) | 2023-02-24 |
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| JP6801105B2 (ja) | 2020-12-16 |
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| JP2021048401A (ja) | 2021-03-25 |
| CN110352484A (zh) | 2019-10-18 |
| EP4009361A1 (en) | 2022-06-08 |
| TW202131500A (zh) | 2021-08-16 |
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