TWI712106B - 用於製作包含中介層之半導體結構之方法 - Google Patents

用於製作包含中介層之半導體結構之方法 Download PDF

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TWI712106B
TWI712106B TW106117418A TW106117418A TWI712106B TW I712106 B TWI712106 B TW I712106B TW 106117418 A TW106117418 A TW 106117418A TW 106117418 A TW106117418 A TW 106117418A TW I712106 B TWI712106 B TW I712106B
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temporary support
layer
semiconductor
contact pads
item
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TW106117418A
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Chinese (zh)
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TW201742189A (zh
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璧顏 阮
魯多維克 伊卡諾
那地雅 班穆罕默德
克里斯多夫 馬勒維
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法商索泰克公司
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    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
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    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
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    • H10P72/7412Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
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    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7426Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
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    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/743Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
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    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7438Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
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    • H10P72/74Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
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    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
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    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251Changing the shapes of bumps
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    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251Changing the shapes of bumps
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    • H10W90/791Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
TW106117418A 2016-05-30 2017-05-25 用於製作包含中介層之半導體結構之方法 TWI712106B (zh)

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FR1654831 2016-05-30
FR1654831A FR3051971B1 (fr) 2016-05-30 2016-05-30 Procede de fabrication d'une structure semi-conductrice comprenant un interposeur

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TW201742189A TW201742189A (zh) 2017-12-01
TWI712106B true TWI712106B (zh) 2020-12-01

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US (1) US11114314B2 (https=)
KR (1) KR102397140B1 (https=)
CN (1) CN109196627B (https=)
DE (1) DE112017002718T5 (https=)
FR (1) FR3051971B1 (https=)
SG (2) SG11201810104VA (https=)
TW (1) TWI712106B (https=)
WO (1) WO2017207390A1 (https=)

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TW202038266A (zh) * 2018-11-26 2020-10-16 瑞典商斯莫勒科技公司 具有離散的能量儲存構件之半導體組件

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US20130214423A1 (en) * 2011-03-31 2013-08-22 Soitec Methods for fabrication of semiconductor structures including interposers with conductive vias, and related structures and devices
US20140339706A1 (en) * 2013-05-17 2014-11-20 Nvidia Corporation Integrated circuit package with an interposer formed from a reusable carrier substrate

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JP3809733B2 (ja) * 1998-02-25 2006-08-16 セイコーエプソン株式会社 薄膜トランジスタの剥離方法
JP2001102523A (ja) * 1999-09-28 2001-04-13 Sony Corp 薄膜デバイスおよびその製造方法
FR2809867B1 (fr) * 2000-05-30 2003-10-24 Commissariat Energie Atomique Substrat fragilise et procede de fabrication d'un tel substrat
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US11114314B2 (en) 2021-09-07
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