TWI706460B - 電漿蝕刻方法 - Google Patents

電漿蝕刻方法 Download PDF

Info

Publication number
TWI706460B
TWI706460B TW105138041A TW105138041A TWI706460B TW I706460 B TWI706460 B TW I706460B TW 105138041 A TW105138041 A TW 105138041A TW 105138041 A TW105138041 A TW 105138041A TW I706460 B TWI706460 B TW I706460B
Authority
TW
Taiwan
Prior art keywords
plasma
frequency power
film
gas
plasma etching
Prior art date
Application number
TW105138041A
Other languages
English (en)
Chinese (zh)
Other versions
TW201721739A (zh
Inventor
高山航
冨永翔
五十嵐義樹
Original Assignee
日商東京威力科創股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商東京威力科創股份有限公司 filed Critical 日商東京威力科創股份有限公司
Publication of TW201721739A publication Critical patent/TW201721739A/zh
Application granted granted Critical
Publication of TWI706460B publication Critical patent/TWI706460B/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05H—PLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00—Generating plasma; Handling plasma
    • H05H1/24—Generating plasma
    • H05H1/46—Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6512—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour
    • H10P14/6514—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Electromagnetism (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Drying Of Semiconductors (AREA)
  • Power Engineering (AREA)
TW105138041A 2015-12-03 2016-11-21 電漿蝕刻方法 TWI706460B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-236624 2015-12-03
JP2015236624A JP6604833B2 (ja) 2015-12-03 2015-12-03 プラズマエッチング方法

Publications (2)

Publication Number Publication Date
TW201721739A TW201721739A (zh) 2017-06-16
TWI706460B true TWI706460B (zh) 2020-10-01

Family

ID=58799166

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105138041A TWI706460B (zh) 2015-12-03 2016-11-21 電漿蝕刻方法

Country Status (6)

Country Link
US (2) US9966273B2 (https=)
JP (1) JP6604833B2 (https=)
KR (1) KR102363783B1 (https=)
CN (1) CN106992121B (https=)
SG (1) SG10201610044VA (https=)
TW (1) TWI706460B (https=)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6948181B2 (ja) * 2017-08-01 2021-10-13 東京エレクトロン株式会社 多層膜をエッチングする方法
JP6945388B2 (ja) * 2017-08-23 2021-10-06 東京エレクトロン株式会社 エッチング方法及びエッチング処理装置
US10510575B2 (en) 2017-09-20 2019-12-17 Applied Materials, Inc. Substrate support with multiple embedded electrodes
US10847374B2 (en) * 2017-10-31 2020-11-24 Lam Research Corporation Method for etching features in a stack
JP7310608B2 (ja) * 2017-11-02 2023-07-19 株式会社レゾナック エッチング方法及び半導体の製造方法
US10811267B2 (en) 2017-12-21 2020-10-20 Micron Technology, Inc. Methods of processing semiconductor device structures and related systems
CN118588548A (zh) * 2018-03-16 2024-09-03 朗姆研究公司 在电介质中的高深宽比特征的等离子体蚀刻化学过程
JP7018801B2 (ja) 2018-03-29 2022-02-14 東京エレクトロン株式会社 プラズマ処理装置、及び被処理体の搬送方法
JP6920245B2 (ja) * 2018-04-23 2021-08-18 東京エレクトロン株式会社 温度制御方法
US10555412B2 (en) 2018-05-10 2020-02-04 Applied Materials, Inc. Method of controlling ion energy distribution using a pulse generator with a current-return output stage
JP7175239B2 (ja) * 2018-06-22 2022-11-18 東京エレクトロン株式会社 制御方法、プラズマ処理装置、プログラム及び記憶媒体
JP6778822B2 (ja) 2018-10-26 2020-11-04 株式会社日立ハイテク プラズマ処理方法
US11476145B2 (en) 2018-11-20 2022-10-18 Applied Materials, Inc. Automatic ESC bias compensation when using pulsed DC bias
CN118315254A (zh) 2019-01-22 2024-07-09 应用材料公司 用于控制脉冲电压波形的反馈回路
US11508554B2 (en) 2019-01-24 2022-11-22 Applied Materials, Inc. High voltage filter assembly
KR102904251B1 (ko) * 2019-02-18 2025-12-24 도쿄엘렉트론가부시키가이샤 에칭 방법
KR102765856B1 (ko) * 2019-03-22 2025-02-11 샌트랄 글래스 컴퍼니 리미티드 드라이 에칭 방법 및 반도체 디바이스의 제조 방법
US11361976B2 (en) * 2019-11-25 2022-06-14 Tokyo Electron Limited Substrate processing method and plasma processing apparatus
WO2021171458A1 (ja) 2020-02-27 2021-09-02 株式会社日立ハイテク プラズマ処理方法
US11087989B1 (en) 2020-06-18 2021-08-10 Applied Materials, Inc. Cryogenic atomic layer etch with noble gases
JP7595431B2 (ja) 2020-07-21 2024-12-06 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
US11848176B2 (en) 2020-07-31 2023-12-19 Applied Materials, Inc. Plasma processing using pulsed-voltage and radio-frequency power
US11798790B2 (en) 2020-11-16 2023-10-24 Applied Materials, Inc. Apparatus and methods for controlling ion energy distribution
US11901157B2 (en) 2020-11-16 2024-02-13 Applied Materials, Inc. Apparatus and methods for controlling ion energy distribution
US11495470B1 (en) 2021-04-16 2022-11-08 Applied Materials, Inc. Method of enhancing etching selectivity using a pulsed plasma
US11948780B2 (en) 2021-05-12 2024-04-02 Applied Materials, Inc. Automatic electrostatic chuck bias compensation during plasma processing
US11791138B2 (en) 2021-05-12 2023-10-17 Applied Materials, Inc. Automatic electrostatic chuck bias compensation during plasma processing
US11967483B2 (en) 2021-06-02 2024-04-23 Applied Materials, Inc. Plasma excitation with ion energy control
US12148595B2 (en) 2021-06-09 2024-11-19 Applied Materials, Inc. Plasma uniformity control in pulsed DC plasma chamber
US20220399186A1 (en) 2021-06-09 2022-12-15 Applied Materials, Inc. Method and apparatus to reduce feature charging in plasma processing chamber
US12525441B2 (en) 2021-06-09 2026-01-13 Applied Materials, Inc. Plasma chamber and chamber component cleaning methods
US11810760B2 (en) 2021-06-16 2023-11-07 Applied Materials, Inc. Apparatus and method of ion current compensation
US11569066B2 (en) 2021-06-23 2023-01-31 Applied Materials, Inc. Pulsed voltage source for plasma processing applications
US11776788B2 (en) 2021-06-28 2023-10-03 Applied Materials, Inc. Pulsed voltage boost for substrate processing
US11476090B1 (en) 2021-08-24 2022-10-18 Applied Materials, Inc. Voltage pulse time-domain multiplexing
KR20230033816A (ko) 2021-09-02 2023-03-09 삼성전자주식회사 채널 구조체 및 관통 전극을 갖는 반도체 소자, 전자 시스템, 및 그 형성 방법
US12106938B2 (en) 2021-09-14 2024-10-01 Applied Materials, Inc. Distortion current mitigation in a radio frequency plasma processing chamber
US11694876B2 (en) 2021-12-08 2023-07-04 Applied Materials, Inc. Apparatus and method for delivering a plurality of waveform signals during plasma processing
JP2024547191A (ja) * 2022-01-04 2024-12-26 アプライド マテリアルズ インコーポレイテッド 電極調整、堆積、及びエッチング方法
US11972924B2 (en) 2022-06-08 2024-04-30 Applied Materials, Inc. Pulsed voltage source for plasma processing applications
US12315732B2 (en) 2022-06-10 2025-05-27 Applied Materials, Inc. Method and apparatus for etching a semiconductor substrate in a plasma etch chamber
US12586768B2 (en) 2022-08-10 2026-03-24 Applied Materials, Inc. Pulsed voltage compensation for plasma processing applications
US12272524B2 (en) 2022-09-19 2025-04-08 Applied Materials, Inc. Wideband variable impedance load for high volume manufacturing qualification and on-site diagnostics
US20260090303A1 (en) * 2022-09-29 2026-03-26 Lam Research Corporation Post etch plasma treatment for reducing sidewall contaminants and roughness
US12111341B2 (en) 2022-10-05 2024-10-08 Applied Materials, Inc. In-situ electric field detection method and apparatus
WO2025075834A1 (en) * 2023-10-06 2025-04-10 Lam Research Corporation Selective removal of redeposited carbon masks during etch
US20250357132A1 (en) * 2024-05-17 2025-11-20 Applied Materials, Inc. Etching silicon-containing material and silicon-and-germanium-containing material

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150179466A1 (en) * 2013-12-19 2015-06-25 Tokyo Electron Limited Method of manufacturing semiconductor device
CN105097498A (zh) * 2014-05-14 2015-11-25 东京毅力科创株式会社 蚀刻被蚀刻层的方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01200624A (ja) * 1988-02-05 1989-08-11 Toshiba Corp ドライエッチング方法
JPH05326499A (ja) * 1992-05-19 1993-12-10 Fujitsu Ltd 半導体装置の製造方法
US6686292B1 (en) * 1998-12-28 2004-02-03 Taiwan Semiconductor Manufacturing Company Plasma etch method for forming uniform linewidth residue free patterned composite silicon containing dielectric layer/silicon stack layer
US6287974B1 (en) * 1999-06-30 2001-09-11 Lam Research Corporation Method of achieving top rounding and uniform etch depths while etching shallow trench isolation features
JP2007081383A (ja) * 2005-08-15 2007-03-29 Fujitsu Ltd 微細構造の製造方法
JP2012079792A (ja) * 2010-09-30 2012-04-19 Fujitsu Semiconductor Ltd 半導体装置の製造方法
JP5981106B2 (ja) * 2011-07-12 2016-08-31 東京エレクトロン株式会社 プラズマエッチング方法
TWI497586B (zh) * 2011-10-31 2015-08-21 日立全球先端科技股份有限公司 Plasma etching method
WO2013118660A1 (ja) * 2012-02-09 2013-08-15 東京エレクトロン株式会社 半導体製造装置の製造方法及び半導体製造装置
JP6211947B2 (ja) * 2013-07-31 2017-10-11 東京エレクトロン株式会社 半導体装置の製造方法
JP6277004B2 (ja) * 2014-01-31 2018-02-07 株式会社日立ハイテクノロジーズ ドライエッチング方法
JP6230930B2 (ja) * 2014-02-17 2017-11-15 東京エレクトロン株式会社 半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150179466A1 (en) * 2013-12-19 2015-06-25 Tokyo Electron Limited Method of manufacturing semiconductor device
CN105097498A (zh) * 2014-05-14 2015-11-25 东京毅力科创株式会社 蚀刻被蚀刻层的方法

Also Published As

Publication number Publication date
US20170162399A1 (en) 2017-06-08
US10707090B2 (en) 2020-07-07
JP6604833B2 (ja) 2019-11-13
US9966273B2 (en) 2018-05-08
CN106992121A (zh) 2017-07-28
JP2017103388A (ja) 2017-06-08
KR20170065449A (ko) 2017-06-13
US20180226264A1 (en) 2018-08-09
TW201721739A (zh) 2017-06-16
KR102363783B1 (ko) 2022-02-15
CN106992121B (zh) 2020-10-09
SG10201610044VA (en) 2017-07-28

Similar Documents

Publication Publication Date Title
TWI706460B (zh) 電漿蝕刻方法
JP6498022B2 (ja) エッチング処理方法
TWI743072B (zh) 蝕刻方法及蝕刻裝置
US10381237B2 (en) Etching method
TWI710021B (zh) 蝕刻處理方法
TWI723096B (zh) 蝕刻方法
TWI746566B (zh) 蝕刻處理方法
CN101521158A (zh) 等离子体蚀刻方法和等离子体蚀刻装置
US7902078B2 (en) Processing method and plasma etching method
US10651077B2 (en) Etching method
JP2022034956A (ja) エッチング方法及びプラズマ処理装置
JP4653603B2 (ja) プラズマエッチング方法
TW200414344A (en) Method and apparatus for etching Si
JP7195113B2 (ja) 処理方法及び基板処理装置
JP2019134107A (ja) エッチング方法及びエッチング装置
JP2004119972A (ja) Ｓｉエッチング方法及びエッチング装置