TWI665765B - 配線基板、半導體裝置及半導體裝置之製造方法 - Google Patents

配線基板、半導體裝置及半導體裝置之製造方法 Download PDF

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TWI665765B
TWI665765B TW104120235A TW104120235A TWI665765B TW I665765 B TWI665765 B TW I665765B TW 104120235 A TW104120235 A TW 104120235A TW 104120235 A TW104120235 A TW 104120235A TW I665765 B TWI665765 B TW I665765B
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Taiwan
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layer
resin
support
laminated body
semiconductor device
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TW104120235A
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TW201606951A (zh
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小林茜
芥川泰人
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日商凸版印刷股份有限公司
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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Abstract

本發明係用於改善半導體裝置之製造效率的配線基板11，其具備：支持體12，具有透明性；接著層13,設於支持體12的主面12a上，並且具有剝離層41及保護層42，該剝離層41包含可藉由光之照射而分解的第3樹脂，該保護層42設於剝離層41上並且包含第4樹脂；積層體21，其設於接著層13上，且具有第1樹脂層14、設於第1樹脂層14上的第2樹脂層19及至少設於第1樹脂層14及第2樹脂層19之間的配線圖案18。藉此，可分別製造半導體晶片22及外部連接構件的配線基板11，故可用於改善半導體裝置1的製造效率。

Description

配線基板、半導體裝置及半導體裝置之製造方法
本發明係關於一種配線基板、半導體裝置及半導體裝置之製造方法。
近幾年，使用半導體晶片及外部連接構件的半導體裝置，被用於電子設備及汽車等的各種領域。下述專利文獻1中記載了一種半導體裝置之製造方法，其係於半導體晶片上直接形成具有重佈線層(redistribution layer)及外部連接端子的外部連接構件。該製造方法係將具有重佈線層及外部連接端子的外部連接構件形成於半導體晶片區域內。以該製造方法所設置之半導體裝置，被稱為扇入(fan-in)型的WLP(晶圓級封裝：Wafer Level Package)。
又，下述專利文獻2中記載了一種半導體裝置之製造方法，其係形成將固定於支持基板之半導體晶片周圍覆蓋的絕緣層，並於該半導體晶片上及該絕緣層上形成具有重佈線層及外部連接端子的外部連接構件。該製造方法在從半導體晶片的外緣至外側的周邊區域，亦形成具有重佈線層及外部連接端子的外部連接構件。以該製造方法所設置之半導體裝置，被稱為扇出(fan-out)型的WLP。
先前技術文獻 專利文獻
專利文獻1 日本特開平11-111896號公報
專利文獻2 日本特開2011-187473號公報
專利文獻3 日本特開2014-7315號公報
上述專利文獻1所記載之製造方法中，外部連接構件形成於半導體晶片區域內，故外部連接端子的數量及位置被限制。又，專利文獻1、2所記載之製造方法中，係直接於單片化之半導體晶片上形成外部連接構件，故半導體裝置的製造效率變低。
本發明之目的在於提供一種用於改善半導體裝置之製造效率的配線基板、經改善製造效率之半導體裝置及製造該半導體裝置之方法。
本發明之一態樣之配線基板係具備：支持體，具有透明性；接著層，設於支持體的主面上；及積層體，其設於接著層上，且具有第1樹脂層、設於第1樹脂層上的第2樹脂層以及至少設於第1樹脂層及第2樹脂層之間的配線圖案；接著層具有剝離層及保護層，該剝離層設於支持體的主面上並且包含可藉由光之照射而分解的第3樹脂，該保護層設於剝離層上以保護積層體不被光損傷並且包含第4樹脂。
該配線基板中設有積層體，該積層體係發揮作為外部連接構件的功能，而用以使半導體裝置之半導體晶片與外部裝置連接。藉此，可分別製造半導體晶片及具有外部連接構件的配線基板，故可用於改善半導體裝置的製造效率。又，該配線基板中，支持體具有透明性。藉此，透過支持體而對剝離層照射光，進而使第3樹脂分解，使剝離層的接著力變弱。此外，藉由將保護層設於剝離層與積層體之間，可抑制光能傳遞至積層體。藉此，可抑制積層體的第1樹脂層及第2樹脂層所包含之樹脂分解。因此，在接合半導體晶片與配線基板的積層體後，可輕易將支持體從積層體剝離，故可將使用該配線基板所製造之半導體裝置薄型化。
又，支持體的線膨脹係數可為-1ppm/℃以上10ppm/℃以下。此情況下，半導體晶片係藉由矽基板等的以無機物為主要成分的基板所製造，故半導體晶片的線膨脹係數與支持體的線膨脹係數互為接近值。因此，可抑制在將半導體晶片搭載於配線基板時所發生的位置偏差。
又，支持體可為玻璃基板。此情況下，可以低成本提高支持體的強度，並且使得支持體的大型化變得容易。又，可輕易調整支持體表面的粗糙度。
支持體主面的最大高度粗糙度(maximum hight roughness)可為0.01μm以上5μm以下。此情況下，設於支持體上之積層體的凹凸變小，故可抑制配線圖案的斷線及短路等。
又，保護層可為包含第4樹脂的層，或以第4樹脂為主要成分的層。此情況下，可針對配線圖案，選擇性良好地去除保護層。藉此，可防止配線圖案的蝕刻等，並確保該配線圖案與外部裝置的良好連接。因此，使用配線基板所製造之半導體裝置的產率提高。
又，積層體的厚度可為0.001mm以上1mm以下。此情況下，可藉由第1樹脂層及第2樹脂層來保護積層體的配線圖案，並且可抑制配線基板的翹曲。
又，本發明之另一態樣之半導體裝置係具備：在上述段落所記載之任一配線基板中將支持體去除的積層體；及半導體晶片，其於一表面設有突起電極，並透過該突起電極與積層體的配線圖案連接。該半導體裝置，半導體晶片與作為外部連接構件的積層體係各別製造，故可改善半導體裝置的製造效率。又，藉由將配線基板中的支持體從積層體去除，可使半導體裝置薄型化。
又，配線圖案與半導體晶片可透過包含焊料之連接端子互相連接。此情況下，即使在配線圖案與半導體晶片之間發生位置偏差的情況下，亦可藉由包含焊料之連接端子填補偏差，進而可抑制在半導體晶片與積層體之間所發生的連接不良。
又，配線圖案與半導體晶片可透過含金之連接端子互相連接。此情況下，連接端子的導電性提高，並且可抑制該連接端子的腐蝕。
又，本發明之另一態樣之半導體裝置之製造方法係具備：準備步驟，準備上述段落所記載之任一配線基板；接合步驟，將半導體晶片搭載於配線基板的積層體，並將半導體晶片與配線圖案接合；及剝離步驟，透過支持體對接著層照射光，藉此將支持體從積層體剝離。
根據該半導體裝置之製造方法，可藉由透過支持體對剝離層照射光來使樹脂分解，進而使剝離層的接著力變弱。因此，在接合半導體晶片與配線基板的積層體後，容易將支持體從積層體剝離，故可將使用該配線基板所製造之半導體裝置薄型化。再者，藉由在將半導體晶片搭載於積層體時使用具有支持體的配線基板，可使操作變得容易。
又，光可為雷射光。此情況下，可充分施加為了使剝離層內的樹脂分解所需要的熱能，進而可有效地使剝離層的接著力變弱。
又，上述半導體裝置之製造方法更可具備被覆步驟，以封裝樹脂被覆與配線圖案接合的半導體晶片。此情況下，可藉由封裝樹脂來保護半導體晶片，並且可抑制半導體晶片從積層體脫離。
又，上述半導體裝置之製造方法更可具備去除步驟，在將支持體從積層體剝離的步驟後，將接著層從積層體去除。
又，上述半導體裝置之製造方法更可具備：外部連接端子設置步驟，在將支持體從積層體剝離的步 驟後，將外部連接端子設於積層體的步驟；及單片化步驟，切斷積層體而單片化的步驟。
根據本發明之配線基板、半導體裝置及製造該半導體裝置之方法，可提供一種用於改善半導體裝置之製造效率及使該半導體裝置薄型化的配線基板、可薄型化且製造效率經改善之半導體裝置及製造該半導體裝置之方法。
1‧‧‧半導體裝置
11、11A‧‧‧配線基板
12‧‧‧支持體
13、13A‧‧‧接著層
14‧‧‧第1樹脂層
15‧‧‧連接墊片
16‧‧‧晶種層
17‧‧‧光阻
18‧‧‧配線圖案
19‧‧‧第2樹脂層
20、20A‧‧‧連接端子
21‧‧‧積層體
22‧‧‧半導體晶片
23‧‧‧突起電極
24‧‧‧底部填充材料
25‧‧‧模製樹脂
31‧‧‧外部連接端子
33‧‧‧切割膠帶
41‧‧‧剝離層
42‧‧‧保護層
L‧‧‧雷射光
第1圖係說明使用本實施形態之配線基板所製造之半導體裝置的圖。
第2圖係說明本實施形態之配線基板的圖。
第3圖(a)~(c)係說明配線基板之製造方法之一例的圖。
第4圖(a)~(c)係說明配線基板之製造方法之一例的圖。
第5圖(a)~(c)係說明半導體裝置之製造方法之一例的圖。
第6圖(a)~(c)係說明半導體裝置之製造方法之一例的圖。
第7圖(a)~(c)係說明半導體裝置之製造方法之一例的圖。
第8圖係顯示變化例之配線基板之一部分的圖。
第9圖(a)~(c)係說明實施例之配線基板之製造方法的圖。
第10圖(a)~(c)係說明實施例之配線基板之製造方法的圖。
[用以實施發明之形態]
以下，參照附件圖式對本發明之較佳實施形態進行詳細說明。此外，在以下的說明中，對相同要件或具有相同功能的要件使用相同符號，並省略重複的說明。
第1圖係說明使用本實施形態之配線基板所製造之半導體裝置的圖。如第1圖所示，半導體裝置1係具備：積層體21、半導體晶片22、底部填充材料(underfill)24、模製樹脂25及複數的外部連接端子31。此外，針對積層體21的詳細內容，係如後述。
半導體晶片22係例如具有形成於半導體基板表面之電晶體或二極體等的積體電路(IC或LSI)，其具有略為長方體的形狀。半導體晶片22所使用的半導體基板，可使用例如矽基板(Si基板)、氮化鎵基板(GaN基板)或碳化矽基板(SiC基板)等的以無機物為主要成分的基板。本實施形態係使用矽基板作為半導體基板。使用矽基板所形成之半導體晶片22的線膨脹係數(CTE：Coefficient of Thermal Expansion)約為2~4ppm/℃(例如3ppm/℃)。本實施形態之線膨脹係數，例如，係在20℃~260℃之溫度範圍內之對應於溫度上升而變化的長度。
半導體晶片22的表面22a上設有突起電極(亦稱為凸塊)23。半導體晶片22係透過該突起電極23而與在積層體21之一側的主面21a露出的配線圖案(圖中未顯示)電性連接。突起電極23係由例如Au、Ag、Cu、Al等的金屬或該等金屬的合金、於Cu上實施鍍Au等的金屬複合體、或Sn、Sn-Pb、Sn-Ag、Sn-Cu、Sn-Ag-Cu、Sn-Bi或Au系等的焊料所形成。突起電極23可配置於半導體晶片22的整個區域內，亦可配置於半導體晶片22的周邊區域。作為配線基板11(圖中未顯示)與半導體晶片22互相連接的方式，可列舉引線接合方式或倒裝晶片方式。本實施形態中，從安裝面積之縮小化及作業之效率化的觀點來看，係藉由倒裝晶片方式將半導體晶片22及積層體21互相連接。
底部填充材料24係用於將半導體晶片22固定及封裝於積層體21上的接著劑。作為底部填充材料24，可使用下述之材料：於例如環氧樹脂、聚胺基甲酸酯樹脂、聚矽氧樹脂、聚酯樹脂、環氧丙烷(oxetane)樹脂及馬來醯亞胺樹脂之中的1種或混合兩種以上該等樹脂的樹脂中，加入二氧化矽、氧化鈦、氧化鋁、氧化鎂或氧化鋅等作為填充劑的材料。底部填充材料24可為液狀，亦可為膜狀。
模製樹脂25係用於被覆半導體晶片22以進行封裝及保護的封裝樹脂。作為模製樹脂25，可使用下述之材料：於例如環氧樹脂、聚胺基甲酸酯樹脂、聚矽氧樹脂、聚酯樹脂、環氧丙烷樹脂及馬來醯亞胺樹脂 之中的1種或混合兩種以上該等樹脂的樹脂中，加入二氧化矽、氧化鈦、氧化鋁、氧化鎂或氧化鋅等作為填充劑的材料。
外部連接端子31係設於積層體21之另一側的主面21b上。外部連接端子31係透過設於積層體21內的配線圖案而與半導體晶片22電性連接。外部連接端子31係由例如Sn、Sn-Pb、Sn-Ag、Sn-Cu、Sn-Ag-Cu或Sn-Bi等的焊料所形成。外部連接端子31係由焊料所形成的情況下，在形成外部連接端子31之前，可於積層體21之另一側的主面21b露出配線圖案的部分實施例如鍍鎳、鍍金或鍍錫，亦可實施預焊(pre-solder)處理，亦可實施有機可焊性保護劑(OSP；organic solderability preservative)等的有機被膜處理。
第2圖係說明本實施形態之配線基板的圖。如第2圖所示，配線基板11具備支持體12、接著層(接著劑層)13及積層體21。積層體21具有第1樹脂層14、連接墊片15、配線圖案18、第2樹脂層19及連接端子20。積層體21的厚度可為例如0.001mm以上1mm以下，亦可為0.01mm以上0.8mm以下，亦可為0.03mm以上0.5mm以下，亦可為0.001mm以上0.8mm以下，亦可為0.001mm以上0.5mm以下，亦可為0.01mm以上0.8mm以下，亦可為0.01mm以上0.5mm以下。藉由使積層體21的厚度為0.001mm以上，可利用第1樹脂層14及第2樹脂層19來保護設於積層體21的配線圖案18。藉由使積層體21的厚度為1mm以下，可抑制因支 持體12與積層體21的線膨脹係數等的差異所引起的配線基板11的翹曲。此外，本說明書之積層體21的厚度，係從接著層13的頂面至第2樹脂層19或配線圖案18之最頂面的厚度方向。亦即，「厚度」係沿著相對配線基板11之主面的垂直方向的長度。
支持體12，係由例如具有透光性質(透明性)的材料所構成的基板。支持體12的主面12a為例如略矩形、略圓形或略橢圓形等。穿透支持體12之光的波長範圍可為例如300nm以上2000nm以下，亦可為300nm以上1100nm以下。支持體12可為具有例如使如雷射光之特定波長穿透之性質者。支持體12可使用例如玻璃基板。作為玻璃，可使用例如石英玻璃、硼矽酸玻璃、無鹼玻璃、鈉玻璃或藍寶石玻璃等。玻璃的線膨脹係數，較佳為與上述半導體晶片22之線膨脹係數接近的值，例如-1ppm/℃以上10.0ppm/℃以下(或0.5ppm/℃以上5.0ppm/℃以下)。根據JIS B 0601：2013的支持體12之主面12a的最大高度粗糙度Rz，例如可為0.01μm以上5μm以下，亦可為0.1μm以上3μm以下。藉由支持體12之主面12a的最大高度粗糙度Rz為0.01μm以上，可抑制準備支持體12的成本增加。藉由支持體12之主面12a的最大高度粗糙度Rz為5μm以下，可抑制因主面12a的凹凸引起配線圖案18的斷線及短路等。
接著層13係用以使支持體12與積層體21互相接著之層。接著層13具有設於支持體12之主面12a上的剝離層41及設於剝離層41上的保護層42。
剝離層41包含可藉由光的照射而分解的樹脂(第3樹脂)。本實施形態中的光為雷射光，故作為剝離層41所包含之樹脂，可使用可藉由照射雷射光而熱分解的樹脂。作為剝離層41所包含之樹脂，例如可使用環氧樹脂、聚胺基甲酸酯樹脂、聚矽氧樹脂、聚酯樹脂、環氧丙烷樹脂及馬來醯亞胺樹脂之中的1種或混合兩種以上該等樹脂的樹脂等。剝離層41的厚度為例如1μm~10μm。
保護層42係以「保護積層體21不被從外部透過支持體12照射之光所損傷」的方式而構成。作為保護層42，例如可使用環氧樹脂、聚胺基甲酸酯樹脂、聚矽氧樹脂、聚酯樹脂、環氧丙烷樹脂及馬來醯亞胺樹脂之中的1種或混合兩種以上該等樹脂的樹脂(第4樹脂)等。保護層42可為包含上述樹脂的層或以上述樹脂為主要成分的層。從保護積層體21不被光損傷的觀點來看，保護層42的厚度需充分大於剝離層41，例如為20μm~100μm。
第1樹脂層14係設於接著層13上的樹脂層，其具有開口部14a。第1樹脂層14包含例如環氧樹脂、聚醯亞胺、馬來醯亞胺樹脂、聚對苯二甲酸乙二酯、聚苯醚(Polyphenylene oxide)、液晶聚合物或聚矽氧等的樹脂材料及該等的複合材料。又，第1樹脂層14可包含無機填充劑或有機填充劑。第1樹脂層14可包含例如組合環氧樹脂及玻璃纖維的材料。作為第1樹脂層14，可使用例如包含環氧系的絕緣性樹脂等的阻焊劑。第1樹脂層14的厚度為例如0.5μm~30μm。
連接墊片15係由例如Au等的金屬所構成的導電層，其設於第1樹脂層14的開口部14a內。連接墊片15可在開口部14a內與接著層13連接。連接墊片15的厚度為例如0.001μm~3μm。
配線圖案18係由例如Au、Cu、Ni等的金屬所構成的導電層，其設於第1樹脂層14及連接墊片15上。配線圖案18係透過第1樹脂層14的開口部14a而與連接墊片15電性連接。配線圖案18的厚度為例如1μm~20μm。
第2樹脂層19係設於第1樹脂層14、連接墊片15及配線圖案18上的樹脂層，其具有開口部19a。第2樹脂層19包含例如環氧樹脂、聚醯亞胺、馬來醯亞胺樹脂、聚對苯二甲酸乙二酯、聚苯醚(Polyphenylene oxide)、液晶聚合物或聚矽氧等的樹脂材料及該等的複合材料。又，第2樹脂層19中亦可包含無機填充劑或有機填充劑。第2樹脂層19亦可包含例如組合環氧樹脂及玻璃纖維的材料。作為第2樹脂層19，可使用例如包含環氧系的絕緣性樹脂等的阻焊劑。設於第2樹脂層19的開口部19a，不與第1樹脂層14的開口部14a重疊，並設置成露出使一部分配線圖案18露出。第2樹脂層19的厚度為例如0.5μm~30μm。
連接端子20係設於第2樹脂層19之開口部19a內的端子，其設置成使配線圖案18容易與半導體晶片22之突起電極23電性連接。連接端子20係由例如共晶焊料或無鉛焊料(Sn-Ag、Sn-Cu、Sn-Ag-Cu或Sn-Bi 等)所形成。連接端子20可為於包含各種金屬之導電層上設置共晶焊料或無鉛焊料的端子。又，可藉由對開口部19a實施Ni、Au、Sn等的鍍敷處理、或OSP等的有機被膜處理，來形成連接端子20。又，連接端子20，可藉由對配線圖案18進行鍍金而形成。此情況下，可提高連接端子20的導電性，並且抑制連接端子20的腐蝕。半導體晶片22的突起電極23為金焊球凸塊(ball bump)(例如Au、含Au之合金、或於表面實施鍍金的金屬複合體所形成的金凸塊、或由Au系焊料所形成的凸塊)的情況下，該突起電極23與經實施鍍金之連接端子的接合性提高。
接著，一邊參照第3圖(a)~(c)及第4圖(a)~(c)，一邊說明本實施形態之配線基板之製造方法。第3圖(a)~(c)及第4圖(a)~(c)係說明配線基板之製造方法之一例的圖。
首先，如第3圖(a)所示，於支持體12的主面12a上形成包含剝離層41及保護層42的接著層13。剝離層41係以例如印刷法、真空壓製法、真空積層法、輥壓法、旋轉塗布法、模塗法、簾幕式塗布法、輥塗法或光微影法等習知的方法所形成。又，保護層42係藉由印刷法、真空壓製法、真空積層法、輥壓法、旋轉塗布法、模塗法、簾幕式塗布法、輥塗法或光微影法等及組合該等的方法而形成。
接著，如第3圖(b)所示，將第1樹脂層14設於接著層13上後，於該第1樹脂層14上形成開口部 14a。接著，於該開口部14a內形成連接墊片15。第1樹脂層14係以例如印刷法、真空壓製法、真空積層法、輥壓法、旋轉塗布法、模塗法、簾幕式塗布法、輥塗法或光微影法等習知的方法而形成。開口部14a係藉由例如對第1樹脂層14進行雷射的照射或光微影以將第1樹脂層14的一部分去除而形成。連接墊片15係藉由例如鍍敷處理而設置。亦可不必設置連接墊片15。
接著，如第3圖(c)所示，於第1樹脂層14及連接墊片15上設置晶種層(seed layer)16。晶種層16係透過第1樹脂層14的開口部14a而與連接墊片15連接。晶種層16係藉由例如無電鍍敷法、濺射法或CVD法等所形成。又，可藉由於第1樹脂層14上貼附由Cu等所構成的導體箔，來形成晶種層16。晶種層16係藉由例如Cu層、經鍍鎳之Cu層、經鍍金之Cu層、經焊料鍍敷之Cu層、Al層或Ag/Pd合金層等所形成。本實施形態中，從成本、電特性及製造簡易度的觀點來看，可使用Cu層。
接著，如第4圖(a)所示，於晶種層16上設置具有開口部17a的光阻17。接著，藉由對因開口部17a而露出的一部分晶種層16實施例如鍍敷處理，而使該部分變厚。此處，將晶種層16之較薄區域作為第1區域16a，較厚區域作為第2區域16b。第1區域16a係存在於第1樹脂層14及光阻17之間的區域。第2區域16b係由例如Cu層、經鍍鎳之Cu層、經鍍金之Cu層、經焊料鍍敷之Cu層、Al層或Ag/Pd合金層等所形成。本 實施形態中，從成本、電特性及製造簡易度的觀點來看，可使用Cu層。又，作為光阻17，可使用例如負型或正型的光阻。
接著，如第4圖(b)所示，藉由將光阻17及晶種層16之第1區域16a去除而形成配線圖案18。光阻17，可藉由例如剝離(lift off)而從第1樹脂層14上去除，亦可藉由蝕刻去除。第1區域16a，係藉由例如濕蝕刻或乾蝕刻去除。藉由將第1區域16a去除，第2區域16b成為配線圖案18。第2區域16b的一部分，可與第1區域16a同時被蝕刻。亦即，本實施形態之配線圖案18，係藉由半加成法(semi-additive method)而形成。半加成法，係形成Cu層等的晶種層，將具有所期望之圖案的光阻形成於晶種層上，並藉由電鍍敷法等使晶種層中露出的部分厚膜化，將光阻去除後，蝕刻薄晶種層而得到配線圖案的方法。
又，如第4圖(b)所示，形成配線圖案18後，將第2樹脂層19形成於第1樹脂層14及配線圖案18上，並於第2樹脂層19的一部分形成開口部19a。第2樹脂層19係以例如印刷法、真空壓製法、真空積層法、輥壓法、旋轉塗布法、模塗法、簾幕式塗布法、輥塗法或光微影法等習知的方法形成。開口部19a係藉由例如對第2樹脂層19進行雷射的照射或光微影以將第2樹脂層19的一部分去除而形成。藉由形成開口部19a，而露出配線圖案18的一部分。
最後，如第4圖(c)所示，於開口部19a內形成連接端子20。連接端子20，可藉由例如將共晶焊料或無鉛焊料供給至開口部19a內而設置。藉由上述，形成具有支持體12、接著層13及積層體21的配線基板11，該積層體21包含第1樹脂層14、連接墊片15、配線圖案18、第2樹脂層19及連接端子20。
接著，一邊參照第5圖(a)~(c)、第6圖(a)~(c)及第7圖(a)~(c)，一邊說明使用本實施形態之配線基板製造半導體裝置的方法。第5圖(a)~(c)、第6圖(a)~(c)及第7圖(a)~(c)係說明半導體裝置之製造方法之一例的圖。
首先，如第5圖(a)所示，準備具有支持體12、接著層13及積層體21的配線基板11。配線基板11,與第2圖或第4圖(c)所示之配線基板11相同。
接著，如第5圖(b)所示，將複數半導體晶片22搭載於於配線基板11上。具體而言，以倒裝晶片方式，將半導體晶片22搭載於配線基板11之積層體21之一側的主面21a上。在將半導體晶片22搭載於配線基板11時，半導體晶片22的突起電極23與配線基板11的連接端子20(參照第2圖)互相連接。又，藉由於半導體晶片22及配線基板11之間設置底部填充材料24，來固定及封裝半導體晶片22及配線基板11。底部填充材料24可在將半導體晶片22搭載於配線基板11之後，供給至半導體晶片22及配線基板11之間。又，亦可預先將底部填充材料24附著於半導體晶片22或配線基板11 上，並在將半導體晶片22搭載於配線基板11的同時完成利用底部填充材料24的封裝。例如，藉由對底部填充材料24實施利用加熱或光照射之硬化處理，而進行利用底部填充材料24之半導體晶片22及配線基板11的固定及封裝。亦可不必設置底部填充材料24。
接著，如第5圖(c)所示，於積層體21之一側的主面21a上形成模製樹脂25。此時，藉由模製樹脂25埋設半導體晶片22。模製樹脂25係以例如轉移成形法或罐封法等習知的方法所形成。以利用模製樹脂25進行封裝的方式覆蓋半導體晶片22。
接著，如第6圖(a)所示，透過支持體12對接著層13照射雷射光L。可對支持體12整體照射雷射光L，亦可對支持體12所期望的位置照射雷射光L。本實施形態中，從確實地分解接著層13內之剝離層41的樹脂的觀點來看，係一邊使其直線往返一邊對支持體12整體照射雷射光L。雷射光L，例如可具有300nm以上2000nm以下的波長，亦可具有300nm以上1500nm以下的波長，亦可具有300nm以上1100nm以下的波長。作為射出雷射光L之裝置的一例，可列舉射出1064nm之波長光的YAG雷射裝置、532nm之波長的2倍高諧波YAG雷射裝置或射出780~1300nm之波長光的半導體雷射裝置等。支持體12具有透明性，而可穿透雷射光L。因此，穿透支持體12的雷射光L的能量，被接著層13所吸收。被吸收之雷射光L的能量，在接著層13內轉換成熱能。藉由該熱能，剝離層41的樹脂達到熱分解溫度 而進行熱分解。藉此，剝離層41將支持體12與積層體21接著的接著力變弱。
接著，如第6圖(b)所示，將支持體12從積層體21剝離。將支持體12從積層體21剝離的方法，可為手動，亦可使用機械進行。接著，將接著層13(更具體而言為保護層42)從積層體21去除。殘留有剝離層41的情況下，將具有剝離層41及保護層42的接著層13去除。例如，藉由將膠帶貼附於積層體21之另一側的主面21b後進行揭膜(peel)，以將殘留於另一側的主面21b上的接著層13從積層體21去除。又，可將另一側的主面21b浸漬於過錳酸鉀水溶液及氫氧化鈉水溶液的混合溶液等，以去除接著層13，亦可藉由將該混合溶液噴塗於另一側的主面21b上以去除接著層13。又，可將另一側的主面21b浸漬於丙酮或甲乙酮等的有機溶劑以去除接著層13，亦可藉由將該有機溶劑噴塗於另一側的主面21b上以去除接著層13。又，可直接使接著層13殘留於另一側的主面21b上，但此情況下，必須使其形成開口部，用以使用雷射光等而設置外部連接端子31。藉由上述，如第6圖(c)所示，將支持體12及接著層13從積層體21去除。
接著，如第7圖(a)所示，於積層體21之另一側的主面21b上形成複數的外部連接端子31。具體而言，在相當於積層體21之連接墊片15(參照第2圖)的部分，形成外部連接端子31。藉由例如焊球搭載法等而形成外部連接端子31。
接著，如第7圖(b)所示，將切割膠帶(dicing tape)33貼附於模製樹脂25後，切斷位於各半導體晶片22之間的區域的積層體21及模製樹脂25，進行單片化。使用例如切割機或雷射等而切斷積層體21及模製樹脂25。藉由上述，如第7圖(c)所示，製造使用配線基板11所形成之半導體裝置1。
以上所說明之本實施形態之配線基板11具備積層體21，該積層體21發揮作為「用以使半導體裝置1之半導體晶片22與外部裝置連接」的外部連接構件的功能。藉此，可分別製造半導體晶片22與具有外部連接構件的配線基板11，故可用於改善半導體裝置1的製造效率。又，該配線基板11中，支持體12具有透明性。藉此，可藉由透過支持體12對剝離層41照射光而使樹脂分解，使剝離層41的接著力變弱。因此，在接合半導體晶片22與配線基板11的積層體21後，可容易將支持體12從積層體21剝離，可將使用該配線基板11所製造之半導體裝置1薄型化。此外，接著層13具有剝離層41及保護層42，並且保護層42設於剝離層41與積層體21之間，藉此可抑制光(例如雷射光)的能量傳遞至積層體21。因此，可抑制積層體21的第1樹脂層14及第2樹脂層19所包含之樹脂分解。再者，藉由使用具有支持體12之配線基板11製造半導體裝置1，可使配線基板11的操作變得容易。
又，支持體12的線膨脹係數可為-1ppm/℃以上10ppm/℃以下。此情況下，半導體晶片22係由矽 基板等的以無機物為主要成分的基板所製造，故半導體晶片22的線膨脹係數與支持體12的線膨脹係數互為接近值。因此，可抑制在將半導體晶片22搭載於配線基板11時所發生的位置偏差。因此，可抑制「半導體晶片22無法搭載於配線基板11的情況」及「接合半導體晶片22與配線基板11的部分損壞的情況」。
又，支持體12可為玻璃基板。此情況下，可以低成本提高支持體12的強度，並且容易使支持體12大型化。又，可容易調整支持體12表面的粗糙度。
支持體12之主面12a的最大高度粗糙度Rz可為0.01μm以上5μm以下。此情況下，設於支持體12上之積層體21的凹凸變小，故可抑制配線圖案18的斷線及短路等。
又，保護層42可為包含樹脂的層或以樹脂為主要成分的層。此情況下，對於連接墊片15，可選擇性良好地去除保護層42。藉此，可防止連接墊片15的蝕刻等，並確保該連接墊片15及外部連接端子31的良好連接。因此，半導體裝置1的產率提高。
又，積層體21的厚度可為0.001mm以上1mm以下。此情況下，可藉由第1樹脂層14及第2樹脂層19來保護積層體21中的配線圖案18，並且可抑制配線基板11的翹曲。
又，光可為雷射光L。此情況下，可充分施加為了使剝離層41內的樹脂分解所需要的熱能，進而可有效地使剝離層41的接著力變弱。又，雷射光L係透 過支持體12對剝離層41進行照射，故可使半導體晶片22不因雷射光L造成損傷，而有效地使剝離層41的接著力變弱。
又，使用本實施形態之配線基板11所製造之半導體裝置1係具備：支持體12被去除的積層體21；及半導體晶片22，其表面22a設有突起電極23，透過該突起電極23而與積層體21的配線圖案18連接。該半導體裝置1中，半導體晶片22與作為外部連接構件的積層體21係各別製造，故可改善半導體裝置1的製造效率。又，藉由將配線基板中之支持體12從積層體21去除，可使半導體裝置1薄型化。
又，配線圖案18與半導體晶片22，可透過包含焊料之連接端子20互相連接。此情況下，即使在配線圖案18與半導體晶片22之間發生位置偏差的情況下，亦可藉由連接端子20所包含之焊料填補偏差，可抑制在半導體晶片22與積層體21之間所發生的連接不良。
第8圖係顯示變化例之連接配線之一部分的圖。如第8圖所示，接著層13A的剝離層41A可包含銅、鎳、金、銀、鈦、鉻、鋁等的金屬及該等的金屬氧化物。該金屬及金屬氧化物，例如為分散於剝離層41A的粒子51。分散於剝離層41A內的粒子51，比剝離層41A的樹脂更容易吸收雷射光等的光能。藉由粒子51所吸收之光能被轉化成熱能，該熱能傳遞至剝離層41A內，藉此可促進剝離層41A內之樹脂的分解。藉此，即使降低照射至配線基板11的光能總量，亦可充分減弱剝 離層41A的接著力，故可進一步抑制光能傳遞至積層體21。因此，可較佳地抑制積層體21的第1樹脂層14及第2樹脂層19所包含之樹脂被分解。此外，剝離層41A內所包含之金屬或金屬氧化物，亦可不是粒子而是碎片等。
本發明之配線基板、半導體裝置及半導體裝置之製造方法，並不限於上述實施形態，可有其他各種變化。例如，可適當組合上述實施形態及變化例。又，積層於積層體21之半導體晶片22亦可複數搭載於單片化之配線基板11的區域。又，積層體21上亦可搭載半導體晶片22以外的構件(例如電容器等的被動元件)。
又，例如第1樹脂層14之開口部14a與第2樹脂層19之開口部19a，亦可互相重疊。再者，亦可不必設置例如積層體21中之連接端子20。
又，配線基板11中之配線圖案18，並不限於半加成法，可以例如減除法(subtractive method)或完全加成法等習知的方法而形成。此處，減除法係於Cu層等的導體層上形成具有所期望圖案的光阻並將不要的導體層蝕刻後，剝離光阻以得到配線圖案的方法。又，完全加成法係先使無電鍍敷觸媒吸附於樹脂層上，將所期望圖案的光阻形成於樹脂層上；接著，在殘留該光阻作為絕緣膜的情況下使膜觸媒活性化，並藉由無電鍍敷法使Cu等的導體析出於光阻開口部內；接著，去除光阻以得到所期望之配線圖案的方法。
又，亦可於第2樹脂層19上形成新的配線圖案與第3樹脂層。亦即，積層體21可具有3層樹脂層。再者，藉由重複形成上述配線圖案及樹脂層，亦可形成積層多層配線圖案及樹脂層的積層體21。
[實施例]
雖藉由以下實施例進一步詳細說明本發明，但本發明並不限定於該等例子。
(配線基板)
實施例中，首先，如第9圖(a)所示，依序於支持體12的主面12a上形成剝離層41及保護層42。使用玻璃(OA-10G(日本電氣硝子股份有限公司製)、1.1mm厚)作為支持體12。支持體12的線膨脹係數約為4ppm/℃。支持體12之主面12a上的剝離層41，係使用3M Light-To-Heat-Conversion(LTHC)Release Coating(住友3M股份有限公司製)所形成。保護層42，係使用3M UV-Curable Adhesive LC-5200(住友3M股份有限公司製)所形成。剝離層41及保護層42皆係藉由旋轉塗布法所形成。
接著，如第9圖(b)所示，於保護層42上設置第1樹脂層14後，在該第1樹脂層14上形成開口部14a。第1樹脂層14，係藉由真空積層法形成於保護層42上。使用ABF-GX-T31(Ajinomoto Fine-Techno股份有限公司製)，作為第1樹脂層14。藉由雷射照射設置開口部14a。接著，藉由鍍金於該開口部14a內形成連接墊片15。
接著，如第9圖(c)~第10圖(b)所示，在形成連接墊片15後，藉由半加成法形成配線圖案18。配線圖案18的材料為Cu。又，在形成配線圖案18後，形成第2樹脂層19，並將開口部19a設於第2樹脂層19上。第2樹脂層19，係藉由真空積層法形成於第1樹脂層14及配線圖案18上。使用ABF-GX-T31(Ajinomoto Fine-Techno股份有限公司製)，作為第2樹脂層19。藉由雷射照射設置開口部19a。
最後，如第10圖(c)所示，藉由對開口部19a內實施OSP處理來形成連接端子20A，藉此得到具有積層體21的配線基板11A。包含第1樹脂層14、第2樹脂層19及配線圖案18之積層體21的厚度約為0.07mm。
(半導體裝置)
接著，將半導體晶片22搭載於所得之配線基板11A上。半導體晶片22，係使用具有「於銅柱的前端形成有Sn-3.5Ag焊料層的突起電極23」者。又，半導體晶片22的線膨脹係數約為3ppm/℃。預先將底部填充材料24供給至配線基板11A。對準半導體晶片22的突起電極23與配線基板11A的連接端子20後，將半導體晶片22壓合至配線基板11A並進行加熱。之後，藉由轉移成形法，使用模製樹脂25封裝包含半導體晶片22之配線基板11A的頂面。接著，從配線基板11A的支持體12側開始，一邊使其直線往返一邊對支持體整體照射1064nm的YAG雷射，以將支持體12從配線基板11A去 除。再者，將膠帶貼附於積層體21及保護層42後，揭開該膠帶，藉此將保護層42從配線基板11A去除。接著，將Sn-3Ag-0.5Cu焊球搭載於積層體21，以形成外部連接端子31。藉由將該結構體貼附於切割膠帶並進行切割，得到第1圖所示之半導體裝置1。
(藉由X光透視裝置之觀察)
以X光透視裝置(Uni-Hite System股份有限公司製、XVA-160α)，對如上述所製作之半導體裝置1進行觀察。觀察半導體裝置1的結果，在半導體晶片22的突起電極23與配線基板11A的連接端子20之間，產生偏離設計值約2μm的位置偏差。此處，在使用樹脂之中線膨脹係數較低的聚醯亞胺製支持體作為用於形成半導體裝置之配線基板的支持體的情況下，一般在半導體晶片的突起電極與該配線基板的連接端子之間，產生偏離設計值約15μm的位置偏差。這種由支持體的材質所引起的位置偏差之差異，可認為是因為聚醯亞胺製支持體的線膨脹係數約為12~50ppm/℃，與半導體晶片的線膨脹係數(約2~4ppm/℃)差異甚大。因此，可確認下述結果：比起使用樹脂製的支持體，在配線基板中使用玻璃製的支持體者，半導體晶片與配線基板之間所發生之位置偏差更小。
[產業上的可利用性]
根據本發明之配線基板、半導體裝置及該半導體裝置之製造方法，可用於改善半導體裝置之製造效率及使該半導體裝置薄型化，或使半導體裝置薄型化及改善製造效率。

Claims (14)

  1. 一種配線基板，其具備：支持體，具有透明性；接著層，設於該支持體的主面上；及積層體，其設於該接著層上，且具有第1樹脂層、設於該第1樹脂層上的第2樹脂層及至少設於該第1樹脂層及第2樹脂層之間的配線圖案；該接著層具有剝離層及保護層，該剝離層設於該支持體的該主面上並且包含可藉由光之照射而分解的第3樹脂，該保護層設於該剝離層上以保護該積層體不被該光損傷並且包含第4樹脂；於該第1樹脂層具有第1開口部，於該第1開口部設置連接墊片而形成外部連接端子，並且於該第2樹脂層具有第2開口部，於該第2開口部形成連接端子且與半導體晶片連接，且該第1開口部與第2開口部並不重疊，而設置成露出使一部分配線圖案露出。
  2. 如請求項1之配線基板，其中該支持體的線膨脹係數為-1ppm/℃以上10ppm/℃以下。
  3. 如請求項1或2之配線基板，其中該支持體為玻璃基板。
  4. 如請求項1或2之配線基板，其中該支持體之該主面的最大高度粗糙度為0.01μm以上5μm以下。
  5. 如請求項1或2之配線基板，其中該保護層係包含該第4樹脂的層，或以該第4樹脂為主要成分的層。
  6. 如請求項1或2之配線基板，其中該積層體的厚度為0.001mm以上1mm以下。
  7. 一種半導體裝置，其具備：積層體，在如請求項1至6中任一項之配線基板中，將該支持體去除之該積層體；及半導體晶片，表面設有突起電極，並透過該突起電極而與該積層體的該配線圖案連接。
  8. 如請求項7之半導體裝置，其中該配線圖案與該半導體晶片係透過包含焊料之連接端子而互相連接。
  9. 如請求項7或8之半導體裝置，其中該配線圖案與該半導體晶片係透過含金之連接端子而互相連接。
  10. 一種半導體裝置之製造方法，其具備：準備步驟，準備如請求項1至6中任一項之配線基板；接合步驟，將半導體晶片搭載於該配線基板的該積層體上，並且將該半導體晶片接合至該配線圖案；及剝離步驟，透過該支持體對該接著層照射光，藉此將該支持體從該積層體剝離。
  11. 如請求項10之半導體裝置之製造方法，其中該光為雷射光。
  12. 如請求項10或11之半導體裝置之製造方法，其中更具備：被覆步驟，以封裝樹脂被覆與該配線圖案接合的該半導體晶片。
  13. 如請求項10或11之半導體裝置之製造方法，其中更具備：去除步驟，在將該支持體從該積層體剝離的該步驟後，將該接著層從該積層體去除。
  14. 如請求項10或11之半導體裝置之製造方法，其中更具備：外部連接端子設置步驟，在將該支持體從該積層體剝離的該步驟後，將外部連接端子設於該積層體；及單片化步驟，切斷該積層體而單片化。
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