TWI659513B - 陣列基板、覆晶薄膜、顯示裝置及對位方法 - Google Patents

陣列基板、覆晶薄膜、顯示裝置及對位方法 Download PDF

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Publication number
TWI659513B
TWI659513B TW107133340A TW107133340A TWI659513B TW I659513 B TWI659513 B TW I659513B TW 107133340 A TW107133340 A TW 107133340A TW 107133340 A TW107133340 A TW 107133340A TW I659513 B TWI659513 B TW I659513B
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TW
Taiwan
Prior art keywords
alignment
mark
pin
flip
array substrate
Prior art date
Application number
TW107133340A
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English (en)
Chinese (zh)
Other versions
TW201943044A (zh
Inventor
劉仁杰
王向前
陳玲艷
Original Assignee
大陸商昆山國顯光電有限公司
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Application filed by 大陸商昆山國顯光電有限公司 filed Critical 大陸商昆山國顯光電有限公司
Application granted granted Critical
Publication of TWI659513B publication Critical patent/TWI659513B/zh
Publication of TW201943044A publication Critical patent/TW201943044A/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/147—Structural association of two or more printed circuits at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10128—Display
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/101—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/301—Marks applied to devices, e.g. for alignment or identification for alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/607—Located on parts of packages, e.g. on encapsulations or on package substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07221—Aligning
    • H10W72/07223—Active alignment, e.g. using optical alignment using marks or sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07521—Aligning
    • H10W72/07523—Active alignment, e.g. using optical alignment using marks or sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Electroluminescent Light Sources (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
TW107133340A 2018-04-02 2018-09-21 陣列基板、覆晶薄膜、顯示裝置及對位方法 TWI659513B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810283325.3 2018-04-02
CN201810283325.3A CN108493183B (zh) 2018-04-02 2018-04-02 一种阵列基板、覆晶薄膜及其对位方法及显示装置

Publications (2)

Publication Number Publication Date
TWI659513B true TWI659513B (zh) 2019-05-11
TW201943044A TW201943044A (zh) 2019-11-01

Family

ID=63318062

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107133340A TWI659513B (zh) 2018-04-02 2018-09-21 陣列基板、覆晶薄膜、顯示裝置及對位方法

Country Status (7)

Country Link
US (1) US10964644B2 (https=)
EP (1) EP3640980A4 (https=)
JP (1) JP7058319B2 (https=)
KR (1) KR20200008655A (https=)
CN (1) CN108493183B (https=)
TW (1) TWI659513B (https=)
WO (1) WO2019192137A1 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
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CN110097823B (zh) * 2019-04-09 2021-02-02 深圳市华星光电半导体显示技术有限公司 显示面板及显示模组
KR102796654B1 (ko) * 2019-09-02 2025-04-16 삼성디스플레이 주식회사 표시 장치
CN110707136B (zh) * 2019-10-28 2025-01-21 京东方科技集团股份有限公司 一种覆晶薄膜绑定结构、显示模组及终端设备
CN110930866B (zh) * 2019-11-26 2021-07-06 Tcl华星光电技术有限公司 覆晶薄膜及显示装置
CN111081151A (zh) * 2020-01-08 2020-04-28 深圳市华星光电半导体显示技术有限公司 显示面板
KR102812775B1 (ko) 2020-10-06 2025-05-26 삼성디스플레이 주식회사 표시 장치 및 가요성 인쇄 회로 기판의 정렬 방법
CN114696129B (zh) * 2020-12-28 2026-03-20 超聚变数字技术股份有限公司 显示模组及电子设备
USD1000400S1 (en) * 2021-04-16 2023-10-03 Creeled, Inc. Light emitting diode package
US20240298403A1 (en) * 2021-05-13 2024-09-05 Hefei Boe Display Technology Co., Ltd. Circuit board, chip on film, display apparatus and bonding method
KR102802969B1 (ko) * 2022-10-24 2025-05-08 세메스 주식회사 반도체 기판 장치와, 반도체 처리 방법 및 반도체 처리 장치
US12494440B2 (en) * 2023-05-31 2025-12-09 Infineon Technologies Ag Power semiconductor module and method of increasing pin alignment accuracy for power semiconductor modules

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TW200737377A (en) * 2006-03-24 2007-10-01 Chipmos Technologies Inc Inner lead bonding tape and tape carrier package utilizing the tape
TW200822303A (en) * 2006-11-07 2008-05-16 Chipmos Technologies Inc Substrate for chip on film packages
TW200847317A (en) * 2007-05-18 2008-12-01 Au Optronics Corp System and method for alignment
JP2012013719A (ja) * 2010-06-29 2012-01-19 Funai Electric Co Ltd Ｃｏｆアライメントマーク
US20140111729A1 (en) * 2012-10-18 2014-04-24 Shenzhen China Star Optoelectronics Technology Co. Ltd. Cof base tape and manufacturing method thereof and liquid crystal display module comprising same

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JP4651886B2 (ja) * 2001-09-14 2011-03-16 東北パイオニア株式会社 電子機器及び電子機器の製造方法
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CN102890348B (zh) 2012-10-18 2016-03-30 深圳市华星光电技术有限公司 一种cof基带及其制造方法、液晶显示模组
CN203365865U (zh) * 2013-07-04 2013-12-25 京东方科技集团股份有限公司 一种阵列基板、覆晶薄膜和显示装置
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TW200737377A (en) * 2006-03-24 2007-10-01 Chipmos Technologies Inc Inner lead bonding tape and tape carrier package utilizing the tape
TW200822303A (en) * 2006-11-07 2008-05-16 Chipmos Technologies Inc Substrate for chip on film packages
TW200847317A (en) * 2007-05-18 2008-12-01 Au Optronics Corp System and method for alignment
JP2012013719A (ja) * 2010-06-29 2012-01-19 Funai Electric Co Ltd Ｃｏｆアライメントマーク
US20140111729A1 (en) * 2012-10-18 2014-04-24 Shenzhen China Star Optoelectronics Technology Co. Ltd. Cof base tape and manufacturing method thereof and liquid crystal display module comprising same

Also Published As

Publication number Publication date
EP3640980A1 (en) 2020-04-22
JP2020526934A (ja) 2020-08-31
KR20200008655A (ko) 2020-01-28
WO2019192137A1 (zh) 2019-10-10
TW201943044A (zh) 2019-11-01
CN108493183A (zh) 2018-09-04
CN108493183B (zh) 2020-05-08
US20190164901A1 (en) 2019-05-30
JP7058319B2 (ja) 2022-04-21
EP3640980A4 (en) 2020-10-28
US10964644B2 (en) 2021-03-30

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