TWI659513B - 陣列基板、覆晶薄膜、顯示裝置及對位方法 - Google Patents

陣列基板、覆晶薄膜、顯示裝置及對位方法 Download PDF

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Publication number
TWI659513B
TWI659513B TW107133340A TW107133340A TWI659513B TW I659513 B TWI659513 B TW I659513B TW 107133340 A TW107133340 A TW 107133340A TW 107133340 A TW107133340 A TW 107133340A TW I659513 B TWI659513 B TW I659513B
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TW
Taiwan
Prior art keywords
alignment
mark
pin
flip
array substrate
Prior art date
Application number
TW107133340A
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English (en)
Chinese (zh)
Other versions
TW201943044A (zh
Inventor
劉仁杰
王向前
陳玲艷
Original Assignee
大陸商昆山國顯光電有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 大陸商昆山國顯光電有限公司 filed Critical 大陸商昆山國顯光電有限公司
Application granted granted Critical
Publication of TWI659513B publication Critical patent/TWI659513B/zh
Publication of TW201943044A publication Critical patent/TW201943044A/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/147—Structural association of two or more printed circuits at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10128—Display
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/101—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/301—Marks applied to devices, e.g. for alignment or identification for alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/607—Located on parts of packages, e.g. on encapsulations or on package substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07221—Aligning
    • H10W72/07223—Active alignment, e.g. using optical alignment using marks or sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07521—Aligning
    • H10W72/07523—Active alignment, e.g. using optical alignment using marks or sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
TW107133340A 2018-04-02 2018-09-21 陣列基板、覆晶薄膜、顯示裝置及對位方法 TWI659513B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810283325.3A CN108493183B (zh) 2018-04-02 2018-04-02 一种阵列基板、覆晶薄膜及其对位方法及显示装置
CN201810283325.3 2018-04-02

Publications (2)

Publication Number Publication Date
TWI659513B true TWI659513B (zh) 2019-05-11
TW201943044A TW201943044A (zh) 2019-11-01

Family

ID=63318062

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107133340A TWI659513B (zh) 2018-04-02 2018-09-21 陣列基板、覆晶薄膜、顯示裝置及對位方法

Country Status (6)

Country Link
EP (1) EP3640980A4 (https=)
JP (1) JP7058319B2 (https=)
KR (1) KR20200008655A (https=)
CN (1) CN108493183B (https=)
TW (1) TWI659513B (https=)
WO (1) WO2019192137A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110097823B (zh) * 2019-04-09 2021-02-02 深圳市华星光电半导体显示技术有限公司 显示面板及显示模组
CN110930866B (zh) * 2019-11-26 2021-07-06 Tcl华星光电技术有限公司 覆晶薄膜及显示装置
CN111081151A (zh) * 2020-01-08 2020-04-28 深圳市华星光电半导体显示技术有限公司 显示面板
CN114696129B (zh) * 2020-12-28 2026-03-20 超聚变数字技术股份有限公司 显示模组及电子设备
WO2022236780A1 (zh) * 2021-05-13 2022-11-17 京东方科技集团股份有限公司 电路板、覆晶膜、显示装置和绑定方法
KR102802969B1 (ko) * 2022-10-24 2025-05-08 세메스 주식회사 반도체 기판 장치와, 반도체 처리 방법 및 반도체 처리 장치

Citations (6)

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Publication number Priority date Publication date Assignee Title
US6809406B2 (en) * 2002-09-30 2004-10-26 Oki Electric Industry Co., Ltd. COF tape carrier, semiconductor element, COF semiconductor device, and method for manufacturing of COF semiconductor device
TW200737377A (en) * 2006-03-24 2007-10-01 Chipmos Technologies Inc Inner lead bonding tape and tape carrier package utilizing the tape
TW200822303A (en) * 2006-11-07 2008-05-16 Chipmos Technologies Inc Substrate for chip on film packages
TW200847317A (en) * 2007-05-18 2008-12-01 Au Optronics Corp System and method for alignment
JP2012013719A (ja) * 2010-06-29 2012-01-19 Funai Electric Co Ltd Ｃｏｆアライメントマーク
US20140111729A1 (en) * 2012-10-18 2014-04-24 Shenzhen China Star Optoelectronics Technology Co. Ltd. Cof base tape and manufacturing method thereof and liquid crystal display module comprising same

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JPH11274670A (ja) * 1998-03-19 1999-10-08 Kyocera Corp 積層基板
JP4651886B2 (ja) * 2001-09-14 2011-03-16 東北パイオニア株式会社 電子機器及び電子機器の製造方法
JP4214357B2 (ja) * 2002-02-28 2009-01-28 セイコーエプソン株式会社 電子デバイスの製造方法
JP2006119321A (ja) * 2004-10-21 2006-05-11 Kofu Casio Co Ltd 電気回路間の導通接続構造
JP2006245514A (ja) * 2005-03-07 2006-09-14 Hitachi Media Electoronics Co Ltd フレキシブル基板同士の接続方法
CN100461984C (zh) * 2005-09-30 2009-02-11 友达光电股份有限公司 电路组装结构
CN100545890C (zh) * 2007-03-22 2009-09-30 中华映管股份有限公司 显示面板、显示面板的引脚接合及检测方法
CN101060112B (zh) * 2007-06-11 2010-10-06 友达光电股份有限公司 基板对位系统及其对位方法
CN203365865U (zh) * 2013-07-04 2013-12-25 京东方科技集团股份有限公司 一种阵列基板、覆晶薄膜和显示装置
CN105551378A (zh) * 2016-02-04 2016-05-04 京东方科技集团股份有限公司 一种覆晶薄膜、柔性显示面板及显示装置
CN106783664B (zh) * 2017-01-03 2020-04-21 京东方科技集团股份有限公司 一种显示模组、绑定检测方法及绑定系统

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6809406B2 (en) * 2002-09-30 2004-10-26 Oki Electric Industry Co., Ltd. COF tape carrier, semiconductor element, COF semiconductor device, and method for manufacturing of COF semiconductor device
TW200737377A (en) * 2006-03-24 2007-10-01 Chipmos Technologies Inc Inner lead bonding tape and tape carrier package utilizing the tape
TW200822303A (en) * 2006-11-07 2008-05-16 Chipmos Technologies Inc Substrate for chip on film packages
TW200847317A (en) * 2007-05-18 2008-12-01 Au Optronics Corp System and method for alignment
JP2012013719A (ja) * 2010-06-29 2012-01-19 Funai Electric Co Ltd Ｃｏｆアライメントマーク
US20140111729A1 (en) * 2012-10-18 2014-04-24 Shenzhen China Star Optoelectronics Technology Co. Ltd. Cof base tape and manufacturing method thereof and liquid crystal display module comprising same

Also Published As

Publication number Publication date
EP3640980A1 (en) 2020-04-22
KR20200008655A (ko) 2020-01-28
JP2020526934A (ja) 2020-08-31
TW201943044A (zh) 2019-11-01
EP3640980A4 (en) 2020-10-28
CN108493183A (zh) 2018-09-04
CN108493183B (zh) 2020-05-08
JP7058319B2 (ja) 2022-04-21
WO2019192137A1 (zh) 2019-10-10

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