TWI642162B - Semiconductor device and method of manufacturing the same - Google Patents

Semiconductor device and method of manufacturing the same Download PDF

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Publication number
TWI642162B
TWI642162B TW104142826A TW104142826A TWI642162B TW I642162 B TWI642162 B TW I642162B TW 104142826 A TW104142826 A TW 104142826A TW 104142826 A TW104142826 A TW 104142826A TW I642162 B TWI642162 B TW I642162B
Authority
TW
Taiwan
Prior art keywords
semiconductor
wafer
interval
semiconductor wafer
semiconductor device
Prior art date
Application number
TW104142826A
Other languages
English (en)
Chinese (zh)
Other versions
TW201644033A (zh
Inventor
三浦正幸
Original Assignee
東芝記憶體股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東芝記憶體股份有限公司 filed Critical 東芝記憶體股份有限公司
Publication of TW201644033A publication Critical patent/TW201644033A/zh
Application granted granted Critical
Publication of TWI642162B publication Critical patent/TWI642162B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
TW104142826A 2015-06-01 2015-12-18 Semiconductor device and method of manufacturing the same TWI642162B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-111082 2015-06-01
JP2015111082A JP2016225484A (ja) 2015-06-01 2015-06-01 半導体装置および半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW201644033A TW201644033A (zh) 2016-12-16
TWI642162B true TWI642162B (zh) 2018-11-21

Family

ID=57453132

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104142826A TWI642162B (zh) 2015-06-01 2015-12-18 Semiconductor device and method of manufacturing the same

Country Status (3)

Country Link
JP (1) JP2016225484A (ja)
CN (1) CN106206517B (ja)
TW (1) TWI642162B (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6721696B2 (ja) 2016-09-23 2020-07-15 キオクシア株式会社 メモリデバイス
JP2021044362A (ja) * 2019-09-10 2021-03-18 キオクシア株式会社 半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201316486A (zh) * 2011-09-22 2013-04-16 Toshiba Kk 半導體裝置及其製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090014856A1 (en) * 2007-07-10 2009-01-15 International Business Machine Corporation Microbump seal
JP2010161102A (ja) * 2009-01-06 2010-07-22 Elpida Memory Inc 半導体装置
JP5570799B2 (ja) * 2009-12-17 2014-08-13 ピーエスフォー ルクスコ エスエイアールエル 半導体装置及びその製造方法
US8710654B2 (en) * 2011-05-26 2014-04-29 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method thereof
JP2014192171A (ja) * 2013-03-26 2014-10-06 Ps4 Luxco S A R L 半導体装置及びその製造方法
KR102065648B1 (ko) * 2013-08-14 2020-01-13 삼성전자주식회사 반도체 패키지
JP2015056563A (ja) * 2013-09-12 2015-03-23 株式会社東芝 半導体装置およびその製造方法
US9570421B2 (en) * 2013-11-14 2017-02-14 Taiwan Semiconductor Manufacturing Co., Ltd. Stacking of multiple dies for forming three dimensional integrated circuit (3DIC) structure

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201316486A (zh) * 2011-09-22 2013-04-16 Toshiba Kk 半導體裝置及其製造方法

Also Published As

Publication number Publication date
TW201644033A (zh) 2016-12-16
JP2016225484A (ja) 2016-12-28
CN106206517B (zh) 2019-11-08
CN106206517A (zh) 2016-12-07

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MM4A Annulment or lapse of patent due to non-payment of fees