TWI642162B - Semiconductor device and method of manufacturing the same - Google Patents
Semiconductor device and method of manufacturing the same Download PDFInfo
- Publication number
- TWI642162B TWI642162B TW104142826A TW104142826A TWI642162B TW I642162 B TWI642162 B TW I642162B TW 104142826 A TW104142826 A TW 104142826A TW 104142826 A TW104142826 A TW 104142826A TW I642162 B TWI642162 B TW I642162B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor
- wafer
- interval
- semiconductor wafer
- semiconductor device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 146
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 9
- 235000012431 wafers Nutrition 0.000 claims abstract description 148
- 125000006850 spacer group Chemical group 0.000 claims abstract description 36
- 239000011347 resin Substances 0.000 claims abstract description 25
- 229920005989 resin Polymers 0.000 claims abstract description 25
- 238000007789 sealing Methods 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims description 18
- 238000003475 lamination Methods 0.000 claims description 2
- 230000000149 penetrating effect Effects 0.000 claims 1
- 239000000463 material Substances 0.000 description 13
- 239000010410 layer Substances 0.000 description 10
- 229910052759 nickel Inorganic materials 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 8
- 229910045601 alloy Inorganic materials 0.000 description 6
- 239000000956 alloy Substances 0.000 description 6
- 238000000465 moulding Methods 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000000945 filler Substances 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- 229910020836 Sn-Ag Inorganic materials 0.000 description 2
- 229910020888 Sn-Cu Inorganic materials 0.000 description 2
- 229910020988 Sn—Ag Inorganic materials 0.000 description 2
- 229910019204 Sn—Cu Inorganic materials 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 1
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 1
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 1
- 229910000420 cerium oxide Inorganic materials 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920003192 poly(bis maleimide) Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015-111082 | 2015-06-01 | ||
JP2015111082A JP2016225484A (ja) | 2015-06-01 | 2015-06-01 | 半導体装置および半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201644033A TW201644033A (zh) | 2016-12-16 |
TWI642162B true TWI642162B (zh) | 2018-11-21 |
Family
ID=57453132
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW104142826A TWI642162B (zh) | 2015-06-01 | 2015-12-18 | Semiconductor device and method of manufacturing the same |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2016225484A (ja) |
CN (1) | CN106206517B (ja) |
TW (1) | TWI642162B (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6721696B2 (ja) | 2016-09-23 | 2020-07-15 | キオクシア株式会社 | メモリデバイス |
JP2021044362A (ja) * | 2019-09-10 | 2021-03-18 | キオクシア株式会社 | 半導体装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201316486A (zh) * | 2011-09-22 | 2013-04-16 | Toshiba Kk | 半導體裝置及其製造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090014856A1 (en) * | 2007-07-10 | 2009-01-15 | International Business Machine Corporation | Microbump seal |
JP2010161102A (ja) * | 2009-01-06 | 2010-07-22 | Elpida Memory Inc | 半導体装置 |
JP5570799B2 (ja) * | 2009-12-17 | 2014-08-13 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置及びその製造方法 |
US8710654B2 (en) * | 2011-05-26 | 2014-04-29 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method thereof |
JP2014192171A (ja) * | 2013-03-26 | 2014-10-06 | Ps4 Luxco S A R L | 半導体装置及びその製造方法 |
KR102065648B1 (ko) * | 2013-08-14 | 2020-01-13 | 삼성전자주식회사 | 반도체 패키지 |
JP2015056563A (ja) * | 2013-09-12 | 2015-03-23 | 株式会社東芝 | 半導体装置およびその製造方法 |
US9570421B2 (en) * | 2013-11-14 | 2017-02-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Stacking of multiple dies for forming three dimensional integrated circuit (3DIC) structure |
-
2015
- 2015-06-01 JP JP2015111082A patent/JP2016225484A/ja active Pending
- 2015-12-18 TW TW104142826A patent/TWI642162B/zh not_active IP Right Cessation
- 2015-12-23 CN CN201510977812.6A patent/CN106206517B/zh active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201316486A (zh) * | 2011-09-22 | 2013-04-16 | Toshiba Kk | 半導體裝置及其製造方法 |
Also Published As
Publication number | Publication date |
---|---|
TW201644033A (zh) | 2016-12-16 |
JP2016225484A (ja) | 2016-12-28 |
CN106206517B (zh) | 2019-11-08 |
CN106206517A (zh) | 2016-12-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9847319B2 (en) | Solid state drive package and data storage system including the same | |
TWI574355B (zh) | 半導體封裝件及其製法 | |
US10978409B2 (en) | Semiconductor package | |
TWI724744B (zh) | 半導體裝置及半導體裝置之製造方法 | |
TWI620291B (zh) | Semiconductor device | |
US20150228591A1 (en) | Semiconductor package and method of manufacturing the same | |
JP5912616B2 (ja) | 半導体装置及びその製造方法 | |
JP6189181B2 (ja) | 半導体装置の製造方法 | |
TWI660476B (zh) | 封裝結構及其製法 | |
KR20150085384A (ko) | 반도체 패키지 및 그 제조방법 | |
TW201517240A (zh) | 封裝結構及其製法 | |
JP2019057528A (ja) | 半導体装置 | |
TWI627689B (zh) | 半導體裝置 | |
TWI556402B (zh) | 封裝堆疊結構及其製法 | |
TWI642162B (zh) | Semiconductor device and method of manufacturing the same | |
JP2019117847A (ja) | 半導体装置 | |
JP2016004860A (ja) | 半導体装置 | |
TWI529876B (zh) | 封裝堆疊結構及其製法 | |
JP6689420B2 (ja) | 半導体装置および半導体装置の製造方法 | |
TW201737415A (zh) | 封裝基板的製作方法 | |
KR101083663B1 (ko) | 오버행 다이 스택 구조를 이용한 반도체 패키지 | |
JP2008187076A (ja) | 回路装置およびその製造方法 | |
KR20210079005A (ko) | 반도체 패키지 및 그 제조방법 | |
TWI720728B (zh) | 薄膜覆晶封裝結構和其製作方法 | |
JP4652428B2 (ja) | 半導体装置およびその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |