TWI514487B - 半導體晶片的熱壓縮鍵合 - Google Patents

半導體晶片的熱壓縮鍵合 Download PDF

Info

Publication number
TWI514487B
TWI514487B TW102111025A TW102111025A TWI514487B TW I514487 B TWI514487 B TW I514487B TW 102111025 A TW102111025 A TW 102111025A TW 102111025 A TW102111025 A TW 102111025A TW I514487 B TWI514487 B TW I514487B
Authority
TW
Taiwan
Prior art keywords
die
solder
thermal compression
bonding
platform
Prior art date
Application number
TW102111025A
Other languages
English (en)
Other versions
TW201344819A (zh
Inventor
Yiu Ming Cheung
Tsan Yin Lo
Ming Li
Yick Hong Mak
Ka San Lam
Original Assignee
Asm Tech Singapore Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asm Tech Singapore Pte Ltd filed Critical Asm Tech Singapore Pte Ltd
Publication of TW201344819A publication Critical patent/TW201344819A/zh
Application granted granted Critical
Publication of TWI514487B publication Critical patent/TWI514487B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/1308—Plural core members being stacked
    • H01L2224/13082—Two-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75261—Laser
    • H01L2224/75263—Laser in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75744—Suction holding means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75753—Means for optical alignment, e.g. sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/78252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the capillary or wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/78253—Means for applying energy, e.g. heating means adapted for localised heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009—Pre-treatment of the bump connector or the bonding area
    • H01L2224/81048—Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/8122—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/81224—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81905—Combinations of bonding methods provided for in at least two different groups from H01L2224/818 - H01L2224/81904
    • H01L2224/81907—Intermediate bonding, i.e. intermediate bonding step for temporarily bonding the semiconductor or solid-state body, followed by at least a further bonding step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/9205—Intermediate bonding steps, i.e. partial connection of the semiconductor or solid-state body during the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15192—Resurf arrangement of the internal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

半導體晶片的熱壓縮鍵合
本發明涉及將半導體晶片安裝於襯底上，更具體地是通過焊料互聯的方式。
在倒裝晶片(flip-chip)封裝件的裝配過程中的焊料回流(solder reflow)被廣泛地採用在電子封裝工業中。倒裝晶片的矽晶粒互連通常是由面陣(area-array)佈置形式的焊球(solder balls)或凸點(bumps)製作而成。晶粒被對齊定位和精確地放置在襯底如印刷線路板(“PWB”：printed wiring board)上，以便於焊球降落於襯底的焊盤(solder pads)上，從此處晶粒互連被連接於襯底的電氣回路。該焊盤包括銅引線(copper trace)電路(厚度大約為18微米)，其鍍覆有鎳(厚度大約為6微米)和金(厚度小於0.1微米)。在晶粒放置處理以前，合適數量的助焊劑(solder flux)將會施加在焊接表面。助焊劑的應用能夠促進回流處理過程中焊球和襯底的焊盤之間的潤濕(wetting)。回流爐(reflow oven)提供了良好可控的加熱和冷卻曲線，以便於確保在回流和焊點(solder joint)的固化過程中焊點可靠地形成。焊料回流的自我定位特性使得更少精確的和更快速的拾取和放置機器能夠被使用於裝配處理中。
以上批量的裝配處理被證明是富有成效的，並被廣泛地採用於各種倒裝晶片封裝件的製造中。如果焊球的間距足夠大，如超過150-200微米，那麼焊料回流工序是可應用的。在這樣的焊球間距的情形下，由於焊料回流的自我定位特性能夠有助於修正任何的晶粒放置錯誤，所以相當精確但高產能的倒裝晶片鍵合機能夠被使用來實現拾取和放置處理。但是，當互連的間距被進一步減少到小於150微米時，回流處理過程中焊點的橋接故障(bridging failure)可能發生。
圖1所示為具有鍵合在襯底14上的頭部帶焊料的銅柱12(solder-capped copper pillar)互連的倒裝晶粒10的側視示意圖。倒裝晶粒10的電氣互連通過其重布層(redistribution layer)再次分佈。該互連被再次分 佈至具有間距P1的銅柱12的面陣(area array)，其和位於高密度互連襯底14的焊盤16的盤間距的相匹配。倒裝晶粒10的互連包括銅柱12，在其端部具有焊帽(solder cap)18。在焊接過程中，焊帽18的基於錫的焊料(錫Sn，錫金SnAg，錫金銅SnAgCu)熔融並潤濕襯底14的焊盤16至焊點(solder joints)。用於時興的微細間距的倒裝晶片在襯底(其可能從BT樹脂或其他疊層材料中製造)上的鍵合的凸點間距P1大約為120-150微米。
如果微細間距的倒裝晶粒10被鍵合在重布的仲介層(interposers)20(其可能從矽、玻璃或陶瓷中製造)，那麼焊盤間距P2可以降低至40-60微米，如圖2所示，其是當頭部帶焊料的銅柱12互連被鍵合至具有的重布的仲介層20的襯底14A時微細間距的倒裝晶粒10的側視示意圖。包含有電氣線路和通孔(electrical routings and through-vias)28的重布的仲介層20將焊帽18的微細間距P2互連重新分佈至襯底14A上焊球26的面陣的更大得多的間距P3(超過200微米)。所以，朝向微細間距的倒裝晶粒10的、重布的仲介層20的焊盤22的焊盤間距P2能夠小至40-60微米，但是位於重布的仲介層20的底面上的焊盤24的焊盤間距P3大於200微米，這匹配於襯底14A上的焊盤16A的焊盤間距。
減少焊球26橋接概率的一種方法是通過使用頭部帶焊料的銅柱12來取代焊球26作為互連的方式減小焊料的體積，如圖1和圖2所示。銅柱12的尺寸(高度和寬度)以及焊帽18的厚度在可靠節點的設計中扮演了重要的角色。即使這種設計對於微細間距的倒裝晶片封裝件而言減少了焊料橋接的故障，但是它對於製造工藝而言引入了新的難題。首先，由於焊料體積大為減少，所以在回流處理過程中焊點的自我定位處理可能不會發生。從而，更為精確的倒裝晶片拾取和放置機器被需要用為該裝配處理。第二，這些頭部帶的焊料的體積控制將會非常重要。為了保證當焊點形成之時所有的焊帽18和襯底14上的焊盤16完全接觸，在鍵合週期的初始階段，足夠大的壓力應該被施加於倒裝晶粒10上。在頭部帶焊料的銅柱12互連在具有細微間距的焊盤16的襯底14的情形下，熱壓縮(TC：Thermal Compression)鍵合工序取代焊料回流工序必須被使用來鍵合微細間距的倒裝晶粒10。
用於具有頭部帶焊料的銅柱12互連的微細間距的倒裝晶粒10的傳統的熱壓縮(TC)工序的處理流程包括兩個主要裝配流程，即：精度定位流程(precise alignment process)，接著熱壓縮鍵合。在傳統的配置中， 由於任意的干擾可能將倒裝晶粒10自同襯底14上的微細間距的焊盤16或重布的仲介層20上的焊盤22精確定位中移動，所以這兩個流程必須一個接著另一個連續地執行。該流程隨著將襯底14傳送在鍵合平臺的輸入位置處開始，該鍵合平臺被維持在低於焊料的熔融溫度Tm以下的預熱溫度T1。鍵合工具從晶圓平臺處拾取微細間距的倒裝晶粒10。微細間距的倒裝晶粒10的精確定位在仰視和俯視視角定位系統的說明下得以完成。微細間距的倒裝晶粒10將會以如此方式被定位，以致於其焊帽18將會隨同襯底14上的焊盤16或重布的仲介層20上的焊盤22的位置和方位被對齊定位。在定位流程的末期，倒裝晶粒10由鍵合工具所固定以保持其定位位置，然後通過應用合適的壓力F1被放置在襯底14(或重布的仲介層20)上，這樣確保了焊帽18和焊盤16、22的良好接觸。
對於高達+/-1微米的定位精度而言，用於精度定位流程的處理時間t1大約為幾秒鐘(2-3秒)。在熱壓縮鍵合流程開始時，由鍵合工具所固定的倒裝晶粒10被提升至溫度T2，其超過了銅柱12上焊料的熔融溫度Tm。這能夠通過安裝在鍵合工具上的脈衝加熱器(pulsed heater)得以實現。當銅柱12上的焊料達到其熔融溫度Tm時，作用在倒裝晶粒10上的壓力將會減小至力F2，以防止回流過程中焊點的塌陷(collapsing)。其後，位於銅柱12的頂部的焊料潤濕襯底14的焊盤16(或者重布的仲介層20的焊盤22)。鍵合工具開始冷卻，並且其溫度下落至焊料將會固化的溫度Ts以下。焊點將會形成在倒裝晶粒10的銅柱12和襯底14的焊盤16(或者重布的仲介層20的焊盤22)之間。在這個熱壓縮鍵合週期的末期，位於襯底14上(或者重布的仲介層20上)的鍵合後的倒裝晶粒10將會被傳送至鍵合機的輸出平臺上。用於這個熱壓縮鍵合週期的處理時間t2大約為3-8秒鐘，其實際上依賴於鍵合工具如何能夠被快速地加熱和冷卻。
傳統的熱壓縮鍵合流程的一個主要不足是其低的整體產能。該拾取和放置機器應該能夠根據襯底14上焊點的焊盤開口的位置準確地定位倒裝晶粒10。這個流程的定位精度要求在6西格瑪(6-sigma)下必須好於+/-2微米。最高級的熱壓縮鍵合機能夠在幾秒鐘(2-3秒鐘)以內實現+/-1微米的定位精度。在這個精確定位之後，固定有倒裝晶粒10的鍵合工具然後根據預定的溫度曲線被脈衝加熱器加熱和冷卻，在此過程中銅柱12端部處的焊料熔融然後固化以在襯底的焊盤上形成焊點。作用在倒裝晶粒10上的壓力必須被如此控制以便於焊點的期望互連高度(stand-off height)能夠 得以保持。由於鍵合工具的加熱和冷卻花費時間，所以這個熱壓縮鍵合週期花費至少3-8秒鐘。從而，用於整個定位和鍵合流程的週期時間大約為5-10秒鐘，該流程的產能大約為每個小時500個單位。這個流程的產能必須提高，以為它獲得通用便於量產。
所以，本發明的目的在於尋求提供一種鍵合裝置，和現有技術中使用的鍵合裝置相比，其提高了用於半導體器件的熱壓縮鍵合流程的產能。
於是，本發明一方面提供一種熱壓縮鍵合方法，該方法包含有以下步驟：將晶粒上的電氣觸點和襯底上的鍵合盤對齊定位，該晶粒將被安裝至該襯底上；在對齊定位晶粒之後，使用鍵合工具將晶粒上的電氣觸點抵靠於襯底上的鍵合盤固定；通過提供熱量至晶粒的局部以將晶粒的局部處的溫度提升至電氣觸點所包含的焊料的熔點之上以致於熔融設置在晶粒所述局部的電氣觸點的至少部分焊料的方式，將晶粒部分鍵合至襯底上；其後將整個晶粒加熱至電氣觸點的焊料的熔點之上，以便於位於晶粒所述局部之外的電氣觸點的焊料也被熔融而將晶粒鍵合至襯底上。
本發明另一方面提供一種熱壓縮裝置，該裝置包含有：精度定位平臺，其用於將包含有電氣觸點的晶粒和襯底上的鍵合盤對齊定位，該晶粒將被安裝至該襯底上；鍵合工具，其用於將晶粒上的電氣觸點抵靠於襯底上的鍵合盤固定；加熱設備，其被操作來通過提供熱量至晶粒的局部以將晶粒的局部處的溫度提升至電氣觸點所包含的焊料的熔點之上以致於熔融設置在晶粒所述局部的電氣觸點的至少部分焊料的方式，將晶粒部分鍵合至襯底上；以及熱壓縮平臺，其用於將整個晶粒加熱至電氣觸點的焊料的熔點之上，以便於位於晶粒所述局部之外的電氣觸點的焊料也被熔融而將晶粒鍵合至襯底上。
參閱後附的描述本發明實施例的附圖，隨後來詳細描述本發明是很方便的。附圖和相關的描述不能理解成是對本發明的限制，本發明的特點限定在申請專利範圍中。
10‧‧‧倒裝晶粒
12‧‧‧銅柱
14‧‧‧襯底
14A‧‧‧襯底
16‧‧‧鍵合盤
16A‧‧‧焊盤
18‧‧‧焊帽
20‧‧‧仲介層
22‧‧‧焊盤
24‧‧‧焊盤
26‧‧‧焊球
28‧‧‧電氣線路和通孔
30‧‧‧輸入口
32‧‧‧定位平臺
34‧‧‧鐳射焊接
36‧‧‧緩衝平臺
38‧‧‧鍵合平臺
40‧‧‧輸出口
42‧‧‧平臺
44‧‧‧鍵合工具
45、47‧‧‧鐳射點
46、48‧‧‧鐳射頭
50‧‧‧溫度
52‧‧‧機構實施
54‧‧‧放置倒裝晶粒
56‧‧‧鐳射鍵合流程
58‧‧‧緩衝預熱流程
60‧‧‧焊點
62‧‧‧預熱流程
64‧‧‧壓力應用處理
66‧‧‧熱壓縮加熱處理
68‧‧‧熱壓縮潤濕處理
70‧‧‧熱壓縮冷卻處理
72‧‧‧傳送處理
通過參考根據本發明較佳實施例具體實施方式的詳細介紹，並參考附圖很容易理解本發明，其中：圖1所示為具有鍵合在襯底上的頭部帶焊料的銅柱互連的倒裝晶粒的側視示意圖；圖2所示為具有鍵合在帶有重布仲介層的襯底上的頭部帶焊料的銅柱互連的倒裝晶粒的側視示意圖；圖3是根據本發明較佳實施例所述的鍵合流程的整體示意圖；圖4是根據本發明較佳實施例所述的、用於鍵合半導體晶片的鍵合裝置的立體示意圖；圖5表明了根據本發明較佳實施例所述的精度定位處理流程；圖6是已經部分鍵合在襯底上的倒裝晶片的立體示意圖；以及圖7是根據圖5所述精度定位處理之後所完成的熱壓縮處理流程。
圖3是根據本發明較佳實施例所述的鍵合工序的整體示意圖。該工序使得兩個主要的裝配流程，即精度定位流程和熱壓縮流程的並行處理成為可能。熱壓縮鍵合機包含有精度定位平臺32、熱壓縮鍵合平臺38和緩衝平臺36。緩衝平臺36被用作為緩衝，以便於均衡處理流程和預熱部分鍵合的單元。
在精度定位平臺32處，精度定位處理和鐳射焊接處理34二者均被完成。所有這些處理平臺可以駐留在熱壓縮鍵合機的不同部件中，機器臂(robotic arm)可以被使用來從一個處理平臺傳送處理中的倒裝晶片到另一個處理平臺。該系統的物質流向描述如下：襯底14由輸入裝載器從輸入口30被裝載，而倒裝晶粒10從晶圓平臺處被拾取。它們被放置在精度定位平臺32處以便於靈活定位和鐳射焊接34。定位後的倒裝晶粒10通過鐳射焊接34被部分地鍵合在襯底14上，其後被傳送到緩衝平臺36處進行預熱。在部分鍵合後的倒裝晶粒10被傳送至緩衝平臺36之後，精度定位平臺32立即在下一個單元上工作。一旦位於緩衝平臺36中的鍵合後的倒裝晶粒10達到期望的預熱溫度並且熱壓縮鍵合平臺38是可用的，那麼鍵合後的倒裝晶粒10被傳送到熱壓縮鍵合平臺38以執行熱壓縮鍵合。在熱壓縮鍵合處理的末期，完全鍵合後的倒裝晶粒10被傳 送到熱壓縮鍵合機的輸出口40。
所以，鐳射焊接34形成了部分的鍵合，以將定位後的倒裝晶粒10固定定位在襯底14上，同時允許精度定位和熱壓縮鍵合處理能夠於各自的處理平臺處在不同單元上並行地完成，而不是於同一個平臺處在同一個單元上順序地完成。
圖4是根據本發明較佳實施例所述的、用於鍵合倒裝晶粒10的鍵合裝置的立體示意圖。鍵合工具44被操作來固定倒裝晶粒10和抵靠襯底14的焊盤16壓緊銅柱12和焊帽18。鍵合期間襯底14由平臺42所支撐和鎖固至平臺42。一對鐳射頭46、48設置在倒裝晶粒10的相對的斜對角處。鐳射頭46、48連接至光纖線纜、光纖准直器和聚焦光學器件上。來自光纖線纜的雷射光束被校準，然後較佳地在倒裝晶粒10背面的兩個相對的斜對角處聚焦為直徑大約為1mm的鐳射點45、47上。
鐳射頭46、48被操作來投射雷射光束於倒裝晶粒10的角落處，以加熱倒裝晶粒10，並促進倒裝晶粒10部分鍵合至襯底14上，這將會進一步詳細描述如下。
現在描述在不同處理平臺處的詳細操作。圖5表明了根據本發明較佳實施例所述的精度定位處理流程。襯底14從輸入口30被裝載至精度定位平臺32，並放置在位於精度定位平臺32的真空台頂部的定位預熱平臺42上。倒裝晶粒10由鍵合工具44固定，並從鍵合機的晶圓平臺處被拾取。使用預熱處理，精度定位平臺的定位預熱平臺42保持在溫度T1'，其預熱襯底14至高於室溫的溫度50。為了保證視覺定位系統的良好圖像品質和定位機構的最小化的熱機械形變，精度定位平臺的預熱溫度T1'被設定在低於100℃的溫度。在這個溫度下，熱氣流對視覺定位系統的成像光學器件的衝擊得以最小化。後續的鐳射焊接處理所需的額外溫度同樣也能夠得以減小。
倒裝晶粒10由鍵合工具44固定，以便於以銅柱12和焊帽18形式存在的其電氣觸點在精度定位平臺32處和襯底14上的焊料鍵合盤16準確地對齊定位，其在精度定位流程中由自動視覺定位機構實施52。倒裝晶粒10與頭部帶焊料的銅柱12精確定位的定位精度大約為+/-1微米。在固定有倒裝晶粒10的被精確控制的鍵合工具44和校準視覺定位光學器件以及攝像機的說明下，花費定位時間t1'來實現這個定位精度。其後，在放置流程中，通 過應用合適的壓力F1，在將頭部帶焊料的銅柱12與鍵合盤16對齊定位的情形下，鍵合工具44抵靠襯底14放置倒裝晶粒10(54)。然後，鍵合工具44固定定位倒裝晶粒10。
在臨時的鐳射鍵合流程56中，一旦完成精度定位，由鍵合工具44固定的倒裝晶粒10然後被來自鐳射頭46、48的兩個雷射光束臨時地在襯底14上進行鐳射焊接持續一段處理時間t2'，每個雷射光束具有能量P1。雷射光束在倒裝晶粒10的局部完成鐳射焊接，以在襯底14上為倒裝晶粒10形成臨時性的鍵合，其中，一個雷射光束指向倒裝晶粒10的一個角落而另一個雷射光束指向倒裝晶粒10斜對面的另一個角落。當雷射光束正被發射之時，一個合適的壓力通過鍵合工具44被施加在倒裝晶粒10上。
大多數半導體倒裝晶片10是由矽製成。從而，雷射光束的波長被選定在700-980nm的範圍以內，在該範圍內雷射光束被矽的吸收很高。倒裝矽晶粒10幾乎能吸收所有的鐳射能量。然後，在倒裝晶粒10被雷射光束對準的角落處圍繞鐳射點45、47產生了發熱區域。熱量通過倒裝晶粒10的主體被傳導至銅柱12和焊帽18上。作用在倒裝晶粒10上的壓力保證焊帽18和襯底14的焊盤16具有良好的接觸。當襯底14位於預熱平臺42的同時，襯底14被預熱至溫度T1'。雷射光束的能量P1被優化來加熱倒裝晶粒10的角落處的熱作用區域至一個高於焊料熔融溫度Tm的溫度持續一段處理時間t2'以內，t2'小於1秒。在位於鐳射點45、47處的倒裝晶粒10的加熱局部的頭部帶焊料的銅柱12的至少一部分被熔融在鍵合盤16上。然後，在緩衝預熱流程58中，部分鍵合的倒裝晶粒10和襯底14被傳送至預熱緩衝平臺36處，預熱緩衝平臺36被保持在預熱溫度T2'。
圖6是已經部分地鍵合在襯底14上的倒裝晶粒10的立體示意圖。在鐳射加熱區域下方，當位於鐳射加熱區域之內的銅柱12的焊帽18熔融並潤濕襯底14的相應的焊盤16的時候，焊點60得以形成。圍繞在焊盤16的阻焊層(solder mask)防止焊盤16上熔融的焊料橋接。當雷射脈衝被關閉時，由鐳射光源所產生的熱量被迅速地引導離開鐳射加熱區域。這些區域處的溫度迅速地降落至焊料固化溫度Ts以下，從而鍵合後的焊點60得以形成。對於位於鐳射加熱區域以外的那些焊帽18，焊帽18依然沒有鍵合到焊盤16上。如圖6所示，基於焊帽18熔融所形成的焊點60僅僅在倒裝晶粒10的 兩個角落處被發現。
在預熱緩衝平臺36處，部分鍵合的倒裝晶粒10被加熱至預熱溫度T2'持續一段停留時間(dwell time)t3'。緩衝平臺36處的預熱溫度T2'高於精度定位平臺32處的預熱溫度T1'，但是低於焊料的熔融溫度Tm。當熱壓縮鍵合平臺38可用的時候，溫度T2'下的部分鍵合的倒裝晶粒10被傳送至熱壓縮鍵合平臺38進行最後的鍵合。
圖7是根據圖5所述精度定位處理之後所完成的熱壓縮處理流程。部分鍵合的倒裝晶粒10從預熱緩衝平臺36處被傳送至熱壓縮鍵合平臺38。在這個階段，熱壓縮鍵合平臺中的鍵合平臺溫度處於待命溫度T3'下，在熱壓縮預熱流程62中待命溫度T3'低於焊料的熔融溫度Tm。在壓力應用處理64中，在不需要對部分鍵合的倒裝晶粒10進行任何進一步的校正定位的情形下，熱壓縮鍵合平臺38處的鍵合工具被降低，並使用壓力F1壓靠在倒裝晶粒10上。部分鍵合的倒裝晶粒10被這個熱壓縮鍵合工具緊緊地固定。然後，在熱壓縮加熱處理66中，熱壓縮鍵合工具的溫度被提升至溫度T4',溫度T4'高於銅柱12上焊料的熔融溫度Tm。
當由鍵合工具固定的部分鍵合的倒裝晶粒10被加熱並達到焊料的熔融溫度Tm時，位於已經熔融過的鐳射點45、47之外的銅柱12的焊帽18將會熔融，並潤濕襯底14的焊盤16。而且，位於倒裝晶粒10的角落處的焊點將會再次熔融，並潤濕相應的焊盤16。在熱壓縮潤濕處理68中，鍵合工具的壓力從力F1降低至力F2，以防止熔融的焊帽塌陷。一旦銅柱12上的所有焊帽18熔融且潤濕了焊盤16，那麼然後熱壓縮鍵合工具的溫度被降低至焊料的固化溫度Ts以下。當在熱壓縮冷卻處理70中倒裝晶粒10的溫度降落至焊料的固化溫度Ts以下時，在倒裝晶粒10的銅柱12和襯底14的鍵合盤16之間形成有焊點。現在，熱壓縮鍵合工序得以完成。然後，在輸出傳送處理72中，完全鍵合後的倒裝晶粒10被鍵合工具從鍵合平臺處提升，並傳送至熱壓縮鍵合機的輸出口40。整個熱壓縮鍵合週期花費時間t4'完成。
為了優化整個處理時間，均衡各個處理平臺即精度定位平臺32、預熱緩衝平臺36和熱壓縮鍵合平臺38的產能，用於精度定位流程的處理時間t1'和用於鐳射焊接34的處理時間t2'的和應該大約等於t4'。在預熱緩衝平臺36中用於預熱的停留時間t3'應該小於處理時間t1'與t2'的和。所以，為了 產能均衡，處理時間應該滿足：t3'<(t1'+t2')和t1'+t2't4'。
熱壓縮鍵合機的產能(術語為單位每小時，或UPH)能夠從(1/t4')x 3600得以計算出，並基本上由熱壓縮鍵合處理時間t4'所決定。和帶有順序完成的精度定位和熱壓縮的、具有的整體處理時間等於t1+t2的傳統熱壓縮鍵合處理相比，這個熱壓縮鍵合處理時間t4'仍然短暫得多。
在本發明的另一個實施例中，可能存在多個熱壓縮鍵合平臺38用於鍵合多個晶粒，和/或熱壓縮鍵合可能通過使用一套鍵合工具(a gang bonding tool)完成以在同一個熱壓縮鍵合平臺38處同時固定多個單元進行加熱。如果n為熱壓縮鍵合平臺38上的位置數和為由該套鍵合工具處理的單元數，那麼用於均衡的處理平臺的處理時間應被視作為：(n-1)x(t1'+t2')+t3'<nx(t1'+t2')，以及nx(t1'+t2')t4'
帶有一套鍵合工具處理n個單元的熱壓縮鍵合機的產能(UPH)被減少到(n/t4')x 3600。
在本發明的其他實施例中，用於倒裝晶粒10的銅柱12的焊料層和襯底14的焊盤16的構造可包括：(i)僅僅位於銅柱12上的焊帽，(ii)僅僅位於焊盤16上的焊料，或者(iii)位於銅柱12和焊盤16二者上的焊料。
而且，對於某些倒裝晶片封裝件結構，在放置和鍵合倒裝晶粒10以前，非流動性底部填充膠(No-Flow Underfill)或者非導電性黏著劑(Non-Conductive Paste：NCP)被滴注在襯底14上以覆蓋焊盤16。甚至出現了這些熱固化物質(thermal cure materials)的情形下，鐳射焊接流程34能夠得以完成。可是，需要合適的壓力來從鍵合介面的接觸中擠出這些物質。
值得欣賞的是，根據本發明較佳實施例所述的鍵合裝置能夠提高用於倒裝晶片鍵合流程的熱壓縮鍵合機的整體產能。由於精度定位處理和熱壓縮處理能夠並行地完成，所以產能能夠通過至少兩個理由而得以提高。
精度定位平臺32保留在相對低和不變的、小於100℃的預熱溫度下，而在這個平臺上精度定位處理能夠在較少受由現有技術所遭遇的、鍵合平臺的加熱和冷卻所引入的熱膨脹和形變的影響的情形下而得以完成。
正好在精度定位平臺32上進行定位處理之後，用於部分鍵合的鐳射焊接處理34通過在倒裝晶粒10的兩個角落處發射兩個雷射光束而得以完成。用於這個鐳射焊接處理的處理時間大約為500-800ms(其小於1秒)。由於在晶粒10的角落處附近僅僅形成有臨時的焊點，所以不需要考慮倒裝晶粒10的大小，只需要相對較小功率的鐳射光源。
而且，由於僅僅只有倒裝晶粒10的兩個成斜對角的角落被鐳射焊接，所以只有兩個相對低成本的鐳射光源被用於鐳射焊接處理，不需要在配置中使用昂貴的高功率雷射器和雷射光束均勻化器(laser beam homogenizer optics)。在使用鐳射焊接34完成部分鍵合之後，倒裝晶粒10被粘著於襯底14上。倒裝晶粒10固定在襯底14上，並能夠在不引入任何的移動或錯位的情形下被傳送至其他的處理平臺。
預熱緩衝平臺36被引入在精度定位平臺32和熱壓縮鍵合平臺38之間。這個預熱緩衝平臺36從它們在先60-80℃的預熱溫度加熱襯底上的倒裝晶粒10至130-180℃。在這個預熱溫度(130-180℃)下，熱壓縮鍵合平臺38僅僅需要提升另一個大約100℃以達到的焊接溫度而便於焊接處理發生。這樣能夠有助於減少熱壓縮處理的加熱時間。
由於倒裝晶粒10已經固定在襯底14上，所以在同一個熱壓縮鍵合平臺38處，熱壓縮鍵合能夠在一套壓具(a gang press)的說明下針對單個單元或多個單元得以完成。如果該套壓具被用作為多個單元的熱壓縮鍵合，那麼產能能夠得到進一步的改善。
用於熱壓縮鍵合頭的冷卻需要要求得更少，因為它僅僅必須從大約240-260℃的焊接溫度冷卻至200℃(熱壓縮鍵合平臺38的待命溫度)，以在熱壓縮鍵合週期的末期進行焊點的固化。當單元被冷卻至200℃以下時，它能被傳送至鍵合機的輸出口。用於這個熱壓縮平臺的溫度操作範圍是從200℃至260℃。這個溫度操作範圍與傳統配置中從150℃以下和高達260℃操作相比小得多。所以，用於加熱和冷卻的週期時間能夠得以縮短。
此處描述的本發明在所具體描述的內容基礎上很容易產生變化、修正和/或補充，可以理解的是所有這些變化、修正和/或補充都包括在本發明的上述描述的精神和範圍內。
10‧‧‧倒裝晶粒
12‧‧‧銅柱
14‧‧‧襯底
16‧‧‧焊盤
18‧‧‧焊帽
42‧‧‧平臺
44‧‧‧鍵合工具
45、47‧‧‧鐳射點
46、48‧‧‧鐳射頭

Claims (20)

  1. 一種熱壓縮鍵合方法，該方法包含有以下步驟：將晶粒上的電氣觸點和襯底上的鍵合盤對齊定位，該晶粒將被安裝至該襯底上；在對齊定位晶粒之後，使用鍵合工具將晶粒上的電氣觸點抵靠於襯底上的鍵合盤固定；通過提供熱量至晶粒的局部以將晶粒的局部處的溫度提升至電氣觸點所包含的焊料的熔點之上以致於熔融設置在晶粒所述局部的電氣觸點的至少部分焊料的方式，將晶粒部分鍵合至襯底上；將整個晶粒加熱至電氣觸點的焊料的熔點之上，以便於位於晶粒所述局部之外的電氣觸點的焊料也被熔融而將晶粒鍵合至襯底上。
  2. 如申請專利範圍第1項所述的熱壓縮鍵合方法，其中提供熱量至晶粒的所述局部的步驟包括下面的步驟：將雷射光束射在晶粒的所述局部上。
  3. 如申請專利範圍第2項所述的熱壓縮鍵合方法，其中晶粒的所述局部包括兩個單獨的局部化的加熱區域，其設置在晶粒的斜對角的角落處。
  4. 如申請專利範圍第2項所述的熱壓縮鍵合方法，其中雷射光束產生直徑大約為1毫米的鐳射點。
  5. 如申請專利範圍第2項所述的熱壓縮鍵合方法，其中雷射光束的波長在700-980納米的範圍以內。
  6. 如申請專利範圍第1項所述的熱壓縮鍵合方法，其中，在將晶粒上的電氣觸點對齊定位的過程中，晶粒被加熱至大體高於室溫但小於100℃的溫度。
  7. 如申請專利範圍第1項所述的熱壓縮鍵合方法，該方法還包含有以下的步驟：在接著於熱壓縮鍵合平臺處將整個晶粒加熱至焊料的熔點以上之前，將部分鍵合的晶粒和襯底傳送至加熱至預熱溫度的緩衝平臺，該預熱溫度高於晶粒被對齊定位時晶粒的溫度但小於焊料的熔點。
  8. 如申請專利範圍第1項所述的熱壓縮鍵合方法，其中，將整個晶粒加熱至焊料的熔點之上的過程中，固定有晶粒的鍵合工具的溫度被提升至 高於焊料的熔點之上的溫度，然後將鍵合工具的溫度降低至焊料的固化溫度以下，以便於在晶粒和襯底之間形成有導電的節點。
  9. 如申請專利範圍第1項所述的熱壓縮鍵合方法，其中，當一個晶粒在第二平臺處被並行地加熱至焊料的熔點之上以熔融晶粒的所述局部之外的焊料的同時，另一個晶粒在第一平臺處被對齊定位，第一平臺與第二平臺相互分開。
  10. 如申請專利範圍第1項所述的熱壓縮鍵合方法，其中每個電氣觸點包含有銅柱，該銅柱頂部具有焊帽。
  11. 如申請專利範圍第1項所述的熱壓縮鍵合方法，其中，在多個熱壓縮平臺處同時將多個晶粒加熱至焊料的熔點之上。
  12. 如申請專利範圍第1項所述的熱壓縮鍵合方法，其中在同一個熱壓縮平臺處，多個晶粒被鍵合工具固定，該多個晶粒被同時加熱至焊料的熔點之上。
  13. 一種熱壓縮裝置，該裝置包含有：精度定位平臺，其用於將包含有電氣觸點的晶粒和襯底上的鍵合盤對齊定位，該晶粒將被安裝至該襯底上；鍵合工具，其用於將晶粒上的電氣觸點抵靠於襯底上的鍵合盤固定；加熱設備，其被操作來通過提供熱量至晶粒的局部以將晶粒的局部處的溫度提升至電氣觸點所包含的焊料的熔點之上以致於熔融設置在晶粒所述局部的電氣觸點的至少部分焊料的方式，將晶粒部分鍵合至襯底上；以及熱壓縮平臺，其用於將整個晶粒加熱至電氣觸點的焊料的熔點之上，以便於位於晶粒所述局部之外的電氣觸點的焊料也被熔融而將晶粒鍵合至襯底上。
  14. 如申請專利範圍第13項所述的熱壓縮裝置，該裝置還包含有：預熱緩衝平臺，其被操作來將部分鍵合的晶粒加熱至預熱溫度，該預熱溫度高於晶粒在精度定位平臺處被加熱到的溫度但小於焊料的熔點。
  15. 如申請專利範圍第13項所述的熱壓縮裝置，其中該加熱設備包括至少一個鐳射設備，該鐳射設備被操作來將雷射光束射以將熱量提供在晶 粒的所述局部上。
  16. 如申請專利範圍第15項所述的熱壓縮裝置，其中，加熱設備包括兩個鐳射設備，該兩個鐳射設備被操作來發射各自的雷射光束至設置於晶粒斜對角的角落處的兩個獨立的局部化的加熱區域。
  17. 如申請專利範圍第15項所述的熱壓縮裝置，其中，雷射光束產生直徑大約為1毫米的鐳射點。
  18. 如申請專利範圍第15項所述的熱壓縮裝置，其中，雷射光束的波長在700-980納米的範圍以內。
  19. 如申請專利範圍第13項所述的熱壓縮裝置，其中，在精度定位平臺處的處理和在熱壓縮平臺處的處理是在不同的晶粒上並行地同步進行的。
  20. 如申請專利範圍第19項所述的熱壓縮裝置，其中，熱壓縮平臺還包括多個單獨的平臺，在這些平臺處同時將多個晶粒加熱至焊料的熔點之上。
TW102111025A 2012-04-17 2013-03-28 半導體晶片的熱壓縮鍵合 TWI514487B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/448,866 US8967452B2 (en) 2012-04-17 2012-04-17 Thermal compression bonding of semiconductor chips

Publications (2)

Publication Number Publication Date
TW201344819A TW201344819A (zh) 2013-11-01
TWI514487B true TWI514487B (zh) 2015-12-21

Family

ID=49324154

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102111025A TWI514487B (zh) 2012-04-17 2013-03-28 半導體晶片的熱壓縮鍵合

Country Status (4)

Country Link
US (1) US8967452B2 (zh)
KR (1) KR101419690B1 (zh)
CN (1) CN103377958B (zh)
TW (1) TWI514487B (zh)

Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11134598B2 (en) * 2009-07-20 2021-09-28 Set North America, Llc 3D packaging with low-force thermocompression bonding of oxidizable materials
JP2013236039A (ja) * 2012-05-11 2013-11-21 Renesas Electronics Corp 半導体装置
US9331032B2 (en) * 2013-03-06 2016-05-03 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid bonding and apparatus for performing the same
US9524958B2 (en) * 2013-06-27 2016-12-20 STATS ChipPAC Pte. Ltd. Semiconductor device and method of individual die bonding followed by simultaneous multiple die thermal compression bonding
US9093549B2 (en) * 2013-07-02 2015-07-28 Kulicke And Soffa Industries, Inc. Bond heads for thermocompression bonders, thermocompression bonders, and methods of operating the same
DE102013114907A1 (de) * 2013-12-27 2015-07-02 Pac Tech-Packaging Technologies Gmbh Verfahren zur Herstellung eines Chipmoduls
WO2015152855A1 (en) * 2014-03-29 2015-10-08 Intel Corporation Integrated circuit chip attachment using local heat source
US9426898B2 (en) * 2014-06-30 2016-08-23 Kulicke And Soffa Industries, Inc. Thermocompression bonders, methods of operating thermocompression bonders, and interconnect methods for fine pitch flip chip assembly
TWI610411B (zh) * 2014-08-14 2018-01-01 艾馬克科技公司 用於半導體晶粒互連的雷射輔助接合
WO2016077645A1 (en) 2014-11-12 2016-05-19 Ontos Equipment Systems Simultaneous hydrophilization of photoresist surface and metal surface preparation: methods, systems, and products
JP6510837B2 (ja) * 2015-03-11 2019-05-08 ファスフォードテクノロジ株式会社 ボンディング装置及びボンディング方法
US9515108B2 (en) 2015-03-11 2016-12-06 Semiconductor Components Industries, Llc Image sensors with contamination barrier structures
US10014272B2 (en) * 2015-05-11 2018-07-03 Asm Technology Singapore Pte Ltd Die bonding with liquid phase solder
CN106206365B (zh) * 2015-05-26 2019-04-30 先进科技新加坡有限公司 具有惰性气体环境的模片键合装置
WO2017039275A1 (ko) 2015-08-31 2017-03-09 한양대학교 산학협력단 반도체 패키지 구조체, 및 그 제조 방법
KR101923659B1 (ko) * 2015-08-31 2019-02-22 삼성전자주식회사 반도체 패키지 구조체, 및 그 제조 방법
CN105772120A (zh) * 2016-03-07 2016-07-20 北京同方生物芯片技术有限公司 一种聚合物生物芯片的批量键合封装方法及定位装置
US9916989B2 (en) * 2016-04-15 2018-03-13 Amkor Technology, Inc. System and method for laser assisted bonding of semiconductor die
EP3276655A1 (en) * 2016-07-26 2018-01-31 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Method and system for bonding a chip to a substrate
US11069606B2 (en) 2016-10-06 2021-07-20 Compass Technology Company Limited Fabrication process and structure of fine pitch traces for a solid state diffusion bond on flip chip interconnect
US10103095B2 (en) 2016-10-06 2018-10-16 Compass Technology Company Limited Fabrication process and structure of fine pitch traces for a solid state diffusion bond on flip chip interconnect
US10923449B2 (en) 2016-10-06 2021-02-16 Compass Technology Company Limited Fabrication process and structure of fine pitch traces for a solid state diffusion bond on flip chip interconnect
WO2018117361A1 (ko) * 2016-12-23 2018-06-28 주식회사 루멘스 마이크로 엘이디 모듈 및 그 제조방법
TWI643305B (zh) * 2017-01-16 2018-12-01 力成科技股份有限公司 封裝結構及其製造方法
JP6366799B1 (ja) * 2017-02-10 2018-08-01 ルーメンス カンパニー リミテッド マイクロｌｅｄモジュール及びその製造方法
US11024595B2 (en) 2017-06-16 2021-06-01 Micron Technology, Inc. Thermocompression bond tips and related apparatus and methods
KR101975103B1 (ko) * 2017-06-20 2019-05-03 주식회사 프로텍 플립칩 레이저 본딩 장치 및 플립칩 레이저 본딩 방법
EP4220694A3 (en) * 2018-01-12 2024-01-17 INTEL Corporation First layer interconnect first on carrier approach for emib patch
US10468342B2 (en) 2018-02-02 2019-11-05 Compass Technology Company, Ltd. Formation of fine pitch traces using ultra-thin PAA modified fully additive process
US10636734B2 (en) 2018-02-02 2020-04-28 Compass Technology Company, Ltd. Formation of fine pitch traces using ultra-thin PAA modified fully additive process
CN108538737B (zh) * 2018-03-22 2019-12-24 江西芯创光电有限公司 载板的压合方法
CN109262376B (zh) * 2018-10-19 2024-02-27 四川联合晶体新材料有限公司 一种用于降低薄板形材料离子束抛光时热应力的装置和方法
US10971471B2 (en) * 2018-12-29 2021-04-06 Micron Technology, Inc. Methods and systems for manufacturing semiconductor devices
JP7287647B2 (ja) * 2019-03-05 2023-06-06 株式会社新川 接合条件評価装置
US10756041B1 (en) 2019-03-14 2020-08-25 International Business Machines Corporation Finned contact
KR102252552B1 (ko) * 2019-05-03 2021-05-17 주식회사 프로텍 플립칩 레이저 본딩 시스템
KR20210030016A (ko) 2019-09-09 2021-03-17 한철희 반도체 칩 열압착 본딩 장치
DE102019124335A1 (de) * 2019-09-11 2021-03-11 Hesse Gmbh Bondvorrichtung
EP4028178A1 (de) * 2019-09-11 2022-07-20 Hesse GmbH Ultraschallwerkzeug und ultraschallverbindungsvorrichtung hiermit
KR20210037431A (ko) 2019-09-27 2021-04-06 삼성전자주식회사 본딩 헤드, 이를 포함하는 다이 본딩 장치 및 이를 이용한 반도체 패키지의 제조 방법
US11424214B1 (en) * 2019-10-10 2022-08-23 Meta Platforms Technologies, Llc Hybrid interconnect for laser bonding using nanoporous metal tips
US11410961B2 (en) * 2020-03-17 2022-08-09 Micron Technology, Inc. Methods and apparatus for temperature modification in bonding stacked microelectronic components and related substrates and assemblies
KR102394825B1 (ko) 2020-04-23 2022-05-06 주식회사 프로텍 빅셀 소자를 이용한 플립칩 본딩 장치
US11183438B1 (en) 2020-05-14 2021-11-23 Google Llc Compression-loaded printed circuit assembly for solder defect mitigation
TWI760230B (zh) * 2020-06-09 2022-04-01 台灣愛司帝科技股份有限公司 晶片檢測方法、晶片檢測結構以及晶片承載結構
CN111653494B (zh) * 2020-06-16 2021-10-15 中国电子科技集团公司第二十四研究所 非接触式加热的倒装焊工艺方法
CN112802766A (zh) * 2021-01-04 2021-05-14 上海易卜半导体有限公司 半导体组件组装方法、半导体组件和电子设备
US11688718B2 (en) 2021-09-07 2023-06-27 STATS ChipPAC Pte. Ltd. Semiconductor device and method of controlling warpage during LAB
CN114466526A (zh) * 2021-11-02 2022-05-10 深圳市智链信息技术有限公司 一种无线接收信号放大器的芯片固定装置
CN117655622A (zh) * 2024-01-31 2024-03-08 宁波尚进自动化科技有限公司 焊台

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481082A (en) * 1993-07-19 1996-01-02 Mitsubishi Denki Kabushiki Kaisha Apparatus and method for die bonding semiconductor element
US5495089A (en) * 1993-06-04 1996-02-27 Digital Equipment Corporation Laser soldering surface mount components of a printed circuit board
US6142356A (en) * 1998-05-12 2000-11-07 Sharp Kabushiki Kaisha Die bonding apparatus
US6593545B1 (en) * 2001-08-13 2003-07-15 Amkor Technology, Inc. Laser defined pads for flip chip on leadframe package fabrication method
US20040217100A1 (en) * 2001-06-08 2004-11-04 Shibaura Mechatronics Corporation Electronic part compression bonding apparatus and method
US20090155958A1 (en) * 2007-12-13 2009-06-18 Boris Kolodin Robust die bonding process for led dies
US20100006624A1 (en) * 2008-07-10 2010-01-14 Hitachi, Ltd. Soldering method and soldering apparatus
US8016181B2 (en) * 2008-02-06 2011-09-13 Seiko Epson Corporation Method of producing electro-optical device using anisotropic conductive adhesive containing conductive particles to bond terminal portions and electro-optical device

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2697865B2 (ja) * 1988-07-15 1998-01-14 ローム株式会社 電子部品の実装方法
JPH05329931A (ja) * 1992-05-29 1993-12-14 Nec Home Electron Ltd 熱圧着装置
US5341979A (en) * 1993-09-03 1994-08-30 Motorola, Inc. Method of bonding a semiconductor substrate to a support substrate and structure therefore
JP3331570B2 (ja) * 1993-09-08 2002-10-07 ソニー株式会社 熱圧着装置と熱圧着方法および液晶表示装置の生産方法
US5904868A (en) * 1994-06-16 1999-05-18 International Business Machines Corporation Mounting and/or removing of components using optical fiber tools
JP3842362B2 (ja) * 1996-02-28 2006-11-08 株式会社東芝 熱圧着方法および熱圧着装置
US6025649A (en) * 1997-07-22 2000-02-15 International Business Machines Corporation Pb-In-Sn tall C-4 for fatigue enhancement
JP3176580B2 (ja) * 1998-04-09 2001-06-18 太陽誘電株式会社 電子部品の実装方法及び実装装置
US6495397B2 (en) * 2001-03-28 2002-12-17 Intel Corporation Fluxless flip chip interconnection
US6713318B2 (en) * 2001-03-28 2004-03-30 Intel Corporation Flip chip interconnection using no-clean flux
JP2004111601A (ja) * 2002-09-18 2004-04-08 Tokyo Seimitsu Co Ltd ダイボンダ
US6768083B2 (en) * 2002-09-19 2004-07-27 Speedline Technologies, Inc. Reflow soldering apparatus and method for selective infrared heating
US7276673B2 (en) * 2003-09-26 2007-10-02 Tdk Corporation Solder bonding method and solder bonding device
JP4654865B2 (ja) * 2005-09-30 2011-03-23 パナソニック株式会社 電子部品実装方法
KR101165029B1 (ko) * 2007-04-24 2012-07-13 삼성테크윈 주식회사 칩 가열장치, 이를 구비한 플립 칩 본더 및 이를 이용한플립 칩 본딩 방법
US7854365B2 (en) * 2008-10-27 2010-12-21 Asm Assembly Automation Ltd Direct die attach utilizing heated bond head
JP2010245412A (ja) * 2009-04-09 2010-10-28 Renesas Electronics Corp 半導体集積回路装置の製造方法
KR101114180B1 (ko) * 2009-07-14 2012-02-22 (주)창조엔지니어링 평탄도 유지 장치
US8381965B2 (en) * 2010-07-22 2013-02-26 Taiwan Semiconductor Manufacturing Company, Ltd. Thermal compress bonding

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5495089A (en) * 1993-06-04 1996-02-27 Digital Equipment Corporation Laser soldering surface mount components of a printed circuit board
US5481082A (en) * 1993-07-19 1996-01-02 Mitsubishi Denki Kabushiki Kaisha Apparatus and method for die bonding semiconductor element
US6142356A (en) * 1998-05-12 2000-11-07 Sharp Kabushiki Kaisha Die bonding apparatus
US20040217100A1 (en) * 2001-06-08 2004-11-04 Shibaura Mechatronics Corporation Electronic part compression bonding apparatus and method
US6593545B1 (en) * 2001-08-13 2003-07-15 Amkor Technology, Inc. Laser defined pads for flip chip on leadframe package fabrication method
US20090155958A1 (en) * 2007-12-13 2009-06-18 Boris Kolodin Robust die bonding process for led dies
US8016181B2 (en) * 2008-02-06 2011-09-13 Seiko Epson Corporation Method of producing electro-optical device using anisotropic conductive adhesive containing conductive particles to bond terminal portions and electro-optical device
US20100006624A1 (en) * 2008-07-10 2010-01-14 Hitachi, Ltd. Soldering method and soldering apparatus

Also Published As

Publication number Publication date
US8967452B2 (en) 2015-03-03
CN103377958A (zh) 2013-10-30
KR101419690B1 (ko) 2014-07-17
US20130270230A1 (en) 2013-10-17
TW201344819A (zh) 2013-11-01
CN103377958B (zh) 2016-03-23
KR20130117682A (ko) 2013-10-28

Similar Documents

Publication Publication Date Title
TWI514487B (zh) 半導體晶片的熱壓縮鍵合
US7736950B2 (en) Flip chip interconnection
US9922915B2 (en) Bump-on-lead flip chip interconnection
KR100555395B1 (ko) 무세척 플럭스를 사용한 플립칩 상호 접속
US10483228B2 (en) Apparatus for bonding semiconductor chip and method for bonding semiconductor chip
US7901983B2 (en) Bump-on-lead flip chip interconnection
US10014272B2 (en) Die bonding with liquid phase solder
TW201027644A (en) In-situ melt and reflow process for forming flip-chip interconnections and system thereof
KR102363436B1 (ko) 반도체 칩의 레이저 컴프레션 본딩장치 및 본딩방법
TW201715624A (zh) 重加工製程
JPH0779152B2 (ja) フリップチップ型半導体装置の実装方法
JP2014143316A (ja) フリップチップ部品の樹脂封止方法
JP6866449B2 (ja) インターポーザー、電子基板および電子基板の製造方法
JP2009004462A (ja) 半導体装置の実装方法
KR20110124579A (ko) 유. 브이 레이저를 사용한 플립 칩 본딩방법
JP2015070187A (ja) 半導体装置及び半導体装置の製造方法
JP2015220291A (ja) 半導体装置及びその製造方法
US11824037B2 (en) Assembly of a chip to a substrate
KR20240033314A (ko) 반도체 패키지 리플로우 장치 및 반도체 패키지 리플로우 방법
Ding et al. Mitigation of warpage for large 2.5 D Through Silicon Interposer (TSI) package assembly
JP2022105279A (ja) 方法および装置（基板へのチップの組立て）
JP2707909B2 (ja) 集積回路チップのボンディング方法
WO2020258493A1 (zh) 一种芯片封装方法
TWI656582B (zh) Semiconductor device mounting method and mounting device
TW202213558A (zh) 無助焊劑倒裝晶片封裝件的製造裝置及製造方法