TWI502654B - 半導體裝置及包括研磨步驟之半導體裝置的製造方法 - Google Patents

半導體裝置及包括研磨步驟之半導體裝置的製造方法 Download PDF

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TWI502654B
TWI502654B TW101127815A TW101127815A TWI502654B TW I502654 B TWI502654 B TW I502654B TW 101127815 A TW101127815 A TW 101127815A TW 101127815 A TW101127815 A TW 101127815A TW I502654 B TWI502654 B TW I502654B
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semiconductor wafer
semiconductor
encapsulation material
layer
face
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TW101127815A
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TW201312666A (zh
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Thorsten Meyer
Klaus Reingruber
David O'sullivan
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Intel Mobile Comm Gmbh
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Description

半導體裝置及包括研磨步驟之半導體裝置的製造方法
本發明涉及半導體裝置以及半導體裝置的製造方法，其中所述方法包括一個或多個研磨步驟。
由於在成本和性能方面的優點，晶片級封裝正在整個半導體工業中獲得關注。當使用標準晶片級封裝技術時，所有技術製程步驟都在晶片級被執行。因為標準晶片級封裝是扇入解決方案，所以在半導體晶片下面僅僅有限數目的接觸墊(pad)是可能的。因此，為了放置大量接觸墊，半導體晶片可以被設計得更大或者額外材料可以作為圍繞晶粒的間隔保持器被放置以承載允許扇出再分佈的佈線。
晶片級封裝通常涉及研磨步驟以減小半導體晶粒的厚度。然而，任何經研磨的半導體表面都包含裂紋、脊和谷的系統。如果施加額外機械應力，則在半導體材料中的這些損壞可能誘發穿過半導體塊狀材料的裂紋。這種機械應力可能在半導體裝置的處理、操縱或裝運期間或者在應用(例如行動電話)中的使用期間發生。
 【發明內容】及【實施方式】
在下面的詳細描述中參考了形成其一部分的附圖，並且其中通過說明的方式示出可以實踐本發明的特定實施例。在這方面，參考所描述的(一幅或多幅)附圖的取向使 用了諸如“頂部”、“底部”、“前”、“後”、“前導”、“尾隨等等之類的方向術語。由於可以將各實施例的組件定位在許多不同的取向中，因此使用所述方向術語是為了進行說明而絕非進行限制。應當理解，在不背離本發明的範圍的情況下，可以利用其他實施例並且可以做出結構或邏輯的改變。因此不應當將下面的詳細描述視為進行限制，並且本發明的範圍由所附申請專利範圍來界定。
應當理解，可以將在這裏所描述的各種示例性實施例的特徵彼此組合，除非另有專門說明。
如在本說明書中所採用的，術語“耦合”和/或“電耦合”並非打算是指，元件必須被直接地耦合到一起；可以在“耦合”或“電耦合”元件之間提供中間元件。
在下面描述了包含半導體晶片的裝置。半導體晶片可以屬於不同類型，可以通過不同技術來製造，並且可以包括例如集成的電、電光或機電電路或無源元件(passive)。積體電路可以例如被設計為邏輯積體電路、類比積體電路、混合信號積體電路、功率積體電路、記憶體電路或集成無源元件。此外，半導體晶片可以被配置為所謂的MEMS(微機電系統)，並且可以包括微機械結構，例如橋、膜或舌結構。半導體晶片可以被配置為感測器或致動器，例如壓力感測器、加速度感測器、轉動感測器、麥克風等等。在其中嵌入這種功能元件的半導體晶片通常包含用於驅動功能元件或者進一步處理由功能元件生成的信號的電子電路。半導體晶片不需要由特定的半導體材料(例 如Si、SiC、SiGe、GaAs)製造，並且此外可以包含不是半導體的無機和/或有機材料，舉例來說，例如分立的無源元件、天線、絕緣體、塑膠或金屬。
半導體晶片可以具有接觸墊(或電極或接觸元件)，其允許與包括在半導體晶片中的積體電路進行電接觸。接觸墊可以包括一個或多個金屬層，其被施加到半導體晶片的半導體材料。金屬層可以被製造成具有任何期望的幾何形狀和任何期望的材料成分。金屬層可以例如處於覆蓋區域的層的形式。任何期望的金屬或金屬合金(例如鋁、鈦、金、銀、銅、鈀、鉑、鎳、鉻或鎳釩)都可以被用作該材料。金屬層不需要是均質的或者由僅僅一種材料製造，也就是說，在金屬層中包含的材料的各種成分和濃度都是可能的。接觸墊可以位於半導體晶片的有源主面上或者半導體晶片的其他面上。
具有導體線(或導體軌跡(track))的形狀的一個或多個金屬層可以被提供，並且可以被電耦合到半導體晶片。金屬層可以例如被用來產生再分佈層。導體線可以作為佈線層被採用以與來自裝置外部的半導體晶片進行電接觸和/或與在裝置中包含的其他半導體晶片和/或組件進行電接觸。導體線可以將半導體晶片的接觸墊耦合到外部接觸墊。導體線可以被製造成具有任何期望的幾何形狀和任何期望的材料成分。任何期望的金屬(例如鋁、鎳、鈀、銀、錫、金或銅)或金屬合金都可以被用作該材料。導體線不需要是均質的或者由僅僅一種材料製造，也就是說，在導 體線中包含的材料的各種成分和濃度都是可能的。此外，導體線可以被佈置在電絕緣層上方或下方或之間。
在下面描述的裝置包括外部接觸墊(或外部接觸元件)，其可以具有任何形狀和尺寸。外部接觸墊可以是能夠從裝置外部到達的，並且可以因此允許與來自裝置外部的半導體晶片進行電接觸。此外，外部接觸墊可以是導熱的，並且可以用作熱槽以用於耗散由半導體晶片生成的熱。外部接觸墊可以由任何期望的導電材料或者不同材料(例如金屬(例如銅、鎳、鋁或金)、金屬合金或導電有機材料)的堆疊構成。外部接觸墊可以由金屬層的一些部分形成。可以在外部接觸墊上沈積焊料材料，例如焊球或焊料塊。
半導體晶片或者半導體晶片的至少一些部分可以利用封裝材料覆蓋，該封裝材料可以是電絕緣的並且可以形成封裝體。封裝材料可以是任何適當的硬質塑膠、熱塑性或熱固性材料或者層壓材料(預浸體)，並且可以包含填充材料。可以採用各種技術以利用封裝材料封裝半導體晶片，例如壓力成型、注射成型、粉末成型、液體成型、層疊或印刷。可以使用熱和/或壓力來施加封裝材料。
封裝材料可以被用來產生扇出型封裝。在扇出型封裝中，外部接觸墊和/或將半導體晶片連接到外部接觸墊的導體線中的至少一些橫向地位於半導體晶片的輪廓外部，或者的確至少與半導體晶片的輪廓交叉。因此，在扇出型封裝中，半導體晶片的封裝的周邊外部部分通常(另外地 )被用於將該封裝電接合到外部應用，例如應用板等等。該封裝的、包圍半導體晶片的這個外部部分相對於半導體晶片的覆蓋區有效地擴大了該封裝的接觸區域，因此導致關於稍後的處理(例如二級組裝)在封裝墊尺寸和間距方面放鬆的約束。
圖1A-1H示意性地示出製造裝置100的方法。在圖1H中示出通過該方法獲得的裝置100的橫斷面。
圖1A示意性地示出載體10。
圖1B示意性地示出放置在載體10上的第一半導體晶片11。第一半導體晶片11具有第一面12和與第一面12相對的第二面13。接觸墊14被佈置在半導體晶片11的第一面側12上。半導體晶片11被放置在載體10上，其第一面12面對載體10。
圖1C示意性地示出封裝第一半導體晶片11以形成封裝體16的封裝材料15。
圖1D示意性地示出從封裝體16移除載體10。
圖1E示意性地示出第一研磨步驟，其中通過從封裝體16和第一半導體晶片11的第二面13移除材料來薄化封裝體16和第一半導體晶片11。
圖1F示意性地示出再分佈層17，其被形成在第一半導體晶片11的第一面12和包圍第一半導體晶片11的封裝材料15上。
圖1G示意性地示出第二研磨步驟，其中封裝體16和第一半導體晶片11的第二面13被再次研磨。
圖1H示意性地示出從第一半導體晶片11的第二面13移除半導體材料而同時基本上未移除封裝材料15。
圖2A-2P示意性地示出用於製造裝置200的方法，裝置200的橫斷面被示出在圖2P中。圖2A-2P所示的方法是圖1A-1H所示的方法的實施。在下面描述的生產方法的細節因此能夠同樣被應用於圖1A-1H的方法。
圖2A示意性地示出載體10，載體10可以是由剛性材料(例如金屬(例如鎳、鋼或不銹鋼))、層壓材料、膜或材料堆疊製成的板。載體10可以具有能夠在其上放置裝置200的組件的至少一個平坦面。載體10的形狀不限於任何幾何形狀，例如，載體10可以是圓的或方形的。載體10可以具有任何適當的尺寸。
膠帶20(例如雙面黏性帶)可以被層疊到載體10上。膠帶20的功能是提供在後續處理步驟期間在載體10上放置的組件的、可釋放的固定。代替膠帶20，可以採用達到相同功能的任何其他合適的機構。為此，載體10可以具有某種塗層，例如允許從在載體10上放置的組件釋放載體10的金或鐵氟龍塗層。
圖2B示意性地示出第一半導體晶片11和第二半導體晶片21，它們被放置在膠帶20的頂面上。第一半導體晶片11具有第一面12和與第一面12相對的第二面13。接觸墊14被佈置在第一面12上。第二半導體晶片21具有第一面22和與第一面22相對的第二面23。接觸墊24被佈置在第一面22上。兩個半導體晶片11、21的第一面12 、22都面對載體10。在一個實施例中，半導體晶片11、21具有大約725或775μm的厚度d1 ，但是其他厚度d1 也是可能的。
雖然在圖2B中示出僅僅兩個半導體晶片11、21，但是可以在載體10上放置任何數目的半導體晶片，例如多於50或500或1000個半導體晶片。半導體晶片可以例如被佈置成陣列。當半導體晶片已經處於晶片接合時，它們通常以更大的間隔在載體10上重新定位。半導體晶片可以已被製造在相同的半導體晶片上，但是可以可替換地已被製造在不同的半導體晶片上。此外，半導體晶片可以是物理上相同的，但是還可以包含不同的積體電路和/或代表其他組件。
圖2C示意性地示出封裝材料15，其被用來封裝半導體晶片11、21以及形成封裝體16。封裝材料15覆蓋半導體晶片11、21的第二面13、23和所有的側面。在一個實施例中，封裝材料15是硬質塑膠或者熱固性模塑材料。在這種情況下，封裝材料15可以基於環氧材料，並且可以包含由小玻璃顆粒(SiO2 )組成的填充材料或者其他電絕緣礦物填充材料(比如Al2 O3 )或者有機填充材料。封裝材料15可以例如通過壓力成型、注射成型、粒化成型、粉末成型或液體成型來施加。
在一個實施例中，封裝材料15是由電絕緣聚合物材料製成的片材(sheet)。聚合物材料可以例如是預浸體(對於預浸漬纖維而言是短的)，預浸體是纖維氈(例如玻 璃或碳纖維)和樹脂(例如硬質塑膠材料)的組合。預浸體材料通常被用來製造PCB(印刷電路板)。在PCB工業中使用並且能夠在這裏被用作聚合物材料的衆所周知的預浸體材料是：FR-2、FR-3、FR-4、FR-5、FR-6、G-10、CEM-1、CEM-2、CEM-3、CEM-4和CEM-5。在一個實施例中，封裝材料15是均質的，並且完全由相同的材料製成。因此，在該實施例中，封裝材料15包括恰好一個層，而不是以逐層方式製成的。
圖2D示意性地示出從載體10釋放封裝體16。為此，膠帶20可以具有熱釋放性質的特徵，該性質允許在熱處理期間移除膠帶20和載體10。從封裝體16移除膠帶20和載體10是在適當的溫度執行的，該溫度取決於膠帶20的熱釋放性質並且通常高於150℃。在移除載體10和膠帶20之後，半導體晶片11、21的第一面12、22與封裝材料15的第一面一起界定基本上平的表面25。封裝材料15具有與平表面25相對的第二面26。
圖2E示意性地示出例如通過研磨封裝材料15的第二面26來薄化封裝體16。在一個實施例中，封裝體16在研磨之後具有大約690μm的厚度d2 ，但是其他厚度d2 也是可能的。在研磨過程期間，覆蓋半導體晶片11、21的第二面13、23的封裝材料15被移除。另外，還通過從它們的第二面13、23移除半導體材料來薄化半導體晶片11、21。
圖2F示意性地示出介電層30，其在平表面25上被 沈積從而至少部分地覆蓋半導體晶片11、21的第一面12、22和封裝材料15的頂表面。介電層30具有暴露半導體晶片11、21的接觸墊14、24的通孔。可以以各種方式製造介電層30。例如，介電層30可以從氣相或從溶液沈積，或者能夠在表面25上印刷或層疊。此外，薄膜技術方法(比如旋塗)或者標準PCB工業製程流程能夠被用於施加介電層30。可以由聚合物(例如聚醯亞胺)、PBO、聚對二甲苯(parylene)、光致抗蝕劑材料、醯亞胺、環氧、環氧樹脂、硬質塑膠、矽樹脂、氮化矽或者無機、類陶瓷材料(例如矽樹脂-碳化合物)製造介電層30。介電層30的厚度可以高達10μm或者甚至更高。在一個實施例中，省略了介電層30的沈積。
圖2G示意性地示出薄的種子層31，其被沈積到介電層30和接觸墊14、24上。種子層31的沈積可以例如通過濺射或者從溶液的無電沈積來執行。種子層31的材料可以是鈦、鈦鎢、銅、鈀或任何其他適當的金屬、金屬堆疊或金屬合金。
圖2H示意性地示出電鍍抗蝕劑32。電鍍抗蝕劑32可以是光致抗蝕劑層，並且可以被印刷、電鍍或旋塗在種子層31的頂表面上。通過經過掩模暴露於具有合適波長的光和後續的顯影或者鐳射施加或者鐳射直接成像，在電鍍抗蝕劑32中形成凹部。
圖2I示意性地示出金屬層33，其以電方式(galvanically)生長並且增強種子層31的、被電鍍抗蝕劑 32中的凹部暴露的部分。銅或其他金屬或金屬合金可以被用作金屬層33的材料。在金屬材料的電沈積期間，可以採用種子層31作為電極。金屬層33具有大於3μm的厚度。
圖2J示意性地示出，在金屬層33的電鍍之後，通過使用適當的溶劑來剝離電鍍抗蝕劑32。通過簡短的蝕刻步驟來移除尚未用金屬層33覆蓋的、種子層31的現在暴露的部分，從而產生如在圖2J中所示的結構化金屬層。
圖2K示意性地示出介電層34，其被沈積在金屬層33之上並且在特定區域中開口以暴露金屬層33的部分。金屬層33的暴露部分用作外部接觸墊35。可以通過使用與如上結合介電層30所述的相同或者類似的材料和處理步驟來產生介電層34。介電層34具有焊料阻擋層的功能。種子層31和金屬層33與介電層30、34一起形成再分佈層17。在一個實施例中，省略了介電層34的沈積。
圖2L示意性地示出通過研磨封裝材料15的第二面26再次薄化封裝體16。在研磨過程期間，封裝材料15和半導體晶片11、21的半導體材料被同時移除。在研磨之後半導體晶片11、21(和封裝材料15)的厚度d3 取決於為其設計裝置200的應用的要求。在一個實施例中，半導體晶片11、21的厚度d3 在研磨之後是大約450μm，但是其他厚度d3 也是可能的。在一個實施例中，省略了在圖2L中所示的研磨步驟。
圖2L還以放大視圖示出第二半導體晶片21的一部分 。該圖示出，半導體晶片11、21的經研磨的半導體表面包含裂紋、脊和谷的系統。峰和谷形成緩解層40。緩解層40的下面是具有微裂紋、位錯、滑移和應力等特徵的受損層41。如果例如在裝置200的處理、操縱或裝運期間或者在應用(例如行動電話)中的使用期間施加額外應力，則層40和41這二者都可以誘發穿過塊狀半導體材料42的裂紋。
圖2M示意性地示出從半導體晶片11、21移除緩解層40和受損層41。這是在抛光步驟中完成的，該抛光步驟從半導體晶片11、21移除半導體材料但是基本上不移除封裝材料15。結果，在抛光步驟之後在半導體晶片11、21的第二面13、23和封裝材料15的第二面26之間存在高度差d4 (或間隙或臺階)。半導體晶片11、21的第二面13、23和封裝材料15的第二面26這二者可以是相互平行的、基本上平的表面。在一個實施例中，高度差d4 處於從3到10μm的範圍，特別是處於從3到5μm的範圍。高度差d4 還可以更大，例如處於從3到20μm的範圍。移除緩解層40和受損層41引起高得多的力以使半導體晶片11、21的半導體材料破裂。
抛光半導體晶片11、21的第二面13、23可以通過選擇性地移除受損半導體材料但是基本上不腐蝕封裝材料15的任何技術來執行。這種技術的實例是濕蝕刻和乾蝕刻。濕蝕刻涉及將封裝體16的表面26暴露於蝕刻劑，該蝕刻劑蝕刻半導體材料而不蝕刻封裝材料15，舉例來說，例如 HF和HNO3 。能夠使用蝕刻時間和已知的蝕刻速率來控制在半導體晶片11、21中通過蝕刻產生的腔的深度。常常通過使用電漿蝕刻機來執行乾蝕刻。電漿蝕刻機使用強電場從製程氣體(例如含氟氣體)產生電漿。封裝體16被放置在電漿蝕刻機中，並且使用真空泵系統從製程腔室將空氣抽空。然後製程氣體在低壓下被引入，並且通過電介質擊穿而被激發成電漿。然而，可以提供，封裝材料15包括樹脂矩陣和在樹脂矩陣中嵌入的矽顆粒。在抛光步驟期間，樹脂矩陣不被移除，但是那些矽顆粒與在封裝材料15的表面上暴露的半導體晶片11、21的半導體材料一起被移除。
圖2N示意性地示出背面保護層43，其被沈積到封裝體16的背面上。背面保護層43可以由在封裝體16上層疊的適當箔或者使用橡皮滾子(squeegee)塗覆在封裝體16的背面上的適當膏劑製成。在一個實施例中，背面保護層43並不再現在封裝體16的背面中的臺階。代之以，背面保護層43具有基本上平的表面44。
圖2O示意性地示出被放置到外部接觸墊35上的焊球45。焊料材料由金屬合金形成，該金屬合金例如由下列材料構成：SnPb、SnAg、SnAgCu、SnAgCuNi、SnAu、SnCu和SnBi。焊球45被用來將裝置200電耦合到其他組件(例如PCB)。
圖2P示意性地示出通過切割封裝體16來將裝置200相互分開。切割封裝體16可以例如通過使用鋸、切、銑 、蝕刻或雷射光束來執行。
通過上述方法製造的裝置200是扇出型封裝。封裝材料15允許再分佈層17延伸超出半導體晶片11、21的輪廓。外部接觸墊35因此不需要被佈置在半導體晶片11、21的輪廓內，而是能夠在更大的區域上分佈。由於封裝體16而可用於佈置外部接觸墊35的增加的區域意味著，外部接觸墊35不僅能夠以彼此之間大的距離被佈置，而且與當所有的外部接觸墊35被佈置在半導體晶片11、21的輪廓內時的情形相比，能夠佈置在那裏的外部接觸墊35的最大數目同樣被增加。
對於本領域技術人員而言明顯的是，如上所述的圖2P所示的裝置200及其製造僅僅意圖是示例性實施例，並且許多變化是可能的。上述裝置200中的每個包含單個半導體晶片。可替換地，可以在相同裝置200中包括不同類型的兩個或更多個半導體晶片或無源元件。半導體晶片和無源元件可以在功能、尺寸、製造技術等等方面不同。此外，裝置200的再分佈層17包括僅僅一個導體軌跡層。可替換地，可以提供兩個或更多個導體軌跡層。這些層可以被堆疊在彼此之上，並且介電層可以被佈置在相鄰的導體軌跡層之間。
圖3示意性地示出裝置300，其類似於圖2P所示的裝置200。不同之處在於，在裝置300中，背面保護層43再現從第一半導體晶片11的第二面13到包圍第一半導體晶片11的封裝材料15的臺階。在該實施例中，箔被層疊 到封裝體16上以產生背面保護層43。
圖4示意性地示出系統400，其包括安裝在電路板50(例如PCB)上的裝置200。電路板50具有接觸墊51，並且裝置200借助於焊球45被焊接到接觸墊51。
圖5A-5I示意性地示出用於製造裝置500的方法，裝置500的橫斷面被示出在圖51中。圖5A-5I所示的方法類似於圖2A-2P所示的方法。相同的附圖標記表示對應的類似部分。
圖5A示意性地示出如上結合圖2A所述的載體10和層疊到載體10上的膠帶20。圖5B示意性地示出半導體晶片11和21，它們被放置在膠帶20的頂面上。與在圖2B中所示的實施例形成對比，半導體晶片11、21的第二面13、23面對載體10。另外，從接觸墊14、24突出的接觸元件60被佈置在半導體晶片11、21上。在一個實施例中，半導體晶片11、21具有大約725或775μm的厚度d1 ，但是其他厚度d1 也是可能的。
接觸元件60可以由任何期望的導電材料(例如金屬(例如銅)、金屬合金、金屬堆疊或導電有機材料)構成。接觸元件60可以具有從半導體晶片11、21的頂面12、22突出的、在從1到20μm的範圍中的高度d5 ，但是它們可以甚至更大。可以利用任何適當方法產生接觸元件60，例如接線柱球焊(stud bumping)、無電電鍍或者放置金屬柱。
當使用接線柱球焊以用於產生接觸元件60時，修改 了在傳統導線接合中使用的球焊製程。在球焊中，接合線的尖端被熔化以形成球。導線接合工具朝著所要連接的半導體晶片的接觸墊擠壓該球，從而施加機械力、熱和/或超音波能量以產生金屬連接。導線接合工具接著將導線延伸到在板、基板或導線框上的接觸墊並且與該墊形成“針腳”接合，從而通過斷開接合線以開始另一循環而結束。對於接線柱球焊，如所述地在半導體晶片的接觸墊上形成第一球焊，但是導線然後鄰近球上方斷裂。在接觸墊14、24上保留的、所得到的球或“接線柱球焊”提供到下面的、接觸墊14、24的導電材料的永久的、可靠的連接。
作為對於接線柱球焊的替代，可以利用電化學沈積來產生接觸元件60。為此，可以從溶液在接觸墊14、24上無電沈積金屬層(例如銅)。隨後其他金屬(例如鎳和金)可以被無電沈積到銅層上。此外，還可以採用其他沈積方法，舉例來說，例如濺射和/或電沈積。然而，在後一種情況下，結構化步驟可能是必要的。
作為另一替代，預製的金屬柱(或支柱)(例如銅柱)可以被安裝在接觸墊14、24上以形成接觸元件60。圖5C示意性地示出封裝材料15，類似於在圖2C中所示的實施例，其被用來封裝半導體晶片11、21。封裝材料15覆蓋半導體晶片11、21的第一面12、22、接觸元件60以及所有的側面。
圖5D示意性地示出通過研磨從封裝材料15的上表面移除材料。研磨被執行，直至接觸元件60的上表面被從 封裝材料15暴露。在研磨期間接觸元件60的高度被減小也是可能的。在研磨步驟之後，接觸元件60可以具有小於20μm、特別是小於10或5μm的高度d6 。此外，在研磨步驟之後，接觸元件60的上表面和封裝材料15的上表面界定公共平面。
圖5E示意性地示出再分佈層17，其以與如上結合圖2F-2K所述的相同或者類似的方式被沈積在封裝材料15的上表面上。再分佈層17被耦合到接觸元件60的暴露部分。
圖5F示意性地示出載體10被移除並且通過研磨封裝材料15的第二面26再次薄化封裝體16。在研磨過程期間，封裝材料15和半導體晶片11、21的半導體材料被同時移除。在研磨之後半導體晶片11、21(和封裝材料15)的厚度d3 取決於為其設計裝置500的應用的要求。在一個實施例中，在研磨之後，半導體晶片11、21的厚度d3 是大約450μm，但是其他厚度d3 也是可能的。
圖5G示意性地示出如上結合圖2M所述的半導體晶片11、21的第二面13、23被抛光。在抛光步驟期間，從半導體晶片11、21移除半導體材料而基本上不移除封裝材料15。結果，在半導體晶片11、21的第二面13、23和封裝材料15的第二面26之間產生高度差d4 。在一個實施例中，高度差d4 處於從3到10μm的範圍，特別是處於從3到5μm的範圍。高度差d4 還可以更大，例如處於從3到20μm的範圍。
圖5H示意性地示出被沈積到封裝材料15的第二面26上的背面保護層43和被放置在外部接觸墊35上的焊球45。
圖5I示意性地示出封裝材料15被切割，從而產生各個裝置500。
另外，雖然可能已經相對於幾個實施的僅僅一個公開了本發明的實施例的特定特徵或形態，但是如可以對於任何給定或特定應用而言期望的並且有利的那樣，這種特徵或形態可以與其他實施的一個或多個其他特徵或形態進行組合。此外，就在詳述或申請專利範圍中使用術語“包括”、“具有”、“具有”或其其他變體來說，這種術語意圖以類似於術語“包含”的方式而為包括性的。此外，應當理解，本發明的實施例可以在分立電路、部分積體電路或完全積體電路或編程機構中被實施。而且，術語“示例性”僅僅意味著作為實例，而非最佳或最優。還應認識到，為了簡單性和易於理解，在這裏描繪的特徵和/或元件以相對於彼此的特定尺寸(dimension)被示出，並且實際尺寸可能大大不同於在這裏所示的尺寸。
雖然在這裏已經示出並描述了特定實施例，但是本領域普通技術人員將認識到，在不背離本發明的範圍的情況下可以用多種替換的和/或等同的實施來替代所示出並描述的特定實施例。本申請案意圖覆蓋在這裏所討論的特定實施例的任何適配或變化。因此，本發明意圖僅由申請專利範圍及其等同物來界定。
10‧‧‧載體
11‧‧‧第一半導體晶片
12‧‧‧第一面
13‧‧‧第二面
14‧‧‧接觸墊
15‧‧‧封裝材料
16‧‧‧封裝體
17‧‧‧再分佈層
20‧‧‧膠帶
21‧‧‧第二半導體晶片
22‧‧‧第一面
23‧‧‧第二面
24‧‧‧接觸墊
25‧‧‧表面
26‧‧‧第二面
30‧‧‧介電層
31‧‧‧種子層
32‧‧‧電鍍抗蝕劑
33‧‧‧金屬層
34‧‧‧介電層
35‧‧‧接觸墊
40‧‧‧緩解層
41‧‧‧受損層
42‧‧‧塊狀半導體材料
43‧‧‧背面保護層
44‧‧‧表面
45‧‧‧焊球
50‧‧‧電路板
51‧‧‧接觸墊
60‧‧‧接觸元件
100‧‧‧裝置
200‧‧‧裝置
300‧‧‧裝置
400‧‧‧系統
500‧‧‧裝置
附圖被包括以提供對實施例的進一步理解，以及附圖被結合在本說明書中並構成本說明書的一部分。附圖示出實施例，並且與描述一起用來解釋實施例的原理。其他實施例以及實施例的許多預期優點將容易被認識到，因為通過參考下面的詳細描述，它們變得更好理解。附圖的元件相對於彼此不一定是按比例的。相同的附圖標記表示對應的類似部分。
圖1A-1H示意性地示出製造裝置的方法的一個實施例的剖視圖，所述方法包括在載體上放置半導體晶片、利用封裝材料覆蓋半導體晶片、移除載體、研磨半導體晶片和封裝材料、形成再分佈層、進一步研磨半導體晶片和封裝材料、以及減小半導體晶片的厚度；圖2A-2P示意性地示出製造裝置的方法的一個實施例的剖視圖，所述方法包括產生半導體晶片的扇出型封裝、研磨該封裝兩次、以及在封裝和半導體晶片之間產生臺階(step)；圖3示意性地示出包括利用封裝材料封裝的半導體晶片的裝置的一個實施例的剖視圖；圖4示意性地示出包括安裝在電路板上的半導體裝置的系統的一個實施例的剖視圖；以及圖5A-5I示意性地示出製造裝置的方法的一個實施例的剖視圖，所述方法包括產生包括從半導體晶片突出的接 觸元件的半導體晶片的扇出型封裝、研磨該封裝、以及在封裝和半導體晶片之間產生臺階。
11‧‧‧第一半導體晶片
12‧‧‧第一面
13‧‧‧第二面
14‧‧‧接觸墊
15‧‧‧封裝材料
17‧‧‧再分佈層
100‧‧‧裝置

Claims (7)

  1. 一種裝置，包含：具有第一面和與該第一面相對的第二面的半導體晶片，其中接觸墊被佈置在該半導體晶片內之該第一面，其中該接觸墊具有與該半導體晶片內之該第一面和相對面共面的接觸面，該相對面相對該接觸面而面向該半導體晶片內之該第二面，以及其中該接觸墊在其之該接觸面提供用於該半導體晶片之外部的元件與該半導體晶片之積體電路的電耦合；以及具有第一面和與該第一面相對的第二面的封裝材料，其中，該封裝材料封裝該半導體晶片，其中該半導體晶片的該第一面和該封裝材料的該第一面是共面的，從而界定平面，其中該半導體晶片的該第一面從該封裝材料暴露，以及該半導體晶片的該第二面也從該封裝材料暴露，其中該半導體晶片的該第二面和該封裝材料的該第二面具有處於從3到10μm的範圍的高度差，以及其中該半導體晶片的厚度小於該封裝材料的厚度。
  2. 根據申請專利範圍第1項所述的裝置，其中，該半導體晶片的該第二面從該封裝材料被暴露。
  3. 根據申請專利範圍第1項所述的裝置，其中，該封裝材料覆蓋該半導體晶片的側面。
  4. 根據申請專利範圍第1項所述的裝置，其中，再 分佈層被佈置在由該半導體晶片的該第一面和該封裝材料的該第一面界定的該平面上。
  5. 根據申請專利範圍第4項所述的裝置，其中，該再分佈層延伸超出該半導體晶片的輪廓。
  6. 根據申請專利範圍第1項所述的裝置，其中，在該半導體晶片的厚度和該封裝材料的厚度之間的差等於在該半導體晶片的該第二面和該封裝材料的該第二面之間的高度差。
  7. 根據申請專利範圍第1項所述的裝置，其中，該封裝材料是均質的並且完全由相同材料製成。
TW101127815A 2011-08-25 2012-08-01 半導體裝置及包括研磨步驟之半導體裝置的製造方法 TWI502654B (zh)

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