TWI469204B - A polishing method for a semiconductor wafer, and a resin composition and a protective sheet used therefor - Google Patents

A polishing method for a semiconductor wafer, and a resin composition and a protective sheet used therefor Download PDF

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Publication number
TWI469204B
TWI469204B TW97123071A TW97123071A TWI469204B TW I469204 B TWI469204 B TW I469204B TW 97123071 A TW97123071 A TW 97123071A TW 97123071 A TW97123071 A TW 97123071A TW I469204 B TWI469204 B TW I469204B
Authority
TW
Taiwan
Prior art keywords
semiconductor wafer
acrylate
meth
polishing
resin composition
Prior art date
Application number
TW97123071A
Other languages
English (en)
Chinese (zh)
Other versions
TW200917353A (en
Inventor
Masanobu Kutsumi
Tomoyuki Kanai
Original Assignee
Denki Kagaku Kogyo Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo Kk filed Critical Denki Kagaku Kogyo Kk
Publication of TW200917353A publication Critical patent/TW200917353A/zh
Application granted granted Critical
Publication of TWI469204B publication Critical patent/TWI469204B/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386—Separation by peeling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Adhesives Or Adhesive Processes (AREA)
TW97123071A 2007-06-22 2008-06-20 A polishing method for a semiconductor wafer, and a resin composition and a protective sheet used therefor TWI469204B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007164934 2007-06-22
JP2007164951 2007-06-22

Publications (2)

Publication Number Publication Date
TW200917353A TW200917353A (en) 2009-04-16
TWI469204B true TWI469204B (zh) 2015-01-11

Family

ID=40185551

Family Applications (1)

Application Number Title Priority Date Filing Date
TW97123071A TWI469204B (zh) 2007-06-22 2008-06-20 A polishing method for a semiconductor wafer, and a resin composition and a protective sheet used therefor

Country Status (5)

Country Link
JP (1) JP5517615B2 (ko)
KR (1) KR20100032361A (ko)
CN (1) CN101681823B (ko)
TW (1) TWI469204B (ko)
WO (1) WO2009001732A1 (ko)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010267653A (ja) * 2009-05-12 2010-11-25 Disco Abrasive Syst Ltd ウエーハの加工方法
JP5356914B2 (ja) * 2009-05-28 2013-12-04 株式会社ディスコ ウエーハの加工方法
JP2011046153A (ja) * 2009-08-28 2011-03-10 Disco Abrasive Syst Ltd 加工方法
KR100994633B1 (ko) * 2010-04-08 2010-11-15 동우 화인켐 주식회사 흑색 감광성 수지 조성물, 이를 이용하여 제조된 블랙 매트릭스 및 상기 블랙 매트릭스를 구비하는 컬러 필터
JP2013067673A (ja) * 2011-09-20 2013-04-18 Hitachi Chemical Co Ltd 樹脂ペースト組成物及び半導体装置
JP2013084770A (ja) * 2011-10-11 2013-05-09 Disco Abrasive Syst Ltd ウェーハの研削方法
CN103065957B (zh) * 2012-12-27 2016-04-20 日月光半导体制造股份有限公司 半导体基板切割的装置及半导体晶圆切割的制造方法
CN105793957B (zh) * 2013-12-12 2019-05-03 株式会社半导体能源研究所 剥离方法及剥离装置
JP2015233077A (ja) * 2014-06-10 2015-12-24 株式会社ディスコ ウエーハの加工方法
JP2016001677A (ja) * 2014-06-12 2016-01-07 株式会社ディスコ ウエーハの加工方法
JP2016115800A (ja) * 2014-12-15 2016-06-23 株式会社ディスコ ウエーハの加工方法
JP2016174102A (ja) 2015-03-17 2016-09-29 株式会社東芝 半導体製造方法および積層体
CN106088146B (zh) * 2016-07-22 2018-12-18 中国建筑第八工程局有限公司 一种临时地连墙拆除施工方法
KR102426328B1 (ko) * 2017-01-23 2022-07-28 도쿄엘렉트론가부시키가이샤 반도체 기판의 처리 방법 및 반도체 기판의 처리 장치
JP6963409B2 (ja) * 2017-05-09 2021-11-10 株式会社ディスコ ウェーハの加工方法
CN110634828B (zh) * 2018-06-21 2021-11-16 矽创电子股份有限公司 凸块结构

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020127821A1 (en) * 2000-12-28 2002-09-12 Kazuyuki Ohya Process for the production of thinned wafer
US20020160597A1 (en) * 2001-04-30 2002-10-31 Wen-Kun Yang Wafer level package and the process of the same
JP2003201451A (ja) * 2002-01-09 2003-07-18 Sumitomo Bakelite Co Ltd 半導体加工用粘着シート
JP2007100064A (ja) * 2005-09-07 2007-04-19 Furukawa Electric Co Ltd:The ダイシング用粘着テープ

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05315304A (ja) * 1992-05-12 1993-11-26 Sony Corp ウエハの裏面研削方法
JPH07106285A (ja) * 1993-10-08 1995-04-21 Oki Electric Ind Co Ltd 半導体製造方法
JP3310576B2 (ja) * 1997-03-26 2002-08-05 シャープ株式会社 半導体装置の製造方法
JP3097619B2 (ja) * 1997-10-02 2000-10-10 日本電気株式会社 電界放射冷陰極の製造方法
JP2000234079A (ja) * 1999-02-15 2000-08-29 Nitta Ind Corp 半導体ウエハ加工用シート
JP4886937B2 (ja) * 2001-05-17 2012-02-29 リンテック株式会社 ダイシングシート及びダイシング方法
JP2004043762A (ja) * 2001-08-27 2004-02-12 Hitachi Chem Co Ltd 接着シート並びに半導体装置及びその製造方法
JP2003113355A (ja) * 2001-10-03 2003-04-18 Bridgestone Corp 光硬化型仮固定用シート
JP4841802B2 (ja) * 2003-05-02 2011-12-21 リンテック株式会社 粘着シートおよびその使用方法
JP4427308B2 (ja) * 2003-12-10 2010-03-03 株式会社ディスコ 半導体ウェーハの分割方法
JP4444142B2 (ja) * 2005-03-03 2010-03-31 シャープ株式会社 半導体装置の製造方法
JP4993662B2 (ja) * 2005-05-12 2012-08-08 日東電工株式会社 ダイシング用粘着シート、及びそれを用いたダイシング方法
JP2007031494A (ja) * 2005-07-22 2007-02-08 Furukawa Electric Co Ltd:The ウエハ貼着用粘着シート
JP2007046018A (ja) * 2005-08-12 2007-02-22 Denki Kagaku Kogyo Kk 粘着剤、それを用いた粘着シート、及び粘着シートを用いた電子部品製造方法。

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020127821A1 (en) * 2000-12-28 2002-09-12 Kazuyuki Ohya Process for the production of thinned wafer
US20020160597A1 (en) * 2001-04-30 2002-10-31 Wen-Kun Yang Wafer level package and the process of the same
JP2003201451A (ja) * 2002-01-09 2003-07-18 Sumitomo Bakelite Co Ltd 半導体加工用粘着シート
JP2007100064A (ja) * 2005-09-07 2007-04-19 Furukawa Electric Co Ltd:The ダイシング用粘着テープ

Also Published As

Publication number Publication date
WO2009001732A1 (ja) 2008-12-31
KR20100032361A (ko) 2010-03-25
CN101681823B (zh) 2012-05-23
CN101681823A (zh) 2010-03-24
JP5517615B2 (ja) 2014-06-11
TW200917353A (en) 2009-04-16
JPWO2009001732A1 (ja) 2010-08-26

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