TWI453842B - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
TWI453842B
TWI453842B TW097135640A TW97135640A TWI453842B TW I453842 B TWI453842 B TW I453842B TW 097135640 A TW097135640 A TW 097135640A TW 97135640 A TW97135640 A TW 97135640A TW I453842 B TWI453842 B TW I453842B
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TW
Taiwan
Prior art keywords
film
wiring
bump electrode
dummy pattern
semiconductor
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TW097135640A
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English (en)
Chinese (zh)
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TW200924091A (en
Inventor
鈴木進也
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瑞薩科技股份有限公司
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Publication of TW200924091A publication Critical patent/TW200924091A/zh
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Publication of TWI453842B publication Critical patent/TWI453842B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
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    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
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    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5291917B2 (ja) 2007-11-09 2013-09-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP5415710B2 (ja) * 2008-04-10 2014-02-12 ルネサスエレクトロニクス株式会社 半導体装置
JP5395407B2 (ja) * 2008-11-12 2014-01-22 ルネサスエレクトロニクス株式会社 表示装置駆動用半導体集積回路装置および表示装置駆動用半導体集積回路装置の製造方法
KR20100055193A (ko) * 2008-11-17 2010-05-26 삼성전자주식회사 반도체 집적 회로 장치 및 그를 포함하는 액정 표시 장치
JP5503208B2 (ja) 2009-07-24 2014-05-28 ルネサスエレクトロニクス株式会社 半導体装置
JP5315186B2 (ja) 2009-09-18 2013-10-16 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2013033775A (ja) * 2009-12-03 2013-02-14 Panasonic Corp 半導体集積回路及びそれを備えた半導体装置、並びに電子機器
US9437454B2 (en) * 2010-06-29 2016-09-06 Semiconductor Energy Laboratory Co., Ltd. Wiring board, semiconductor device, and manufacturing methods thereof
KR101300034B1 (ko) * 2010-10-18 2013-08-29 엘지디스플레이 주식회사 액정표시장치용 기판 및 이를 이용한 액정표시장치
US8434041B2 (en) * 2011-01-10 2013-04-30 Taiwan Semiconductor Manufacturing Company, Ltd. Increasing dielectric strength by optimizing dummy metal distribution
US8778737B2 (en) * 2011-10-31 2014-07-15 International Business Machines Corporation Flattened substrate surface for substrate bonding
TWI467719B (zh) * 2012-05-07 2015-01-01 Novatek Microelectronics Corp 薄膜覆晶裝置
JP5995518B2 (ja) * 2012-05-11 2016-09-21 ローム株式会社 半導体装置および半導体装置の製造方法
CN103632957A (zh) * 2012-08-23 2014-03-12 上海华虹宏力半导体制造有限公司 半导体芯片第一层金属阻挡层的制造方法
JP6180801B2 (ja) * 2013-06-07 2017-08-16 ルネサスエレクトロニクス株式会社 半導体装置
JP6334851B2 (ja) * 2013-06-07 2018-05-30 シナプティクス・ジャパン合同会社 半導体装置、表示デバイスモジュール、及び、表示デバイスモジュールの製造方法
JP2015032661A (ja) * 2013-08-01 2015-02-16 ルネサスエレクトロニクス株式会社 半導体装置とその製造方法および半導体装置の実装方法
KR20150038842A (ko) * 2013-10-01 2015-04-09 삼성디스플레이 주식회사 구동 칩, 이를 구비한 표시 장치 및 구동 칩 제조 방법
JP2015079848A (ja) * 2013-10-17 2015-04-23 シナプティクス・ディスプレイ・デバイス株式会社 表示装置駆動用半導体集積回路装置
KR20150080825A (ko) 2014-01-02 2015-07-10 삼성디스플레이 주식회사 표시 패널, 이를 포함하는 표시 장치 및 이의 제조 방법
US9418928B2 (en) 2014-01-06 2016-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. Protrusion bump pads for bond-on-trace processing
US9508637B2 (en) 2014-01-06 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Protrusion bump pads for bond-on-trace processing
US9275967B2 (en) 2014-01-06 2016-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Protrusion bump pads for bond-on-trace processing
US9305890B2 (en) 2014-01-15 2016-04-05 Taiwan Semiconductor Manufacturing Company, Ltd. Package having substrate with embedded metal trace overlapped by landing pad
US10199358B2 (en) * 2015-01-13 2019-02-05 Dexerials Corporation Multilayer substrate
KR102182945B1 (ko) * 2015-01-13 2020-11-25 데쿠세리아루즈 가부시키가이샤 범프 형성용 필름, 반도체 장치 및 그의 제조 방법 및 접속 구조체
KR102410525B1 (ko) * 2015-04-14 2022-06-20 삼성디스플레이 주식회사 박막 트랜지스터 기판, 이를 구비한 디스플레이 장치, 박막 트랜지스터 기판 제조방법 및 디스플레이 장치 제조방법
JP6503286B2 (ja) * 2015-12-24 2019-04-17 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体ウェハ
JP2017116798A (ja) * 2015-12-25 2017-06-29 株式会社ジャパンディスプレイ 表示装置、表示装置の製造方法、及びドライバｉｃ
CN105514075B (zh) * 2015-12-31 2019-05-17 昆山国显光电有限公司 显示装置绑定结构
KR102487061B1 (ko) * 2016-06-30 2023-01-12 삼성디스플레이 주식회사 표시 장치
JP6106794B1 (ja) * 2016-08-05 2017-04-05 サーパス工業株式会社 流体機器
TWI587043B (zh) * 2017-01-25 2017-06-11 友達光電股份有限公司 畫素結構及其顯示面板
CN107807479B (zh) * 2017-11-15 2021-01-22 京东方（河北）移动显示技术有限公司 阵列基板和显示面板
KR102743308B1 (ko) * 2017-11-29 2024-12-17 다이니폰 인사츠 가부시키가이샤 배선 기판 및 배선 기판의 제조 방법
CN109920787B (zh) * 2017-12-12 2021-05-25 中芯国际集成电路制造(北京)有限公司 互连结构的设计方法、装置及制造方法
KR102481468B1 (ko) * 2018-01-04 2022-12-26 삼성디스플레이 주식회사 표시 장치
CN110557887B (zh) * 2018-05-31 2021-10-12 京东方科技集团股份有限公司 电路对位组件及显示装置
CN108919571B (zh) * 2018-07-11 2021-07-27 业成科技（成都）有限公司 显示面板
JP6705479B2 (ja) * 2018-09-12 2020-06-03 日亜化学工業株式会社 光源装置の製造方法
US11259406B2 (en) * 2018-11-21 2022-02-22 Synaptics Incorporated Flexible connector for a display device
KR20210018700A (ko) * 2019-08-09 2021-02-18 삼성디스플레이 주식회사 접착 부재 및 이를 포함한 표시장치
KR102891620B1 (ko) * 2019-09-25 2025-11-28 삼성디스플레이 주식회사 표시장치 및 이의 제조 방법
CN110579917B (zh) * 2019-10-15 2022-03-01 上海中航光电子有限公司 显示模组及显示装置
CN113496891B (zh) * 2020-04-03 2023-03-14 重庆超硅半导体有限公司 一种集成电路硅片表面氧化膜自适应均匀腐蚀方法
CN114442353A (zh) * 2020-10-30 2022-05-06 京东方科技集团股份有限公司 驱动背板及其制备方法和显示面板
CN112710928B (zh) * 2020-12-10 2023-02-21 国网宁夏电力有限公司电力科学研究院 基于自相关性分析的直流局部放电波形去干扰方法及系统
CN114823351B (zh) * 2021-01-28 2025-05-16 欣兴电子股份有限公司 金属凸块结构及其制作方法与驱动基板
US20230021655A1 (en) * 2021-07-22 2023-01-26 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacturing the same
JP2023111106A (ja) * 2022-01-31 2023-08-10 ルネサスエレクトロニクス株式会社 半導体装置、および半導体装置の製造方法
CN115714161A (zh) * 2022-02-25 2023-02-24 友达光电股份有限公司 用于显示装置的电路板结构
US20240071971A1 (en) * 2022-08-31 2024-02-29 LAPIS Technology Co., Ltd. Semiconductor device and manufacturing method of semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050121803A1 (en) * 2003-04-03 2005-06-09 David Angell Internally reinforced bond pads
TW200633103A (en) * 2005-03-11 2006-09-16 Renesas Tech Corp Method for manufacturing semiconductor integrated circuit device
US20070080416A1 (en) * 2005-10-07 2007-04-12 Renesas Technology Corp. Semiconductor device and a method of manufacturing the same
US20070246752A1 (en) * 2006-04-21 2007-10-25 Kangguo Cheng Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering and methods for fabricating such device structures and for fabricating a semiconductor-on-insulator substrate

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100212009B1 (ko) * 1995-12-29 1999-08-02 김영환 반도체 소자의 금속배선 보호막 형성방법
JP4222525B2 (ja) * 1996-07-12 2009-02-12 川崎マイクロエレクトロニクス株式会社 半導体装置、その製造方法及び反射型液晶表示装置
US6049132A (en) 1996-07-12 2000-04-11 Kawasaki Steel Corporation Multiple metallization structure for a reflection type liquid crystal display
JP3638778B2 (ja) * 1997-03-31 2005-04-13 株式会社ルネサステクノロジ 半導体集積回路装置およびその製造方法
JP2002198374A (ja) * 2000-10-16 2002-07-12 Sharp Corp 半導体装置およびその製造方法
JP4445189B2 (ja) * 2002-08-29 2010-04-07 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP4228948B2 (ja) * 2004-03-16 2009-02-25 日本電気株式会社 表示装置
US7452803B2 (en) * 2004-08-12 2008-11-18 Megica Corporation Method for fabricating chip structure
US7241636B2 (en) * 2005-01-11 2007-07-10 Freescale Semiconductor, Inc. Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
JP2007115980A (ja) * 2005-10-21 2007-05-10 Toshiba Corp 半導体装置及びその製造方法
JP2007123407A (ja) * 2005-10-26 2007-05-17 Renesas Technology Corp 半導体装置の製造方法
JP2007294783A (ja) * 2006-04-27 2007-11-08 Renesas Technology Corp 半導体装置の製造方法および半導体装置の設計支援システム
JP5123510B2 (ja) * 2006-09-28 2013-01-23 ルネサスエレクトロニクス株式会社 半導体装置
JP5291917B2 (ja) * 2007-11-09 2013-09-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050121803A1 (en) * 2003-04-03 2005-06-09 David Angell Internally reinforced bond pads
TW200633103A (en) * 2005-03-11 2006-09-16 Renesas Tech Corp Method for manufacturing semiconductor integrated circuit device
US20070080416A1 (en) * 2005-10-07 2007-04-12 Renesas Technology Corp. Semiconductor device and a method of manufacturing the same
US20070246752A1 (en) * 2006-04-21 2007-10-25 Kangguo Cheng Semiconductor device structures with reduced junction capacitance and drain induced barrier lowering and methods for fabricating such device structures and for fabricating a semiconductor-on-insulator substrate

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