TWI446419B - 堆疊裝置的製造方法及裝置晶圓處理方法 - Google Patents

堆疊裝置的製造方法及裝置晶圓處理方法 Download PDF

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TWI446419B
TWI446419B TW099123933A TW99123933A TWI446419B TW I446419 B TWI446419 B TW I446419B TW 099123933 A TW099123933 A TW 099123933A TW 99123933 A TW99123933 A TW 99123933A TW I446419 B TWI446419 B TW I446419B
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adhesive layer
wafer
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TW201130022A (en
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Wen Jin Wu
Wen Chih Chiou
Shau Lin Shue
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Taiwan Semiconductor Mfg
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Description

堆疊裝置的製造方法及裝置晶圓處理方法
本發明係有關於一種半導體裝置的製作，特別是有關於一種半導體裝置製造期間處理(handle)薄化的晶圓所使用的臨時承載板的接合與卸離(detaching)方法。
由於各個電子部件(即，電晶體、二極體、電阻、電容等等)的集積度(integration density)持續不斷的改進，使半導體業持續的快速成長發展。主要來說，集積度的改進來自於最小特徵尺寸(minimum feature size)不斷縮小而容許更多的部件整合至既有的晶片面積內。因此創造出三維積體電路(three-dimensional integrated circuit,3DIC)來解決裝置數量增加時，存在於裝置之間內連線長度及數量的限制因素。晶粒對晶圓(die to wafer)堆疊接合為形成3DIC的一種方式，其中一或一個以上的晶粒接合至一晶圓上，而晶粒的尺寸可小於晶圓上的晶片(chip)。為了減少半導體封裝的厚度、增加晶片的速度，以及高密度元件製作，因而致力於縮減半導體晶圓的厚度。因此，重要的3D技術製程其中之一在於如何處理晶圓薄化。用於臨時性接合的典型製程包括在承載晶圓及/或裝置晶圓上塗覆一黏著劑、將裝置晶圓與承載板接合、對裝置晶圓進行加工以及接著去除承載板。
厚度縮減即為對背向於半導體晶圓中含有電路圖案(pattern-formed circuity)的表面進行所謂的晶背研磨，半導體晶圓上通常透過一黏著材料來貼附一載板，以協助晶圓的處理。由於薄化的晶圓強度不足且較容易發生變形，例如彎曲(bending)及/或翹曲(warping)，因此在利用切割製程使晶圓分割成個別的晶片封裝之前，晶圓表面先以成型材料(molding compound)進行封膠(例如，熱固型環氧樹脂)。傳統成型製程中晶圓邊緣會露出一部分的黏著材料，使晶圓邊緣在進行後續製程(例如時蝕刻或乾蝕刻)期間容易受損，例如在卸離承載板之後發生破片(chipped)。特別是使用熱固性(thermosetting)的黏著材料時，裝置晶圓所進行的高溫背側製程，使黏著強度大於裝置晶圓中的低介電常數材料層而在承載板卸離製程期間造成低介電常數材料層的損害。同樣地，在進行背側製程期間，黏著材料的黏度降低，使黏著材料流入玻璃承載板而引發其他的問題。
本發明一實施例中，一種堆疊裝置的製造方法，包括：提供一晶圓，其具有一第一表面及與其相對的一第二表面，其中第一表面上塗覆了一第一黏著層；提供塗覆了一第二黏著層的一承載板，而露出承載板的一邊緣區；經由第一黏著層及第二黏著層將晶圓的第一表面接合至承載板，其中承載版的邊緣區被第一黏著層覆蓋；自第二表面薄化晶圓，以形成一薄化的晶圓；將複數個晶粒接合至薄化的晶圓上；去除鄰近於薄化的晶圓邊緣的第一黏著層，而露出承載板的邊緣區以及鄰近於承載板的邊緣區的該二黏著層；施加一光能或熱能，以分解第二黏著層；自晶圓卸離承載板；以及去除餘留於晶圓的第一表面上的第一黏著層。
本發明另一實施例中，一種堆疊裝置的製造方法，包括：提供一晶圓，其具有一第一表面及與其相對的一第二表面，其中第一表面上塗覆了一第一黏著層；提供塗覆了一第二黏著層的一承載板，而露出承載板的一邊緣區；經由第一黏著層及第二黏著層將晶圓的第一表面接合至承載板，其中承載版的邊緣區被第一黏著層覆蓋；自第二表面薄化晶圓，以形成一薄化的晶圓；將複數個晶粒接合至薄化的晶圓上，以形成一晶粒對晶圓的堆疊；在晶粒對晶圓的堆疊上形成一成型材料；在鄰近成型材料的邊緣形成一通道，其中通道穿過成型材料、晶圓的邊緣以及一部分的第一黏著層；去除成型材料、晶圓的邊緣以及第一黏著層中環繞通道的部分，而露出承載板的邊緣區以及鄰近於承載板的該邊緣區的第二黏著層；去除第二黏著層；自晶圓卸離該承載板；以及去除餘留於晶圓的第一表面上的第一黏著層。
本發明又一實施例中，一種裝置晶圓的處理方法，包括：提供一裝置晶圓，其包括具有一前表面及一背表面的一半導體基底，其中一填有導電材料的通孔電極形成於半導體基底內且從前表面往被表面延伸入半導體基底至一深度；在半導體基底的前表面形成一第一黏著層，以覆蓋裝置晶圓的邊緣；提供塗覆了一第二黏著層的一承載板，而露出承載板的一邊緣區；經由第一黏著層及第二黏著層將裝置晶圓接合至承載板，其中承載版的邊緣區被第一黏著層覆蓋；自半導體基底的背表面薄化裝置晶圓，以露出通孔電極的一端點；在半導體基底的背表面上方形成一金屬化結構，以電性連接至通孔電極的露出的端點；將一晶粒接合至裝置晶圓上，以電性連接金屬化結構；去除鄰近裝置晶圓邊緣的第一黏著層，以露出承載板的該邊緣區；去除第二黏著層；自晶圓卸離承載板；以及去除第一黏著層。
在以下說明中，提出了許多特定細節部分，以充分瞭解本發明。然而，任何所屬技術領域中具有通常知識者將會瞭解本發明能夠在沒有這些特定細節情形下實行。在一些範例中，並未詳述習知結構及製程，以避免使本發明產生不必要的混淆。
本說明書全文中所提及關於”一實施例”的意思是指有關於本實施例中所提及特定的特徵(feature)、結構、或特色係包含於本發明的至少一實施例中。因此，本說明書全文中各處所出現的”在一實施例中”用語所指的並不全然表示為相同的實施例。再者，特定的特徵、結構、或特色能以任何適當方式而與一或多個實施例作結合。可以理解的是以下的圖式並未依照比例繪示，而僅僅提供說明之用。
請參照第1圖，其繪示出根據一實施例之垂直式晶粒對晶粒(die to die)堆疊的製造流程圖，其包括臨時承載板(temporary caiier)的接合及卸離。請參照第2A至2K圖，其繪示出根據第1圖的方法來製造晶粒對晶粒堆疊的各個階段的一實施例。
方法100的起始步驟102為在一裝置晶圓上塗覆一第一黏著層，且接著進行步驟104，在一承載板上塗覆一第二黏著層。第2A圖繪示出一實施例之在一裝置晶圓200上塗覆一第一黏著層202的剖面示意圖，用以貼附於塗覆第二黏著層302的承載板300。裝置晶圓200內具有複數個半導體晶片，其中每一晶片包括一基底，其上形成有習知的電子裝置。基底可由半導體材料、矽、砷化鍺、白水晶(rock crystal)晶圓、藍寶石、玻璃、石英、陶瓷、熱固性材料等等所構成。基底上通常覆蓋一或多層介電層及導電層。導電層提供下方電子裝置的連接及佈線(routing)。裝置晶圓200具有第一側200a及相對於第一側200a的第二側200b。在第一側200a上，形成有積體電路，包括主動(active)及被動(passive)裝置，例如電晶體、電阻、電容等等，用以連接接墊及/或其他內連結構。
第一黏著層202置於第一側200a上方，以將裝置晶圓200貼附承載板300。在一實施例中，第一黏著層202覆蓋裝置晶圓200的第一側200a的邊緣200e。第一黏著層202可為一單層、多層黏著結構、或複合層而應用於旋塗(spin on)或多層貼合(lamination)製程，其中至少一黏著層包括施化學去除型黏著材料，例如熱塑性(thermal plastic)材料、溶劑可溶型材料。也可使用其他類型的黏著材料，例如壓力敏感性黏著材料、光固化性黏著材料、環氧化物、或其組合等等。黏著材料可置於半液狀或膠體的表面上，其在受壓之下可立即變形。第一黏著層202可輕易進行物理性或化學性剝除。
承載板300由可去除或可溶材料所構成，例如，矽、玻璃、石英、陶瓷、氧化矽、氧化鋁、高分子、塑膠、丙烯酸基(acrylic-based)材料、任何其他透明材料、或其組合。承載板300為平整的，使其能夠貼附於裝置晶圓200。承載板300的厚度在550微米(μm)至850微米的範圍。承載板300的直徑大於裝置晶圓200的直徑，然而承載板300的尺寸不盡然取決於裝置晶圓200的尺寸。在進行處理或加工期間，承載板300提供裝置晶圓200的物理性支撐，且承載板300為透明的，以容許光線的穿透，例如雷射或紫外光(UV)。
第二黏著層302置於承載板300上方，以將裝置晶圓200貼附承載板300。在一實施例中，除了承載板300的邊緣區300e之外，第二黏著層302覆蓋承載板300的主要部分。第二黏著層302可為一單層或複合層而應用於旋塗或多層貼合製程。在一實施例中，第二黏著層302由光分解性黏著材料所構成，例如雷射敏感性材料、UV敏感性材料或熱分解性材料，其能夠在暴露於光能或熱能(例如，紅外光(IR)、雷射、UV等等)時被分解而失去黏性。在另一實施例中，第二黏著層302由溶劑分解性黏著材料所構成，例如熱塑性材料，其能夠以溶劑進行分解，例如光阻相關溶劑(如，丙二醇單甲基醚酯(propylene glycol methyl ether acetate,PGMEA)或N-甲基吡咯酮(N-methyl pyrrolidinone,NMP))。
進行方法100的步驟106，將裝置晶圓與承載板接合。第2B圖係繪示出將裝置晶圓200倒置且經由黏著層202及302而接合至承載板300上的剖面示意圖，使其能在後續進行薄化及背側製程期間輕易處理裝置晶圓200。第一黏著層302覆蓋第二黏著層302以及承載板300的邊緣區300e。
進行方法100的步驟108，對裝置晶圓的背側進行薄化。第2C圖係繪示出裝置晶圓200進行晶圓薄化製程的剖面示意圖。在貼合至承載板300之後，對裝置晶圓200的無結構(structure-free)區(第二側200b)進行加工至所需的最終厚度。舉例來說，可透過磨削(grinding)、蝕刻及/或磨拋的方式來進行而形成具有既定厚度(取決於半導體封裝使用目的)的薄化晶圓200”。在一實施例中，裝置晶圓200薄化至約5微米至50微米的厚度。在另一實施例中，裝置晶圓200薄化至約25微米至250微米的厚度。
進行方法100的步驟110，在裝置晶圓的背側形成金屬化結構。第2D圖係繪示出在薄化的裝置晶圓200”的第二側200b”上形成金屬化結構204的剖面示意圖。背側的金屬化結構204包括內連結構(例如，重佈線(re-distribution line,RDL))、外部接觸結構(例如，個別的半導體晶片的焊料凸塊(solder bump)或含銅凸塊)及/或作為電源線、電感、電容或任何被動部件的其它結構。金屬化結構204可由電鍍、無電電鍍、濺鍍(sputtering)、化學氣相沉積(chemical vapor deposition)等方法所形成的銅、鋁、銅合金或其他導電材料所構成。
進行方法100的步驟112，將晶片接合至裝置晶圓的背側上。第2E圖係繪示出將複數個晶粒400接合以及電性連接至薄化的裝置晶圓200”的第二側200b”上的金屬化結構400而形成晶粒對晶圓的堆疊402的剖面示意圖。接合方法包括一般所使用的方法，例如氧化層對氧化層接合、氧化層對矽層接合、銅對銅接合、黏著接合以及焊料凸塊接合等等。晶粒400可包括記憶體晶片、射頻(radio frequency,RF)晶片、邏輯晶片、或其他晶片。每一晶粒400具有第一表面及第二表面，且積體電路形成於第一表面上。在一實施例中，晶粒400的第一表面接合至薄化的裝置晶圓200”。在一實施例中，晶粒400的第二表面14b接合至薄化的裝置晶圓200”。
進行方法100的步驟114，將晶粒對晶圓的堆疊進行成型(molding)。第2F圖係繪示出將晶粒對晶圓的堆疊402進行成型製程而形成一成型堆疊402a的剖面示意圖。一成型材料404塗覆於晶粒對晶圓的堆疊402上，且填入相鄰的晶粒400之間的空間。成型製程在薄化的裝置晶圓200”的邊緣保留一未覆蓋區。成型材料404可由固化材料所構成，例如高分子材料、樹脂材料、聚醯亞胺(polyimide)、氧化矽、環氧化物、苯並環丁烯(benzocyclobutene,BCB)、SilkTM (陶式化學公司(Dow Chemical))、或其組合。成型製程包括射出成型、壓縮成型、鋼板印刷、旋轉塗佈或是未來所發展的成型製程。在塗覆成型材料404之後，進行固化或烘烤步驟，以凝固成型材料404。
進行方法100的步驟116，自成型堆疊402a卸離承載板300。第2G至2I圖係繪示出承載板卸離製程的各個階段剖面示意圖。開始進行步驟116的步驟118，透過一清潔方法來去除位於薄化的裝置晶圓200”的邊緣200e的第一黏著層202，以露出承載板300的邊緣區300e以及鄰近於邊緣區300e的第二黏著層302，如第2G圖所示。清潔方法可為化學噴洗(jetting)製程或濕式槽洗(wet bench)製程。進行步驟116的步驟120，去除第二黏著層302。在一實施例中，透過光源406分解來去除第二黏著層302，如第2H圖所示。光源406通往承載板300並穿過承載板300，使第二黏著層302在吸收光能之後被分解。光源406可包括紅外光(IR)、雷射、照射燈等等。在其他實施例中，可透過溶劑分解法來去除第二黏著層302，例如NH4 OH。
通常在完成晶圓級測試之後，進行步驟116的步驟122，分開承載板300及成型堆疊402a，如第2I圖所示。由於第二黏著層302係透過分解或溶劑而去除，因此更容易在不發生損害的情形下自薄化的裝置晶圓200”卸離承載板300。卸離製程可為任何適當的剝離(de-bonding)製程，使薄化的裝置晶圓200”中的半導體結構保有其完整性。舉例來說，利用溶劑、UV照射、或拉脫(pulled off)方式來進行卸離製程，以自第一黏著層202去除承載板300。
進行方法100的步驟124，去除留在薄化的裝置晶圓200”上第一黏著層202。第2J圖係繪示出對簿化的裝置晶圓200”的第一側200a進行晶圓清潔製程以去除第一黏著層202的剖面示意圖。在一實施例中，晶圓清潔製程為濕式製程，以化學剝除第一黏著層302。在其他實施中，可透過熱分解、剝離、電漿清潔、粒劑清潔(pellet cleaning)等等來去除第一黏著層202，因而露出了個別的半導體晶片中用以接合至電性接頭且形成於薄化的裝置晶圓200”的第一側200a的外部接觸。
進行方法100的步驟126，以慣用方法沿著切割道將成型堆疊402a切割成個別的晶粒對晶粒的堆疊408。第2K圖係繪示出複數個晶粒對晶粒的堆疊408的剖面示意圖。在進行切割製程之後，堆疊的晶圓可透過異方性導電膜(anisotropically conductive connection film)而組裝於IC卡上。
裝置晶圓200的一或多個晶粒可具有一或多個基底通孔電極(through substrate via,TSV)形成於內。第3A至3C圖係繪示出根據第1圖及第2A至2K圖的方法來製造具有通孔電極的裝置晶圓的一實施例，其中省略相同或相似部分的解釋說明。
根據方法100的步驟102至106，第3A圖繪示出具有複數個矽通孔電極(through silicon via,TSV)的裝置晶圓200透過黏著層202及302而接合至承載板300的剖面示意圖。
裝置晶圓200包括具有前表面210a及背表面210b的一半導體基底210，其中積體電路及內連結構形成於前表面210a上，且複數個通孔電極220穿過至少一部分的半導體基底210。每一通孔電極220充填金屬的插塞，自前表面210a往背表面210b延伸至一預定深度。通孔電極220可電性連接形成於內連結構240上的接墊260。通孔電極220的製作可在製作”第一層位內連線”(其表示位於接觸窗結構(via structure)與電晶體上方的最底層金屬層間介電(inter-metal dielectric,IMD)層中最底層金屬圖案層)之前進行。另外，金屬填充通孔(metal-filled via)製程可在製作內連線結構之後進行。
根據方法100的步驟108至112，第3B圖繪示出包括複數個矽通孔電極(TSV)的成型堆疊402a的剖面示意圖。在進行背側薄化製程之後，通孔電極220的一端點220a露出及/或突出於薄化的基底210”的背表面210b”，如第2B圖所示。形成背側隔離層250，以覆蓋薄化的晶圓210”的背側。導電結構280，例如焊料凸塊或銅凸塊，形成於通孔電極220的端點220a上方，以接合至晶粒400。導電結構280也包括重佈局層(RDL)及接墊，其可在製作焊料凸塊或銅凸塊之前形成。
根據方法100的步驟114至124，第3C圖繪示出承載板300自承型堆疊402a卸離的剖面示意圖。再將成型材料404塗覆於晶粒對晶圓的堆疊402上方之後，透過一清潔方法來去除位於薄化的裝置晶圓200”邊緣的第一黏著層202，以露出承載板300的邊緣區300e以及鄰近邊緣區300e的第二黏著層302(未繪示於第3C圖)。接著利用光源406來分解去除第二黏著層302，如第2H圖所示。另外，可透過溶劑分解法來去除第二黏著層302。接下來，自成型堆疊402a卸離承載板300而無造成損害。接著進行以下步驟，透過晶圓清潔製程去除餘留於薄化的裝置晶圓200”上的第一黏著層202，例如以濕式製程，化學性剝除第一黏著層202。
以上說明了許多實施例的特徵，雖然所揭示的臨時承載板的使用是有關於TSV裝置晶圓的製作，然而可以理解的是此處所揭示的方法可實施於其他需使用臨時性承載板的應用類型，例如影像感測器、微機電系統(microelectromechanical systems,MEMS)、或其他3DIC應用。
請參照第4圖，其繪示出根據一實施例之垂直式晶粒對晶粒堆疊的製造流程圖，其包括臨時承載板的接合及卸離。請參照第5A至5G圖，其繪示出根據第4圖的方法來製造晶粒對晶粒堆疊的各個階段的一實施例的剖面示意圖，其中省略相同或相似於第1至3圖的解釋說明。
方法500起始於步驟102及104，接著進行步驟106至114，形成以成型材料404封膠的成型堆疊402a，如第5A圖所示。
接著，方法500進行步驟510，自晶粒對晶圓的堆疊402卸離承載板300。第5A至5G圖係繪示出承載板卸離製程的各個階段剖面示意圖。開始進行步驟510的步驟512，微削(trimming)薄化的裝置晶圓200”的邊緣，以形成環繞且鄰近成型堆疊402a邊緣的通道405，如第5B圖所示。透過切割法，例如雷射切割工具，使通道405切穿成型材料404及薄化的裝置晶圓200”，且延伸置一部分的第一黏著層202而未接觸承載板300及/或第二黏著層302。另外，也可使用蝕刻製程來形成通道405。通道405的直徑小於5毫米(mm)。
進行步驟510的步驟514，透過一清潔方法來去除位於薄化的裝置晶圓200”的邊緣200e的第一黏著層202，以露出承載板300的邊緣區300e以及鄰近於邊緣區300e的第二黏著層302，如第5C圖所示。清潔方法可為化學噴洗製程或濕式槽洗製程，用以去除環繞通道405的部分，包括了鄰近成型堆疊402a邊緣的成型材料404、薄化的裝置晶圓200”以及第一黏著層202，因而露出鄰近承載板300的邊緣區300e的第二黏著層302，同樣也露出了承載板300的邊緣區300e。
進行步驟510的步驟516，去除第二黏著層302。在一實施例中，透過光源406分解來去除第二黏著層302，如第5D圖所示。光源406通往承載板300並穿過承載板300，使第二黏著層302在吸收光能之後被分解。光源406可包括紅外光(IR)、雷射、照射燈等等。在其他實施例中，可透過溶劑分解法來去除第二黏著層302。
通常在完成晶圓級測試之後，進行步驟510的步驟518，分開承載板300及晶粒對晶圓的堆疊402，如第5E圖所示。由於第二黏著層302係透過分解或溶劑而去除，因此更容易在不發生損害的情形下自薄化的裝置晶圓200”卸離承載板300。卸離製程可為任何適當的剝離製程，使薄化的裝置晶圓200”中的半導體結構保有其完整性。舉例來說，利用溶劑、UV照射、或拉脫方式來進行卸離製程，以自第一黏著層202去除承載板300。
進行方法500的步驟124，去除留在薄化的裝置晶圓200”上第一黏著層202。第5F圖係繪示出對薄化的裝置晶圓200”的第一側200a進行晶圓清潔製程以去除第一黏著層202的剖面示意圖。在一實施例中，晶圓清潔製程為濕式製程，以化學剝除第一黏著層302。因此，露出了個別的半導體晶片中用以接合至電性接頭且形成於薄化的裝置晶圓200”的第一側200a的外部接觸。進行方法500的步驟126，以慣用方法沿著切割道將成型堆疊402a切割成個別的晶粒對晶粒的堆疊408。第5G圖係繪示出複數個晶粒對晶粒的堆疊408的剖面示意圖。在進行切割製程之後，堆疊的晶圓可透過異方性導電膜組裝於IC卡上。
以上的詳細說明中，本發明係對照其特定實施例作說明。然而，很清楚的是在不脫離本發明之精神和範圍內，當可作出各種更動、結構、製程及改變，如請求保護範圍所述。因此，說明書及圖式係用於範例說明而不是用以限定本發明。可以理解的是本發明能夠使用其他不同的組合與環境，且能夠在此處所表達的發明概念範圍內作改變與更動。
100、500．．．方法
102、104、106、108、112、114、116、118、120、122、124、126、510、512、514、516、518．．．步驟
200．．．裝置晶圓
200”．．．薄化的裝置晶圓
200a．．．第一側
200b、200b”．．．第二側
200e．．．邊緣
202．．．第一黏著層
204．．．金屬化結構
210．．．半導體基底
210”．．．薄化的基底
210a．．．前表面
210b、210”．．．背表面
220．．．通孔電極
220a．．．端點
240．．．內連結構
250．．．背側隔離層
260．．．接墊
280．．．導電結構
300．．．承載板
300e．．．邊緣區
302．．．第二黏著層
400．．．晶粒
402．．．晶粒對晶圓的堆疊
402a．．．成型堆疊
404．．．成型材料
405．．．通道
406．．．光源
408．．．晶粒對晶粒的堆疊
第1圖係繪示出根據一實施例之垂直式晶粒對晶粒堆疊的製造流程圖，其包括臨時承載板的接合及卸離。
第2A至2K圖係繪示出根據第1圖的方法來製造晶粒對晶粒堆疊的各個階段的一實施例的剖面示意圖。
第3A至3C圖係繪示出根據臨時承載板的接合及卸離方法來處理具有通孔電極的裝置晶圓的方法的一實施例的剖面示意圖。
第4圖係繪示出根據一實施例之垂直式晶粒對晶粒堆疊的製造流程圖，其包括臨時承載板的接合及卸離。
第5A至5G圖係繪示出根據第4圖的方法來製造晶粒對晶粒堆疊的各個階段的一實施例的剖面示意圖。
100．．．方法
102、104、106、108、112、114、116、118、120、122、124、126．．．步驟

Claims (10)

  1. 一種堆疊裝置的製造方法，包括：提供一晶圓，其具有一第一表面及與其相對的一第二表面，其中該第一表面上塗覆了一第一黏著層；提供塗覆了一第二黏著層的一承載板，而露出該承載板的一邊緣區；經由該第一黏著層及該第二黏著層將該晶圓的該第一表面接合至該承載板，其中該承載版的該邊緣區被該第一黏著層覆蓋；自該第二表面薄化該晶圓，以形成一薄化的晶圓；將複數個晶粒接合至該薄化的晶圓上；去除鄰近於該薄化的晶圓邊緣的該第一黏著層，而露出該承載板的該邊緣區以及鄰近於該承載板的該邊緣區的該第二黏著層；施加一光能或熱能，以分解該第二黏著層；自該晶圓卸離該承載板；以及去除餘留於該晶圓的該第一表面上的該第一黏著層。
  2. 如申請專利範圍第1項所述之堆疊裝置的製造方法，其中該光能包括紅外光、雷射、或紫外光。
  3. 如申請專利範圍第1項所述之堆疊裝置的製造方法，其中該第一黏著層由濕化學去除型黏著材料所構成。
  4. 如申請專利範圍第1項所述之堆疊裝置的製造方法，其中該第二黏著層由光分解型或熱分解型或溶劑分解型黏著材料所構成。
  5. 一種堆疊裝置的製造方法，包括：提供一晶圓，其具有一第一表面及與其相對的一第二表面，其中該第一表面上塗覆了一第一黏著層；提供塗覆了一第二黏著層的一承載板，而露出該承載板的一邊緣區；經由該第一黏著層及該第二黏著層將該晶圓的該第一表面接合至該承載板，其中該承載版的該邊緣區被該第一黏著層覆蓋；自該第二表面薄化該晶圓，以形成一薄化的晶圓；將複數個晶粒接合至該薄化的晶圓上，以形成一晶粒對晶圓的堆疊；在該晶粒對晶圓的堆疊上形成一成型材料；在鄰近該成型材料的邊緣形成一通道，其中該通道穿過該成型材料、該晶圓的邊緣以及一部分的該第一黏著層；去除該成型材料、該晶圓的邊緣以及該第一黏著層中環繞該通道的部分，而露出該承載板的該邊緣區以及鄰近於該承載板的該邊緣區的該第二黏著層；去除該第二黏著層；自該晶圓卸離該承載板；以及去除餘留於該晶圓的該第一表面上的該第一黏著層。
  6. 如申請專利範圍第5項所述之堆疊裝置的製造方法，其中該通道的直徑小於5毫米。
  7. 如申請專利範圍第5項所述之堆疊裝置的製造方法，其中去除該第二黏著層的步驟包括施加一光能或熱能或溶劑以分解該第二黏著層。
  8. 如申請專利範圍第5項所述之堆疊裝置的製造方法，其中該第一黏著層由濕化學去除型黏著材料所構成。
  9. 一種裝置晶圓的處理方法，包括：提供一裝置晶圓，其包括具有一前表面及一背表面的一半導體基底，其中一填有導電材料的通孔電極形成於該半導體基底內且從該前表面往該被表面延伸入該半導體基底至一深度；在該半導體基底的該前表面形成一第一黏著層，以覆蓋該裝置晶圓的邊緣；提供塗覆了一第二黏著層的一承載板，而露出該承載板的一邊緣區；經由該第一黏著層及該第二黏著層將該裝置晶圓接合至該承載板，其中該承載版的該邊緣區被該第一黏著層覆蓋；自該半導體基底的該背表面薄化該裝置晶圓，以露出該通孔電極的一端點；在該半導體基底的該背表面上方形成一金屬化結構，以電性連接至該通孔電極的該露出的端點；將一晶粒接合至該裝置晶圓上，以電性連接該金屬化結構；去除鄰近該裝置晶圓邊緣的該第一黏著層，以露出該承載板的該邊緣區；去除該第二黏著層； 自該晶圓卸離該承載板；以及去除該第一黏著層。
  10. 如申請專利範圍第9項所述之裝置晶圓的處理方法，其中去除該第二黏著層的步驟為施加一光能或熱能以分解該第二黏著層。
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