TWI442860B - 佈線板及其製造方法 - Google Patents

佈線板及其製造方法 Download PDF

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Publication number
TWI442860B
TWI442860B TW097143010A TW97143010A TWI442860B TW I442860 B TWI442860 B TW I442860B TW 097143010 A TW097143010 A TW 097143010A TW 97143010 A TW97143010 A TW 97143010A TW I442860 B TWI442860 B TW I442860B
Authority
TW
Taiwan
Prior art keywords
semiconductor device
wiring board
dielectric layer
reinforcing member
device mounting
Prior art date
Application number
TW097143010A
Other languages
English (en)
Chinese (zh)
Other versions
TW200934347A (en
Inventor
堀內章夫
橫田泰志
Original Assignee
新光電氣工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 新光電氣工業股份有限公司 filed Critical 新光電氣工業股份有限公司
Publication of TW200934347A publication Critical patent/TW200934347A/zh
Application granted granted Critical
Publication of TWI442860B publication Critical patent/TWI442860B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/692—Ceramics or glasses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H10W72/9445—Top-view layouts, e.g. mirror arrays
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
TW097143010A 2007-11-08 2008-11-07 佈線板及其製造方法 TWI442860B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007290789A JP5224784B2 (ja) 2007-11-08 2007-11-08 配線基板及びその製造方法

Publications (2)

Publication Number Publication Date
TW200934347A TW200934347A (en) 2009-08-01
TWI442860B true TWI442860B (zh) 2014-06-21

Family

ID=40640740

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097143010A TWI442860B (zh) 2007-11-08 2008-11-07 佈線板及其製造方法

Country Status (4)

Country Link
US (1) US8119929B2 (https=)
JP (1) JP5224784B2 (https=)
KR (1) KR101499974B1 (https=)
TW (1) TWI442860B (https=)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
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JP2886415B2 (ja) 1993-05-28 1999-04-26 東洋シヤッター株式会社 建物及び建物の改装方法
JP2886414B2 (ja) 1993-05-28 1999-04-26 東洋シヤッター株式会社 建物及び建物の改装方法
JP2905668B2 (ja) 1993-06-01 1999-06-14 東洋シヤッター株式会社 建物及び建物の改装方法
JP2886417B2 (ja) 1993-06-01 1999-04-26 東洋シヤッター株式会社 建物及び建物の改装方法
JP2886418B2 (ja) 1993-06-01 1999-04-26 東洋シヤッター株式会社 建物及び建物の改装方法
KR100704919B1 (ko) * 2005-10-14 2007-04-09 삼성전기주식회사 코어층이 없는 기판 및 그 제조 방법
US20110084375A1 (en) * 2009-10-13 2011-04-14 Freescale Semiconductor, Inc Semiconductor device package with integrated stand-off
JP2011138869A (ja) * 2009-12-28 2011-07-14 Ngk Spark Plug Co Ltd 多層配線基板の製造方法及び多層配線基板
JP2011138868A (ja) * 2009-12-28 2011-07-14 Ngk Spark Plug Co Ltd 多層配線基板
JP5302234B2 (ja) * 2010-02-08 2013-10-02 ルネサスエレクトロニクス株式会社 半導体装置
JP2011181542A (ja) 2010-02-26 2011-09-15 Ngk Spark Plug Co Ltd 多層配線基板及びその製造方法
US8609995B2 (en) 2010-07-22 2013-12-17 Ngk Spark Plug Co., Ltd. Multilayer wiring board and manufacturing method thereof
TWI419277B (zh) * 2010-08-05 2013-12-11 日月光半導體製造股份有限公司 線路基板及其製作方法與封裝結構及其製作方法
JPWO2012029526A1 (ja) * 2010-08-30 2013-10-28 住友ベークライト株式会社 半導体パッケージおよび半導体装置
WO2012029579A1 (ja) * 2010-08-30 2012-03-08 住友ベークライト株式会社 半導体パッケージおよび半導体装置
JPWO2012029549A1 (ja) * 2010-08-30 2013-10-28 住友ベークライト株式会社 半導体パッケージおよび半導体装置
JP2012069739A (ja) * 2010-09-24 2012-04-05 Shinko Electric Ind Co Ltd 配線基板の製造方法
US9282626B2 (en) * 2010-10-20 2016-03-08 Lg Innotek Co., Ltd. Printed circuit board and method for manufacturing the same
US20130241058A1 (en) * 2012-03-16 2013-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Wire Bonding Structures for Integrated Circuits
JP2014045025A (ja) * 2012-08-24 2014-03-13 Sony Corp 配線基板及び配線基板の製造方法
TWI473552B (zh) * 2012-11-21 2015-02-11 欣興電子股份有限公司 具有元件設置區之基板結構及其製程
US9263376B2 (en) * 2013-04-15 2016-02-16 Intel Deutschland Gmbh Chip interposer, semiconductor device, and method for manufacturing a semiconductor device
US9832860B2 (en) 2014-09-26 2017-11-28 Intel Corporation Panel level fabrication of package substrates with integrated stiffeners
KR102359873B1 (ko) * 2015-06-16 2022-02-08 삼성전자주식회사 패키지 기판 및 이를 포함하는 반도체 패키지
US10177060B2 (en) 2016-10-21 2019-01-08 Powertech Technology Inc. Chip package structure and manufacturing method thereof
KR102894105B1 (ko) * 2020-07-13 2025-12-02 삼성전자주식회사 반도체 패키지
EP4432345B1 (en) * 2023-03-16 2025-05-07 Hitachi Energy Ltd Insulated metal substrate and method for producing an insulated metal substrate
WO2025243529A1 (ja) * 2024-05-24 2025-11-27 株式会社レゾナック 半導体パッケージを製造する方法、半導体パッケージ用熱硬化性接着剤、半導体パッケージ、及び半導体モジュール

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Also Published As

Publication number Publication date
KR20090048328A (ko) 2009-05-13
TW200934347A (en) 2009-08-01
US8119929B2 (en) 2012-02-21
KR101499974B1 (ko) 2015-03-06
JP2009117703A (ja) 2009-05-28
JP5224784B2 (ja) 2013-07-03
US20090126981A1 (en) 2009-05-21

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