TWI473552B - 具有元件設置區之基板結構及其製程 - Google Patents
具有元件設置區之基板結構及其製程 Download PDFInfo
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- TWI473552B TWI473552B TW101143499A TW101143499A TWI473552B TW I473552 B TWI473552 B TW I473552B TW 101143499 A TW101143499 A TW 101143499A TW 101143499 A TW101143499 A TW 101143499A TW I473552 B TWI473552 B TW I473552B
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Description
本發明是有關於一種基板結構及其製程,且特別是有關於一種具有元件設置區之基板結構及其製程。
近年來,隨著電子技術的日新月異,高科技電子產業的相繼問世,使得更人性化、功能更佳的電子產品不斷地推陳出新,並朝向輕、薄、短、小的趨勢設計。在這些電子產品內通常會配置一電路基板,此電路基板用以承載單個或多個電子元件,然而電子元件配置於電路基板上會造成承載面積增加,因而如何將電子元件內藏於電路基板中,已成為當前的關鍵技術。
在習知技術中,內埋元件之基板製程需先應用雷射鑽孔或是機械鑽孔於核心層中形成一開孔,再將內埋元件配置於開孔中。然而,內埋元件需透過接墊與電路基板之線路層電性連接,因而在製程中須於開孔設置處預先形成一圖案化防焊層(solder mask layer),以便進行後續之接墊製作。此製程須與電路基板之其他製程分開製作,提高製程步驟的複雜度,且以雷射進行開孔製作時,其雷射深度的控制需要非常精準,以避免鑽穿防焊層或是有防焊層的殘留,上述問題皆提高了內埋元件之電路基板的製作難度。此外,由於核心層的厚度通常小於100微米(μm),對於現今的防焊技術亦是一大考驗。
本發明提供一種具有元件設置區之基板結構,其製程較為簡單且製程良率較高。
本發明提供一種具有元件設置區之基板製程,其步驟較為簡單且製作出之產品良率較高。
本發明提出一種具有元件設置區之基板結構,其包括一核心層、一第一介電層、一擬線路圖案以及一第二介電層。核心層包括一第一表面、一圖案化金屬層及一元件設置區。圖案化金屬層設置於第一表面上且包括多個接墊,位於元件設置區內。第一介電層設置於核心層上且包括多個開口,分別暴露出接墊。擬線路圖案設置於第一介電層上,且擬線路圖案圍繞元件設置區正投影至第一介電層上之一投影區域的周圍。第二介電層設置於第一介電層上並覆蓋擬線路圖案。第二介電層包括一元件設置槽,對應投影區域貫穿第二介電層,並連通開口以暴露出接墊。
本發明提出一種具有元件設置區之基板製程,其包括下列步驟:首先,提供一核心層。核心層包括一第一表面、一金屬層及一元件設置區。金屬層設置於第一表面上。接著,圖案化金屬層以形成一圖案化金屬層。圖案化金屬層包括多個接墊,位於元件設置區內。接著,形成一第一介電層於第一表面上,第一介電層覆蓋圖案化金屬層。接著,形成一擬線路圖案於第一介電層上。擬線路圖案圍繞元件設置區正投影至第一介電層上之一投影區域的周圍設置。之後,設置一離型膜於第一介電層之投影區域上,離型膜
覆蓋擬線路圖案位於投影區域內之部分。接著,形成一第二介電層於第一介電層上。第二介電層覆蓋離型膜以及擬線路圖案。接著,形成一第一開孔以及多個第二開孔。第一開孔環繞投影區域的周圍並貫穿第二介電層而延伸至擬線路圖案。第二開孔分別貫穿第二介電層而延伸至接墊。之後,令離型膜與第一介電層脫離,以形成一元件設置槽。
在本發明之一實施例中,上述之元件設置槽暴露擬線路圖案位於投影區域的周圍之部份。
在本發明之一實施例中,上述之具有元件設置區之基板結構更包括一電子元件,設置於元件設置槽內,且電子元件與接墊形成電性連接。
在本發明之一實施例中,上述之具有元件設置區之基板結構更包括多個焊線,分別電性連接接墊與電子元件。
在本發明之一實施例中,上述之具有元件設置區之基板結構更包括多個焊球,分別電性連接接墊與電子元件。
在本發明之一實施例中,上述之擬線路圖案的材料包括銅、鈀、鎳、銀。
在本發明之一實施例中,上述之形成第一開孔以及第二開孔的方法包括雷射開孔。
在本發明之一實施例中,上述之具有元件設置區之基板製程更包括設置至少一電子元件於元件設置槽內,且電子元件與接墊形成電性連接。
在本發明之一實施例中,上述之電子元件透過打線接合或覆晶接合的方式與接墊形成電性連接。
基於上述,本發明利用介電層取代習知中核心層上位於元件設置區內之防焊層,使元件設置區內部以及外部之介電層一體成形而可同時形成,因而簡化了習知繁複的基板製程。此外,本發明更將用以阻擋雷射貫穿之擬線路圖案設置於介電層上,而非如習知中之與接墊一同設置於核心層上,因而可避免雷射開孔深度控制不易的問題。因此,本發明確實可簡化具有元件設置區之基板的製程,更可提高其產品之良率。
為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。
圖1A至圖1H是依照本發明之一實施例之一種具有元件設置區之基板製程的剖面示意圖。請先參照圖1A,本實施例之具有元件設置區之基板製程包括下列步驟:首先,提供如圖1A所示之核心層110。核心層110包括一第一表面112、一金屬層114及一元件設置區116。金屬層114設置於第一表面112上。元件設置區116為核心層110表面之一區域,用以設置電子元件之用。值得注意的是,在本實施例中,核心層110為一雙面銅箔核心層,意即,而核心層110的相對兩表面(第一表面112及相對第一表面112之一第二表面113)可各具有一銅箔(如圖1A之金屬層114),並於核心層110的相對兩表面同時進行線路層的製作,以增加生產效率。以下的製作流程將針對核心
層110之第一表面112上的製程做說明,本發明並不對核心層110之第二表面113上的結構以及其製程做限制。
接著,請同時參照圖1A及圖1B,對圖1A中之金屬層114進行一圖案化製程,以形成圖1B所示之圖案化金屬層118。圖案化金屬層118包括多個接墊118a,其中接墊118a位於元件設置區116內。接著,如圖1C所示,形成一第一介電層120於第一表面112上,其中第一介電層120覆蓋圖案化金屬層118,之後再形成一擬線路圖案130於第一介電層120上。擬線路圖案130如圖1C所示圍繞一投影區域122的周圍設置,且部分擬線路圖案130與投影區域122的周圍重疊。在此,投影區域122為圖1B中之元件設置區116正投影至第一介電層120上之區域。
承上述,請接續參照圖1D,設置一離型膜140於第一介電層120之投影區域122上,離型膜140覆蓋擬線路圖案130位於投影區域122內之部分,也就是說,離型膜140覆蓋擬線路圖案130與投影區域122的周圍重疊的部份。請參照圖1E,接著,形成一第二介電層150於第一介電層120上,其中第二介電層150覆蓋離型膜140以及擬線路圖案130。之後則可重複一般多層線路基板之線路層製程,以於第二介電層150上形成多層彼此堆疊之線路層至達到所需要之線路層的層數為止。
請再接續參考圖1F,接著,形成一第一開孔162以及多個第二開孔164。詳細而言,第一開孔162環繞投影區域122的周圍並貫穿第二介電層150而延伸至擬線路圖案
130。也就是說,第一開孔162以擬線路圖案130與投影區域122重疊的部份為輪廓,由基板結構之多層線路層的外表面170一路貫穿至第二介電層150,並延伸至其下方的擬線路圖案130。在本實施例中,形成第一開孔162以及第二開孔164的方法包括雷射開孔,而擬線路圖案130的材料包括銅、鈀、鎳、銀。由於雷射無法穿過銅、鈀、鎳、銀等材料,因此,擬線路圖案130係用以控制雷射貫穿的深度,使第一開孔162框圍出投影區域122並往下貫穿至擬線路圖案130即停止。第二開孔164則分別貫穿第二介電層150而延伸至接墊118a。接墊118a的材料同理亦可為銅、鈀、鎳、銀等材料,以控制雷射貫穿的深度。
之後,請同時參照圖1F及圖1G,令圖1F中之離型膜140與第一介電層120脫離,以形成圖1G之元件設置槽160,以供電子元件設置。一般而言,離型膜140的材料包括環氧樹脂(Epoxy)、聚乙烯(polyethylene,PE)、聚丙烯(Polypropylene,PP)等具有黏性之膠體,但並不以此為限。離型膜140通常為表面具有分離性之薄膜,其與特定的材料在特定的條件下接觸後不具有黏性或僅具有輕微的黏性。本實施例即利用離型膜140易於與第一介電層120脫離的特性,在第一開孔162框圍出投影區域122並往下貫穿至擬線路圖案130後,將離型膜140自第一介電層120剝離,以移除位於離型膜140以上的線路層而形成上述之元件設置槽160。如此,即完成本實施例之具有元件設置區的基板製程。
接著,本實施例更可如圖1H所示,將一電子元件180設置於元件設置槽160內,且電子元件180與接墊118a形成電性連接。在本實施例中,電子元件180例如為一晶片,且電子元件180係透過打線接合的方式與接墊118a形成電性連接,以將電子元件180內埋於基板中。但本發明並不以此為限。在本發明之其他實施例中,電子元件180亦可透過覆晶接合的方式與接墊118a形成電性連接。
依照上述的製程,即可製作出如圖1H所示之具有元件設置區的基板結構100,其包括一核心層110、一第一介電層120、一擬線路圖案130以及一第二介電層150。核心層110包括一第一表面112、一圖案化金屬層118及一元件設置區116。圖案化金屬層118設置於第一表面112上且包括多個接墊118a,接墊118a位於元件設置區116內。第一介電層120設置於核心層110上且包括多個開口124,分別暴露出接墊118a。擬線路圖案130設置於第一介電層120上,擬線路圖案130如圖1C所示圍繞一投影區域122的周圍設置,且部分擬線路圖案130與投影區域122的周圍重疊。值得注意的是,擬線路圖案130與接墊118a並非位於基板結構之同一層內,接墊118a係位於核心層110上,而擬線路圖案130係位於核心層110上方之第一介電層120上。
承上述,第二介電層150設置於第一介電層120上並覆蓋擬線路圖案130。第二介電層150包括一元件設置槽160,對應投影區域122貫穿第二介電層150,並連通開口
124以暴露出接墊118a。在本實施例中,具有元件設置區的基板結構100更可包括多層線路層堆疊於第二介電層150上,線路層的數量依產品的實際需求而定。元件設置槽160則由基板之多層線路層的外表面170一路貫穿至第二介電層150並延伸至其下方的擬線路圖案130,以暴露擬線路圖案130位於投影區域122的周圍之部份。
在本實施例中,具有元件設置區的基板結構100更可包括一電子元件180及多條焊線190,電子元件180設置於元件設置槽160內,並與接墊118a形成電性連接。焊線190分別連接於接墊118a與電子元件180之間,使電子元件180可透過焊線190與接墊118a形成電性連接,以將電子元件180內埋於基板中。但本發明並不以此為限。
圖2是依照本發明之另一實施例之一種具有元件設置區之基板結構的剖面示意圖。請參照圖2,在本實施例中,具有元件設置區的基板結構200亦可以多個焊球290取代焊線190來電性連接電子元件280與接墊218a。也就是說,設置於投影區域222內之電子元件280係利用覆晶接合的方式,透過多個焊球290與接墊218a形成電性連接。
綜上所述,本發明利用介電層取代習知中核心層上位於元件設置區內之防焊層,使元件設置區內部以及外部之介電層一體成形而可同時形成,因而簡化了習知繁複的基板製程。此外,本發明更將用以阻擋雷射貫穿之擬線路圖案設置於介電層上,而非如習知中之與接墊一同設置於核心層上,因而可避免習知過線設計導致雷射開孔深度控制
不易的問題。因此,本發明確實可簡化具有元件設置區之基板的製程,更可提高其產品之良率。
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100、200‧‧‧具有元件設置區之基板結構
110‧‧‧核心層
112‧‧‧第一表面
113‧‧‧第二表面
114‧‧‧金屬層
116‧‧‧元件設置區
118‧‧‧圖案化金屬層
118a、218a‧‧‧接墊
120‧‧‧第一介電層
122、222‧‧‧投影區域
124‧‧‧開口
130‧‧‧擬線路圖案
140‧‧‧離型膜
150‧‧‧第二介電層
160‧‧‧元件設置槽
162‧‧‧第一開孔
164‧‧‧第二開孔
180、280‧‧‧電子元件
190‧‧‧焊線
290‧‧‧焊球
圖1A至圖1H是依照本發明之一實施例之一種具有元件設置區之基板製程的剖面示意圖。
圖2是依照本發明之另一實施例之一種具有元件設置區之基板結構的剖面示意圖。
100‧‧‧具有元件設置區之基板結構
110‧‧‧核心層
112‧‧‧第一表面
116‧‧‧元件設置區
118‧‧‧圖案化金屬層
118a‧‧‧接墊
120‧‧‧第一介電層
122‧‧‧投影區域
124‧‧‧開口
130‧‧‧擬線路圖案
150‧‧‧第二介電層
160‧‧‧元件設置槽
180‧‧‧電子元件
190‧‧‧焊線
Claims (10)
- 一種具有元件設置區之基板結構,包括:一核心層,包括一第一表面、一圖案化金屬層及一元件設置區,該圖案化金屬層設置於該第一表面上且包括多個接墊,該些接墊位於該元件設置區內;一第一介電層,設置於該核心層上且包括多個開口,分別暴露出該些接墊;一擬線路圖案,設置於該第一介電層上,且該擬線路圖案圍繞該元件設置區正投影至該第一介電層上之一投影區域的周圍;以及一第二介電層,設置於該第一介電層上並覆蓋該擬線路圖案,該第二介電層包括一元件設置槽,對應該投影區域貫穿該第二介電層,並連通該些開口以暴露出該些接墊。
- 如申請專利範圍第1項所述之具有元件設置區之基板結構,其中該元件設置槽暴露該擬線路圖案位於該投影區域的周圍之部份。
- 如申請專利範圍第1項所述之具有元件設置區之基板結構,更包括:一電子元件,設置於該元件設置槽內,且該電子元件與該些接墊形成電性連接。
- 如申請專利範圍第3項所述之具有元件設置區之基板結構,更包括:多個焊線,分別電性連接該些接墊與該電子元件。
- 如申請專利範圍第3項所述之具有元件設置區之 基板結構,更包括:多個焊球,分別電性連接該些接墊與該電子元件。
- 如申請專利範圍第1項所述之具有元件設置區之基板製程,其中該擬線路圖案的材料包括銅、鈀、鎳、銀。
- 一種具有元件設置區之基板製程,包括:提供一核心層,該核心層包括一第一表面、一金屬層及一元件設置區,該金屬層設置於該第一表面上;圖案化該金屬層以形成一圖案化金屬層,該圖案化金屬層包括多個接墊,位於該元件設置區內;形成一第一介電層於該第一表面上,該第一介電層覆蓋該圖案化金屬層;形成一擬線路圖案於該第一介電層上,該擬線路圖案圍繞該元件設置區正投影至該第一介電層上之一投影區域的周圍設置;設置一離型膜於該第一介電層之該投影區域上,該離型膜覆蓋該擬線路圖案位於該投影區域內之部分;形成一第二介電層於該第一介電層上,該第二介電層覆蓋該離型膜以及該擬線路圖案;形成一第一開孔以及多個第二開孔,該第一開孔環繞該投影區域的周圍並貫穿該第二介電層而延伸至該擬線路圖案,該些第二開孔分別貫穿該第二介電層而延伸至該些接墊;以及令該離型膜與該第一介電層脫離,以形成一元件設置槽。
- 如申請專利範圍第7項所述之具有元件設置區之基板製程,其中形成該第一開孔以及該些第二開孔的方法包括雷射開孔。
- 如申請專利範圍第7或8項所述之具有元件設置區之基板製程,更包括:設置至少一電子元件於該元件設置槽內,且該電子元件與該些接墊形成電性連接。
- 如申請專利範圍第9項所述之具有元件設置區之基板製程,其中該電子元件透過打線接合或覆晶接合的方式與該些接墊形成電性連接。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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TW101143499A TWI473552B (zh) | 2012-11-21 | 2012-11-21 | 具有元件設置區之基板結構及其製程 |
US13/740,286 US9258908B2 (en) | 2012-11-21 | 2013-01-14 | Substrate structure having component-disposing area and manufacturing process thereof |
US14/963,263 US9646852B2 (en) | 2012-11-21 | 2015-12-09 | Manufacturing process for substrate structure having component-disposing area |
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US9258908B2 (en) | 2016-02-09 |
TW201422082A (zh) | 2014-06-01 |
US9646852B2 (en) | 2017-05-09 |
US20140138130A1 (en) | 2014-05-22 |
US20160093514A1 (en) | 2016-03-31 |
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