TWI405298B - 在包含soi及矽塊區域的半導體元件中形成sti的方法 - Google Patents

在包含soi及矽塊區域的半導體元件中形成sti的方法 Download PDF

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Publication number
TWI405298B
TWI405298B TW094119364A TW94119364A TWI405298B TW I405298 B TWI405298 B TW I405298B TW 094119364 A TW094119364 A TW 094119364A TW 94119364 A TW94119364 A TW 94119364A TW I405298 B TWI405298 B TW I405298B
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TW
Taiwan
Prior art keywords
region
soi
sti
etching
layer
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TW094119364A
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English (en)
Chinese (zh)
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TW200601489A (en
Inventor
史坦格瓦特麥可D
庫瑪馬漢德
何赫伯特L
道伯茲斯凱大衛M
法特梅爾強納森E
潘德雷頓丹尼斯
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萬國商業機器公司
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Publication of TW200601489A publication Critical patent/TW200601489A/zh
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Publication of TWI405298B publication Critical patent/TWI405298B/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/69Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/692Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their composition, e.g. multilayer masks or materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/061Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/17Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
TW094119364A 2004-06-16 2005-06-10 在包含soi及矽塊區域的半導體元件中形成sti的方法 TWI405298B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/710,060 US7118986B2 (en) 2004-06-16 2004-06-16 STI formation in semiconductor device including SOI and bulk silicon regions

Publications (2)

Publication Number Publication Date
TW200601489A TW200601489A (en) 2006-01-01
TWI405298B true TWI405298B (zh) 2013-08-11

Family

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Family Applications (1)

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TW094119364A TWI405298B (zh) 2004-06-16 2005-06-10 在包含soi及矽塊區域的半導體元件中形成sti的方法

Country Status (6)

Country Link
US (2) US7118986B2 (https=)
EP (1) EP1782473A4 (https=)
JP (1) JP5004791B2 (https=)
CN (1) CN100452409C (https=)
TW (1) TWI405298B (https=)
WO (1) WO2006009613A2 (https=)

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US8014200B2 (en) 2008-04-08 2011-09-06 Zeno Semiconductor, Inc. Semiconductor memory having volatile and multi-bit, non-volatile functionality and methods of operating
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Also Published As

Publication number Publication date
CN100452409C (zh) 2009-01-14
CN1954435A (zh) 2007-04-25
US7394131B2 (en) 2008-07-01
US7118986B2 (en) 2006-10-10
JP5004791B2 (ja) 2012-08-22
EP1782473A2 (en) 2007-05-09
TW200601489A (en) 2006-01-01
US20050282392A1 (en) 2005-12-22
US20060244093A1 (en) 2006-11-02
JP2008503872A (ja) 2008-02-07
WO2006009613A2 (en) 2006-01-26
WO2006009613A3 (en) 2006-04-13
EP1782473A4 (en) 2010-03-17

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