CN100452409C - 在包括soi和体硅区域的半导体器件中sti的形成 - Google Patents

在包括soi和体硅区域的半导体器件中sti的形成 Download PDF

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Publication number
CN100452409C
CN100452409C CNB2005800153951A CN200580015395A CN100452409C CN 100452409 C CN100452409 C CN 100452409C CN B2005800153951 A CNB2005800153951 A CN B2005800153951A CN 200580015395 A CN200580015395 A CN 200580015395A CN 100452409 C CN100452409 C CN 100452409C
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China
Prior art keywords
silicon
etching
trench isolation
insulator
buried
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Expired - Fee Related
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CNB2005800153951A
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English (en)
Chinese (zh)
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CN1954435A (zh
Inventor
M·施泰格瓦尔特
M·库马尔
H·L·霍
D·多布任斯基
J·法尔特迈尔
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Core Usa Second LLC
GlobalFoundries Inc
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International Business Machines Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/692—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their composition, e.g. multilayer masks or materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
CNB2005800153951A 2004-06-16 2005-06-06 在包括soi和体硅区域的半导体器件中sti的形成 Expired - Fee Related CN100452409C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/710,060 2004-06-16
US10/710,060 US7118986B2 (en) 2004-06-16 2004-06-16 STI formation in semiconductor device including SOI and bulk silicon regions

Publications (2)

Publication Number Publication Date
CN1954435A CN1954435A (zh) 2007-04-25
CN100452409C true CN100452409C (zh) 2009-01-14

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CNB2005800153951A Expired - Fee Related CN100452409C (zh) 2004-06-16 2005-06-06 在包括soi和体硅区域的半导体器件中sti的形成

Country Status (6)

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US (2) US7118986B2 (https=)
EP (1) EP1782473A4 (https=)
JP (1) JP5004791B2 (https=)
CN (1) CN100452409C (https=)
TW (1) TWI405298B (https=)
WO (1) WO2006009613A2 (https=)

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CN110416152A (zh) * 2019-07-26 2019-11-05 上海华虹宏力半导体制造有限公司 深槽隔离结构及工艺方法

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US8547756B2 (en) 2010-10-04 2013-10-01 Zeno Semiconductor, Inc. Semiconductor memory device having an electrically floating body transistor
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US8159868B2 (en) 2008-08-22 2012-04-17 Zeno Semiconductor, Inc. Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating
US8194451B2 (en) 2007-11-29 2012-06-05 Zeno Semiconductor, Inc. Memory cells, memory cell arrays, methods of using and methods of making
US8514622B2 (en) 2007-11-29 2013-08-20 Zeno Semiconductor, Inc. Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
US8077536B2 (en) 2008-08-05 2011-12-13 Zeno Semiconductor, Inc. Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle
US8053327B2 (en) * 2006-12-21 2011-11-08 Globalfoundries Singapore Pte. Ltd. Method of manufacture of an integrated circuit system with self-aligned isolation structures
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US9230651B2 (en) 2012-04-08 2016-01-05 Zeno Semiconductor, Inc. Memory device having electrically floating body transitor
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US8130548B2 (en) * 2007-11-29 2012-03-06 Zeno Semiconductor, Inc. Semiconductor memory having electrically floating body transistor
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US8014200B2 (en) 2008-04-08 2011-09-06 Zeno Semiconductor, Inc. Semiconductor memory having volatile and multi-bit, non-volatile functionality and methods of operating
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US10461084B2 (en) 2010-03-02 2019-10-29 Zeno Semiconductor, Inc. Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
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CN107331416B (zh) 2012-02-16 2020-11-10 芝诺半导体有限公司 包括初级和二级电晶体的存储单元
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Also Published As

Publication number Publication date
CN1954435A (zh) 2007-04-25
US7394131B2 (en) 2008-07-01
US7118986B2 (en) 2006-10-10
JP5004791B2 (ja) 2012-08-22
EP1782473A2 (en) 2007-05-09
TW200601489A (en) 2006-01-01
US20050282392A1 (en) 2005-12-22
US20060244093A1 (en) 2006-11-02
TWI405298B (zh) 2013-08-11
JP2008503872A (ja) 2008-02-07
WO2006009613A2 (en) 2006-01-26
WO2006009613A3 (en) 2006-04-13
EP1782473A4 (en) 2010-03-17

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