TWI282113B - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device Download PDF

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Publication number
TWI282113B
TWI282113B TW093140274A TW93140274A TWI282113B TW I282113 B TWI282113 B TW I282113B TW 093140274 A TW093140274 A TW 093140274A TW 93140274 A TW93140274 A TW 93140274A TW I282113 B TWI282113 B TW I282113B
Authority
TW
Taiwan
Prior art keywords
entire entire
semiconductor device
forming
volatile memory
transistor
Prior art date
Application number
TW093140274A
Other languages
English (en)
Chinese (zh)
Other versions
TW200603209A (en
Inventor
Koji Takahashi
Shinichi Nakagawa
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of TW200603209A publication Critical patent/TW200603209A/zh
Application granted granted Critical
Publication of TWI282113B publication Critical patent/TWI282113B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/44—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a control gate layer also being used as part of the peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW093140274A 2004-07-06 2004-12-23 Method for manufacturing semiconductor device TWI282113B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004198888A JP2006024598A (ja) 2004-07-06 2004-07-06 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW200603209A TW200603209A (en) 2006-01-16
TWI282113B true TWI282113B (en) 2007-06-01

Family

ID=35058439

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093140274A TWI282113B (en) 2004-07-06 2004-12-23 Method for manufacturing semiconductor device

Country Status (6)

Country Link
US (2) US7541236B2 (enExample)
EP (1) EP1615266A3 (enExample)
JP (1) JP2006024598A (enExample)
KR (1) KR100691701B1 (enExample)
CN (1) CN100380632C (enExample)
TW (1) TWI282113B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1818989A3 (en) * 2006-02-10 2010-12-01 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor storage device and manufacturing method thereof
EP1837917A1 (en) * 2006-03-21 2007-09-26 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
TWI416738B (zh) * 2006-03-21 2013-11-21 Semiconductor Energy Lab 非揮發性半導體記憶體裝置
US7554854B2 (en) * 2006-03-31 2009-06-30 Semiconductor Energy Laboratory Co., Ltd. Method for deleting data from NAND type nonvolatile memory
US8022460B2 (en) * 2006-03-31 2011-09-20 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile semiconductor memory device
JP4975398B2 (ja) * 2006-08-30 2012-07-11 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US7813158B2 (en) * 2007-05-14 2010-10-12 Hong Kong Applied Science And Technology Research Institute Co., Ltd. Recordable electrical memory
JP2010272649A (ja) * 2009-05-20 2010-12-02 Panasonic Corp 半導体装置及びその製造方法
US20140030860A1 (en) * 2012-07-24 2014-01-30 Eon Silicon Solution, Inc. Manufacturing method of tunnel oxide of nor flash memory

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4646425A (en) * 1984-12-10 1987-03-03 Solid State Scientific, Inc. Method for making a self-aligned CMOS EPROM wherein the EPROM floating gate and CMOS gates are made from one polysilicon layer
CA2004436C (en) 1989-12-01 1999-06-29 Alain Comeau Test chip for use in semiconductor fault analysis
JPH03214778A (ja) * 1990-01-19 1991-09-19 Sharp Corp 半導体記憶装置の動作方法
JP2976693B2 (ja) 1992-05-08 1999-11-10 日本電気株式会社 Ｃｍｏｓ型半導体集積回路
US5292681A (en) * 1993-09-16 1994-03-08 Micron Semiconductor, Inc. Method of processing a semiconductor wafer to form an array of nonvolatile memory devices employing floating gate transistors and peripheral area having CMOS transistors
JPH0870056A (ja) * 1994-08-31 1996-03-12 Toshiba Corp 半導体記憶装置
JP2982862B2 (ja) 1996-07-17 1999-11-29 日本電気株式会社 半導体装置
JP2924832B2 (ja) * 1996-11-28 1999-07-26 日本電気株式会社 半導体装置の製造方法
JP3887064B2 (ja) * 1997-05-15 2007-02-28 株式会社東芝 不揮発性半導体記憶装置
JP3221369B2 (ja) * 1997-09-19 2001-10-22 日本電気株式会社 不揮発性半導体記憶装置及びその製造方法
JP3528575B2 (ja) * 1998-02-17 2004-05-17 セイコーエプソン株式会社 不揮発性半導体記憶装置及びその製造方法
JP2000150666A (ja) * 1998-11-05 2000-05-30 Nec Corp 半導体装置及びその製造方法
JP4398541B2 (ja) 1999-06-30 2010-01-13 東芝メモリシステムズ株式会社 不揮発性半導体メモリ
JP3467479B2 (ja) * 2000-05-19 2003-11-17 松下電器産業株式会社 不揮発性半導体記憶装置
JP2002064190A (ja) * 2000-08-18 2002-02-28 Mitsubishi Electric Corp 半導体装置
JP2002246562A (ja) * 2001-02-15 2002-08-30 Toshiba Corp 半導体記憶装置
US7084437B2 (en) * 2001-10-31 2006-08-01 International Business Machines Corporation Semiconductor device
JP5179692B2 (ja) 2002-08-30 2013-04-10 富士通セミコンダクター株式会社 半導体記憶装置及びその製造方法
JP4338495B2 (ja) * 2002-10-30 2009-10-07 富士通マイクロエレクトロニクス株式会社 シリコンオキシカーバイド、半導体装置、および半導体装置の製造方法
JP2004193282A (ja) * 2002-12-10 2004-07-08 Renesas Technology Corp 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
EP1615266A2 (en) 2006-01-11
JP2006024598A (ja) 2006-01-26
US7541236B2 (en) 2009-06-02
US7910431B2 (en) 2011-03-22
US20080220573A1 (en) 2008-09-11
KR20060003815A (ko) 2006-01-11
TW200603209A (en) 2006-01-16
CN1719597A (zh) 2006-01-11
KR100691701B1 (ko) 2007-03-09
EP1615266A3 (en) 2014-01-29
CN100380632C (zh) 2008-04-09
US20060008995A1 (en) 2006-01-12

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MM4A Annulment or lapse of patent due to non-payment of fees