TW533523B - Package of semiconductor and manufacture method thereof - Google Patents

Package of semiconductor and manufacture method thereof Download PDF

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Publication number
TW533523B
TW533523B TW091105691A TW91105691A TW533523B TW 533523 B TW533523 B TW 533523B TW 091105691 A TW091105691 A TW 091105691A TW 91105691 A TW91105691 A TW 91105691A TW 533523 B TW533523 B TW 533523B
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TW
Taiwan
Prior art keywords
electrode
dual
substrate
protruding
semiconductor wafer
Prior art date
Application number
TW091105691A
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English (en)
Inventor
Kazuhiko Terashima
Original Assignee
Citizen Watch Co Ltd
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Publication date
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Publication of TW533523B publication Critical patent/TW533523B/zh

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Description

533523
[發明所屬技術領域] 本發明係有關將具有突起電極之半導體晶片封裝於才目 對偶之配線基板上面成之半導體裝置之封裝體及其製造方 法。 [先行之技術] 將具有突起電極之半導體元件封裝於相對偶之配、線美 板上時’在半導體元件與配線基板之間介在熱固性之膠人 用絕緣樹脂’將半導體元件之突起電極壓在配線基板上， 使該配線基板及該配線基板上之電極塑性變形或彈性變开^ 成凹形狀，以使半導體元件電性連接於配線基板上之電 極’已揭示於曰本特開平4-8224 1號公報及日本特開平 11-284022號公報。此半導體元件之突起電極，由金（Au) 等金屬材料，以電鍍等方法形成在半導體元件上之銲墊電 極上面0 極壓在配線基板時 所壓而變形之配線 有無法獲得安定之 如此形成之突起 形狀，所以將突起電 之形狀與該突起電極 狀不完全套合，以致 [發明之揭示] 本發明之目的在 晶片封裝於表面設有 對偶電極，可充分地 接，且信賴性高之半 為達成上述目的 突起電極之前端之 ’突起電極之前端 基板上之電極之形 電性連接之情形。 突起電極之半導體 板時，不致損及該 偶電極之電性連 及其製造方法。 於提供一種將具有 對偶電極之對偶基 進行突起電極與對 導體裝置之封裝體 ，本發明之半導體
第5頁 533523 五、發明說明（2) 備：具有突起電極之半導體晶片；在其一面形成與上述凸 起電極之端面相接觸之對偶電極之樹脂製對偶基板；以及 介於上述半導體晶片與上述對偶基板之間之絕緣性之熱可 塑性、熱固丨生或光固性之膠合劑。而且，上述突起電極係 做成芯部與在該芯部之上方與該芯部不同之凸形狀之電極 端部之雙層構造。 構成突起電極之電極端部，係經由加熱構成電極端部 之材料，即可开》成按照該材料之量之圓形，所以可容易調 整適合於對偶基板及對偶電極之材質者。因而，突起電極 與對偶電極可確實的電性連接。 [實施發明之最佳形態] 茲參照第1圖及第3 A圖至第3 D圖，說明本發明之半導 體裝置的封裝體之第一實施形態。 第1圖中，於厚度〇.3至1.〇·程度之矽單結晶基板1上 形成有，有源元件、邏輯電路與電路配線等之半導體積體 電路。而以此基板1，設在該基板丨上之銲墊電極2及保護 膜3構成半導體晶片20。銲墊電極2，係將形成於基板1上 之半導體積體電路之電源及訊號系統配線連接到外部。保 護膜3，係在與銲墊電極2之對偶部位具有開口部，以保護 形成於基板1上之半導體積體電路。 而且，在辉墊電極2與其外側周圍之保護膜3上，形成 有突起電極5。此突起電極5之上部端面為，其中央部以圓 形狀鼓起之凸形狀（球面之一部分）。 此半導體晶片20上之突起電極5，係透過在由半導體
533523 五、發明說明（3) 由Λ脂所形成之對偶基板9之間所充填之絕緣性 狀離ΐ 基板9之對偶電極8以電性連接。在此 上：：之LL圖所示’對偶基板9係對應於突起電極5之 細曲之凸形狀而變形為凹形狀。 對偶Α^第1圖之封裝體，首先，要在半導體晶片2 0或 fff板9之任何一方塗敷絕緣性膠合劑7。其次，以針偶 基板9之材料之玻璃轉移溫度人 Μ m AU ^ ^ 且以絕緣性膠合 之溫度，並在使低壓合應力維持一 二壓合條件下’使半導體晶片20上之突起持電 電極8密合。由於此突起電極5密合…ί 極8 而在對偶基板9與對偶雷；^ 8存彡士、士 &丨+ 之端面之Λ π也 成有對應於突起電極5 部。其結果，由於突起電極5之凸形 狀之知面與形成於對偶電極8之凹部之繫合，而半 片2 0係與對偶電極8以電性連接。 曰曰 要形成突起電極5，首先，在阻擋金屬層4之上芦來 广〇層5b，然後形成電極端部5a。芯層讣，係使用^ ^ 部5 a融點為高之全屬材铜_ $極 融，可將端部53選擇性炼 Γ=ί為大致球面之一部分。由於將電極端部二球 之半徑做成較大，以致突起電極5之高度不足時， I:::層高2之厚度加大’即可將突起電…度- 5亦^者嘍纟突起電極5之最上I，形&突起電極被覆膜 5。亦可。透過此突起電極被覆膜5c，不但可防止突起電膜極
533523
5表面之氧化，且可達成與對偶電極8之良好的連接。 之材率之Λ極且端較部對 之姑粗，如^為較對基板材枓之以為高融點 ’· ’導電性良好之金（Au)、銀（Ag)、錫)、 鎳（Ni)、鉛（Pb)等之金屬類或含有此等金屬類之塑 將具有如上述材料之電極端部5a之突起電極5，在 加熱壓合條件下加熱壓合於對偶基 ^ ，壓合應力被對偶基板9吸收而適度乂作用 板9塑性變形而形成凹部。其結果，於疋對偶基 J形狀之狀態T，可獲得與對偶電極大8= = ^^ 接。如將形成於對偶基板9之凹部的深度 好的連 則即使在突起電極5有i至2 # m之高私m程度， 補正。 回度偏差，仍可將其吸收 對偶基板9，係由絕緣性或平滑 枒脂材料，或熱固性之樹脂材料構成為'c之熱塑性之 ^9係由具有較使用於突起電極5之材料融，對偶基 物更佳。例如’可使用聚 的以之 曰曰♦合物等之熱塑性樹脂，或 ♦乙喊磺或液 樹脂所構成之薄板或薄膜。此等醯亞胺等之熱固性 填劑或在表面設置氣體阻擋層亦^。曰料可按需要添加充 阳且，為使對偶基板9與對偶電 起電極5之端面形狀（凸形狀）， 谷易形成對應；$ 使用例如導電性或拉伸性良好之、電極8之材料上， (Al)、鋼（Cu)、鎳（Nl)、金（Au)耸以下之膜厚之銘 、金屬膜或含有此^ 533523 五、發明說明（5) — ----- 屬之組成物所形成之單層或多層膜為佳。如使用在厚产 /Z m以下之Cu膜之上層疊一層膜厚以下之Au膜之多又择 膜則更佳。 曰 又’使2在？晶顯示裝置之透明電極之中，將1 // m以 下之膜厚之、*錫氧化物（以下稱為丨τ〇)之膜用做對偶電極 較佳。而^，於使用上述ΙΤ〇膜時，為降低連接電阻， 其上層再疊上膜厚1 v m以下之鋁（Α1)、銅（Cu)、金（Au) 之金屬膜或含有此等金屬之組成物所形成之單層或多層之 膜亦可。 曰 絕緣性膠合劑7，最好係將半導體晶片2〇黏固於對偶 基板9之後，可在突起電極5之融點以下，且以對偶基板g 之材料之Tg以下之加熱壓合溫度可充分硬化之材料。 以，絕緣性膠合劑7之材料雖可使用熱塑性、熱固性、 固性等之樹脂組成物，但最好係使用對偶基板9之U以下 之溫度域内可硬化之熱固性樹脂組成物，具體言之，使用 ==I、氰基甲酸乙酯（urethane)、環氧等之樹脂組成物 對I於將半導體晶片2 0黏固於對偶基板9之方法，之前已 膠人t f導體晶片2〇或對偶基板9之任何一方塗敷絕緣性 加熱二人，然後將半導體晶片2 〇之突起電極5與對偶基板9 壓it β之方法做說明，但，取代其，而在將突起電極5 可。、對偶電極8之後，充填絕緣性膠合劑7，使其硬化亦 再者， 為防止金屬材料之相互擴散，在構成半導體晶
第9頁 533523 五、發明說明（6) 片2 0之鋅墊電極2與突起電極5之間，設置卩且擋金屬層4亦 〇 ，ί照第3A圖至第3D圖說明第1圖之半導體裝置 的封裝體之製造方法之—例。 ι_在基板上之銲塾電極卜 .^ ^ _ (第3A圖）· 上形成突起電極之芯層及電極端部 矽單結晶基板1上开彡士 + 與保護膜3。保護膜3，;成成半導體晶片之銲塾電極2 雜。 $成僅露出銲墊電極2表面之形 ^2，I保遵膜3與銲墊電極2之表面全領域，以 ;。A / 、旱：’、、〇 . 5 “ m之T i / W組成膜，亦即阻擋金屬層 古。邶、^，在阻擋金屬層4之上層，除了銲墊電極2之上 方部分以外之領域，以昭相平 电ί z乙上 成電鍍阻擋膜10。 … 版法（PhotoUthograhy)形 阻心声4未Λ1/阻撞膜10所覆蓋之銲墊電極2上方之 用/Λ’以該阻播金屬層4作為共同電極膜使 5用匕之電鑛法，使成長厚度20㈣之鋼(Cu)，以形成怒層 而且，將具有較总層审， /^L(Pb)-R/d^ ”、、為低之金屬亦即錫（S η ) 電二i: 以阻擋金屬層4為共同電極膜使用之 電錢使其成長，以形成電極端部5 a。 經由以上之過程，獲得第3A圖所示 2.將突起電極之端面（與對偶電極 冓C。 (大致球面之-部分之形狀）（第接面）形成凸形狀
W3523 發明說明（7) 置2〇ίί，ft熱到2〇〇t之熱板上，將石夕單結晶基板1放 * 20秒知。於疋，透過由矽單結晶基板所傳來之埶，僅 電極5之電極端部5a溶解，由於其表面張力使得電極 球：之I ί變形成大致球面之一部分。該電極端部5a之 :“!：；：：金屬電鑛量，則曲率半徑變大，可形^為 量時之電極端部53。相反的，增加金屬電鍍 之曲電極端部5a之高度’惟突起電極5端* 出〇 之ΐ電極端部5a之表面’以電鍍法，冑由使成長 • 厗度之金之突起電極膜5c而形成。 3形過程’獲得第3B圖所示之構造體。 .備犬起電極之半導體晶片（第3C圖）： 第3B圖中所^】t ^上^售之阻擔膜（resist)剝離液，將 金屬層4外露。仏-之鍍阻擋膜1 0予以除去，以使阻擋 刻。/、 將八外鉻之阻擋金屬層4，以雙氧水予以蝕 4·使獲得第扣圖所示之構造體。 入7^ %極5電性連接於斟彼+丄 首先，在由厚产" 極8(第则）： 基板9上’以激射法V成二聚:炭酸醋樹脂所做成之對偶 版法做成所需圖案之對偶電極0 88QMmiIT0膜，並以照相平 接下來，在對偶基板9之表面（被封裝面）塗上未硬化
533523 、發明說明（8) 狀悲之％氧樹脂組成物之絕緣性膠合劑7。 _其次’將半導體晶片（由銲墊電極2及保護膜3所構成） =^起電極5 ’以1 30它，40 kg/cm2緩慢加熱壓合於對偶基 之對偶電極8，並維持此狀態2分鐘。其結果，在對偶 土板9與&對偶電極8上，相對應於突起電極5之前端形狀形 $有凹部於是，透過形成凸形狀（形成球面之一部分之 开y狀）之大起電極5與對偶電極8之凹部繫合，使兩電極5、 8可進行確實之電性連接。 在此同時，使絕緣性膠合劑7充分地硬化，以使半導 體晶片（銲墊電極2及保護膜3)與對偶基板9堅固地膠合。 由於以上之過程’完成第1圖所示之封裝體。 本發明之封裝體之突起電極5，因其端面大致呈球面 之一部分之形狀，所以在將半導體晶片上之突起電極5加 熱壓合於對偶基板9上之對偶電極8之過程之初期階段，可 容易將未硬化之絕緣性膠合劑7由兩電極5、8之接合面排 擠出，所以，其結果，兩電極5、8之接合面能直接（不致 於有膠合劑7存在）接合。 上述之例，將未硬化狀態之環氧樹脂組成物之絕緣性 膠合劑7供給於對偶基板9之表面（被封裝面）之時程，係在 使半導體晶片上之突起電極5密合於對偶基板9上之對偶電 極8之前。取而代之，使半導體晶片上之突起電極5與對偶 基板9上之對偶電極8先行密合，然後將未硬化之液狀絕緣 性膠合劑7，以分配法（diSpense)供給於半導體晶片與 偶基板9之間，並進打半導體晶片相對於對偶基板9之加熱
313533.ptd 第12頁 533523 五、發明說明（9) 壓合工程，以使兩電極5、8連接亦可。 按本發明之方法以製造半導體裝置之封裝體時，即使 將溫度、壓合應力設定較低，仍可達成良好的電性連接。 因而，在由樹脂所做成之對偶基板9上，封裝本發明之半 導體裝置之封裝體時，可極力抑止對偶基板9上面之對偶 電極之毀損。隨之，根據本發明，可提供能對應高密度封 裝之半導體裝置之封裝體。 兹參照第2圖及第4A圖至第4C圖以及第5A圖至第5C 圖’說明本發明之半導體裝置之封裝體之第二實施形態。 第2圖所示半導體裝置之封裝體，其突起電極5之芯層 5 b為階梯狀之點，與第1圖所示封裝體不同。以下說明其 製造方法。 1.在基板之銲墊電極上，形成突起電極之芯層（第4 A圖）： 以與製造第1圖之封裝體時所用之相同方法，形成銲 塾電極2、保護膜3、阻擋金屬層4及芯層5b。 亦即’包括保護膜3與銲墊電極2之表面全領域，以賤 射法形成阻擋金屬層4。並且，在此阻擋金屬層4之上層， 除了銲塾電極2之上方部分以外之領域，以照相平版法形 成電鍍阻擋膜（第4 A圖中未圖示）。然後，在未被電鍍阻擔 膜覆蓋之銲墊電極2之上方之阻擋金屬層4上面，以此阻播 金屬層4作為共同電極膜使用之電鍍法，使成長厚度2〇/z: 之銅，於是形成芯層5b。然後，使用阻擋膜剝離液除去電 鍵阻擋膜，並將外露之部分（亦即，未被芯層5 b覆蓋之部 分）之阻擋金屬層4以雙氧水予以蝕刻，而獲得第4 A圖所示
533523 五、發明說明（ίο) 之構造體。 2. 電鍍阻擋膜之形成（第4B圖）： 在第4A圖所示之構造體，再以旋轉塗敷法塗敷正型阻 擋膜，以在保護膜3及芯層5b上面形成電鍍阻擋膜10，於 是獲得第4B圖所示之構造體。 3. 階梯狀阻擋膜圖案之形成（第4C圖）： 將第4B圖之構造體中之電鍍阻擋膜10，使用鉻材料之 照相平版罩（未圖示）予以蝕刻。在此照相平版罩上面照射 由曝光光源所射出之紫外線，透過紫外線光量之程度以控 制阻擋膜之分解，使電鍍阻擋膜1 0之， 第一領域1 0 a係以餘刻除去，使芯層5 b完全外露， 第二領域1 Ob係蝕刻到中途，使芯層5b形成以膜厚薄 之電鍍阻擋膜1 0覆蓋之狀態， 第三領域1 0 c係成為不予蝕刻之領域。 上述第一領域1 0 a及第二領域1 0 b，係在芯層5 b上方之 領域，而第三領域1 0 c，則是逸出芯層5 b上方之領域。 4 _芯層之蝕刻（第5 A圖）： 對第4C圖之構造體進行乾式蝕刻。由於此乾式蝕刻， 在使芯層5b外露之第一領域1 0a時，從乾式蝕刻之初期階 段，開始芯層5b之蝕刻，此外，膜厚薄之電鍍阻擋膜1 0所 覆蓋之第二領域1 Ob，則以乾式蝕刻使其膜厚薄之電鍍阻 擋膜1 0消失，然後開始芯層5b之蝕刻。 由於以上之乾式蝕刻而獲得具有階梯狀之芯層5b之第 5A圖之構造體。
313533.ptd 第14頁 533523 五、發明說明（11) 第5A圖之構造體之芯層51)雖階數為2，但，要給予芯 層5 b有3個以上之階數時’則使用具有可變更三階段以上 之紫外線遮光量之圖案之照相平版罩即可。 5 ·在階梯狀之怒層形成電極端部（第5 B圖）： 如第5B圖所示，以電觸電鍍法，使電極端部5a等方向 成長。 6·突起電極皮膜之形成（第5C圖） 以與第一 5 a做成圓 得第5C圖 如以上所 電極形成 上之電極 調整成適 實達成突 在對偶電 在封裝體 低限度。 裳置之驅 封裝，而 材料等， 極端 即獲 突起 晶片 容易 可確 則可 在最 導體 度之 極之 形態 實施形態相同之熱處理，使階梯狀芯層之電 形狀之後，以電鍍法形成突起電極皮膜5c， 所示之構造體。 說明，根據本發明，由於將半導體晶片上之 為芯層與電極端部之2層，所以可將半導體 端部之前端之圓形狀做成任意之形狀，並可 :於對偶基板及對偶電極之材質者。因而， 起電極與對偶電極之電性連接。 二8之輸入側配置電極端部5a之圓滑的面， /成時’將對偶電極8之輸入側之毁損抑制 ^於其相反側之對偶電極8即使毁損，於半 上仍無問題。因而，本構成可對應更高密 ’對於起因於對偶基板9之材料及對偶電" 而有毀損對偶電極8之虞時，尤其為有效之
533523 圖式簡單說明 [圖式之簡單說明] 第1圖為本發明第一實施形態之半導體裝置之封裝體 之剖視圖。 第2圖為本發明第二實施形態之半導體裝置之封裝體 之剖視圖。 第3A圖至第3D圖係用以說明第1圖所示半導體之封裝 體之製造方法之圖。 第4A圖至第4C圖係用以說明第2圖所示半導體之封裝 體之製造方法之圖，說明製程中之將突起電極做成階梯狀 之前之過程。 第5A圖至第5C圖係用以說明第2圖所示半導體之封裝 體之製造方法之圖，說明將突起電極做成階梯狀之後，在 其突起電極形成電極端部及電極皮膜為止之過程。 [元件符號說明] 1 基 板 (砍早結晶基板） 2 銲 墊 電 極 3 保 護 膜 4 阻 擋 金 屬 層 5 突 起 電極 5 a 電 極 端 部 5b 芯 部 (芯層） 5c 突 起 電 極 被覆膜 7 絕 緣 性接合劑 8 對 偶 電 極 9 對 偶 基板 10 電 鍍 阻 擋 膜 10a 第 一 領域 1 Ob 第 二 領 域 10c 第 —一一 領域 20 半 導 體 晶 片
313533.ptd 第16頁

Claims (1)

  1. 533523 六、申請專利範圍 1. 一種半導體裝置之封裝體，係具備： 具有突起電極之半導體晶片； 在一面形成與上述突起電極之端面相接觸之對偶 電極之樹脂製對偶基板；以及 介於上述半導體晶片與上述對偶基板之間之絕緣 性之熱可塑性、熱固性或光固性之膠合劑， 上述突起電極，係由芯部與在該芯部上方而與該 芯部為不同之凸形狀之電極端部所構成。 2. 如申請專利範圍第1項之半導體裝置之封裝體，其中， 在上述突起電極之電極端部之表面上形成用以防止突 起電極表面之氧化，且用以促進與上述對偶電極之良 好連接之突起電極被覆膜。 3. 如申請專利範圍第1項之半導體裝置之封裝體，其中， 在構成上述半導體晶片之鮮塾電極與上述突起電極之 芯部之間，以電鍍法設置為使上述芯部成長之電極 膜。 4. 如申請專利範圍第1項之半導體裝置之封裝體，其中， 上述突起電極之芯部為階數2或3以上之階梯狀。 5. 一種半導體裝置之封裝體之製造方法，係包括： 在半導體晶片之銲墊電極上方，形成突起電極之 芯部之步驟； 在上述芯部之表面，將具有較上述芯部融點為低 金屬材料，以電鍍法使其成長預定量，以形成突起電 極之電極端部之步驟；
    313533.ptd 第17頁 533523 申請專利範圍 之φ f i ^ ❹熱以使僅上述突起φ ^極端：溶解，藉以付予電極端部依昭ί;;， 使用之金屬材料之量的圓形之步驟；’、、、，、形成％所 於對偶基板之被封襞面或半導體$ 化狀態之絕緣性膠合劑之步驟； ，七、給未硬 將上述半導體曰y ’ 偶基板上之對偶電：捭加熱塵合於對 ””板與對偶電極形= = = :間1 ::與犬起電極之電極端部之兩：極之 性連接之步驟；以及 進仃兩電極之電 保持此狀態使上述絕緣性 上述半導體晶月與上述基板堅固地=化，以使 在半導體晶片之声^ 垃方法，係包括： 在此阻擋金屬層之上二：成阻擋金屬層， 銲墊電極之上方部分以外 述半導體晶片之 步驟，· 頁域，形成電鍍阻擋膜之 在未被上述電鍍阻擋膜所覆# 方之阻擋金屬層之上層，以^上述銲墊電極上 使用之電鍍法，使預定之金屬成导且擋層做為電極膜 之芯部之步驟； 長，以形成突起電極 將具有較上述芯部融點為低之 鍍使成長預定量以形成突起電極之雷烊锡，以電 將上述裝載有半導體晶片之基板：：部之步驟； 熱之熱板 313533.ptd 第18頁 533523 六、申請專利範圍 上放置預定時間，透過由上述基板傳來之熱使僅有上 述突起電極之電極端部溶解，藉以付予電極端部依照 其形成時所使用之金屬材料之量的圓形之步驟； 使用阻擋膜剝離液將電鍍阻擋膜剝離使阻擋金屬 層露出，將該露出之阻擋金屬層予以蝕刻之步驟； 於對偶基板之被封裝面或半導體晶片，供給未硬 化狀態之絕緣性膠合劑之步驟； 將上述半導體晶片上之突起電極，加熱壓合於對 偶基板上之對偶電極，並將此狀態維持預定時間，以 在對偶基板與對偶電極形成凹部，經由此對偶電極之 凹部與突起電極之電極端部之繫合，進行兩電極之電 性連接之步驟；以及 使上述絕緣性膠合劑硬化，以使上述半導體晶片 與上述對偶基板膠合之步驟。 7. 一種半導體晶片之突起電極之形成方法，係包括： 在構成半導體晶片之銲墊電極之上部，形成突起 電極之芯部之步驟； 在包含上述芯部之半導體晶片上形成電鍍阻擋膜 之步驟； 在上述電鍍阻檔膜上使用照相平版罩並於蝕刻時 將照射光量以多階段變換，藉此使上述芯部之上方之 電鍍阻擋膜之厚度形成多階梯狀之步驟； 將上述多階梯狀厚度之電鍍阻擋膜予以乾式蝕 刻，藉以使上述芯部形成階梯狀之形體之步驟；
    313533.ptd 第19頁 533523 六、申請專利範圍 在上述呈階梯狀之芯部，以電鍍法使電極端部成 長之步驟； 將上述電極端部以回流（r e f 1 〇 w )工程形成圓形之 步驟；以及 在上述電極端部以電鍍法形成電極皮膜之步驟。
    313533.ptd 第20頁
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