TW368758B - Dry microlithography process - Google Patents
Dry microlithography processInfo
- Publication number
- TW368758B TW368758B TW084112339A TW84112339A TW368758B TW 368758 B TW368758 B TW 368758B TW 084112339 A TW084112339 A TW 084112339A TW 84112339 A TW84112339 A TW 84112339A TW 368758 B TW368758 B TW 368758B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- oxide
- exposed
- fluorinated
- processable
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 6
- 238000001393 microlithography Methods 0.000 title abstract 2
- 238000000151 deposition Methods 0.000 abstract 1
- 230000008021 deposition Effects 0.000 abstract 1
- 238000001459 lithography Methods 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 abstract 1
- 230000005855 radiation Effects 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 238000005389 semiconductor device fabrication Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/0042—Photosensitive materials with inorganic or organometallic light-sensitive compounds not otherwise provided for, e.g. inorganic resists
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/265—Selective reaction with inorganic or organometallic reagents after image-wise exposure, e.g. silylation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S430/00—Radiation imagery chemistry: process, composition, or product thereof
- Y10S430/167—X-ray
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S430/00—Radiation imagery chemistry: process, composition, or product thereof
- Y10S430/167—X-ray
- Y10S430/168—X-ray exposure process
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/911—Differential oxidation and etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/95—Multilayer mask including nonradiation sensitive layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/981—Utilizing varying dielectric thickness
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Drying Of Semiconductors (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/250,691 US5460693A (en) | 1994-05-31 | 1994-05-31 | Dry microlithography process |
Publications (1)
Publication Number | Publication Date |
---|---|
TW368758B true TW368758B (en) | 1999-09-01 |
Family
ID=22948763
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW084112339A TW368758B (en) | 1994-05-31 | 1995-11-21 | Dry microlithography process |
Country Status (6)
Country | Link |
---|---|
US (2) | US5460693A (zh) |
EP (1) | EP0686999B1 (zh) |
JP (1) | JP3393958B2 (zh) |
KR (1) | KR100375908B1 (zh) |
DE (1) | DE69531472T2 (zh) |
TW (1) | TW368758B (zh) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5756154A (en) * | 1996-01-05 | 1998-05-26 | Motorola, Inc. | Masking methods during semiconductor device fabrication |
US5830801A (en) * | 1997-01-02 | 1998-11-03 | Motorola, Inc. | Resistless methods of gate formation in MOS devices |
US6417569B1 (en) | 1997-12-11 | 2002-07-09 | Taiwan Semiconductor Manufacturing Company | Fluorine-doped silicate glass hard mask to improve metal line etching profile |
US5962346A (en) * | 1997-12-29 | 1999-10-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fluorine-doped silicate glass hard mask to improve metal line etching profile |
US5985759A (en) | 1998-02-24 | 1999-11-16 | Applied Materials, Inc. | Oxygen enhancement of ion metal plasma (IMP) sputter deposited barrier layers |
US6093659A (en) * | 1998-03-25 | 2000-07-25 | Texas Instruments Incorporated | Selective area halogen doping to achieve dual gate oxide thickness on a wafer |
US6019906A (en) * | 1998-05-29 | 2000-02-01 | Taiwan Semiconductor Manufacturing Company | Hard masking method for forming patterned oxygen containing plasma etchable layer |
US6492276B1 (en) | 1998-05-29 | 2002-12-10 | Taiwan Semiconductor Manufacturing Company | Hard masking method for forming residue free oxygen containing plasma etched layer |
US6007733A (en) * | 1998-05-29 | 1999-12-28 | Taiwan Semiconductor Manufacturing Company | Hard masking method for forming oxygen containing plasma etchable layer |
US6326300B1 (en) | 1998-09-21 | 2001-12-04 | Taiwan Semiconductor Manufacturing Company | Dual damascene patterned conductor layer formation method |
US6784115B1 (en) | 1998-12-18 | 2004-08-31 | Mosel Vitelic, Inc. | Method of simultaneously implementing differential gate oxide thickness using fluorine bearing impurities |
US6287961B1 (en) | 1999-01-04 | 2001-09-11 | Taiwan Semiconductor Manufacturing Company | Dual damascene patterned conductor layer formation method without etch stop layer |
US6376149B2 (en) | 1999-05-26 | 2002-04-23 | Yale University | Methods and compositions for imaging acids in chemically amplified photoresists using pH-dependent fluorophores |
AU2001247687A1 (en) * | 2000-03-30 | 2001-10-15 | Tokyo Electron Limited | Dry silylation plasma etch process |
EP1305824A4 (en) * | 2000-06-06 | 2007-07-25 | Univ Fraser Simon | METHOD FOR MANUFACTURING ELECTRONIC MATERIALS |
US6497993B1 (en) | 2000-07-11 | 2002-12-24 | Taiwan Semiconductor Manufacturing Company | In situ dry etching procedure to form a borderless contact hole |
US6551938B1 (en) | 2002-01-25 | 2003-04-22 | Taiwon Semiconductor Manufacturing Company | N2/H2 chemistry for dry development in top surface imaging technology |
KR100523839B1 (ko) * | 2002-10-07 | 2005-10-27 | 한국전자통신연구원 | 건식 리소그라피 방법 및 이를 이용한 게이트 패턴 형성방법 |
US6720256B1 (en) | 2002-12-04 | 2004-04-13 | Taiwan Semiconductor Manufacturing Company | Method of dual damascene patterning |
US8470190B2 (en) * | 2007-07-18 | 2013-06-25 | Stmicroelectronics S.A. | Method for processing portions of walls of an opening formed in a silicon substrate |
KR20120133652A (ko) * | 2011-05-31 | 2012-12-11 | 삼성전자주식회사 | 반도체 소자의 제조 방법 |
EP3719576A1 (en) * | 2019-04-04 | 2020-10-07 | IMEC vzw | Resistless pattering mask |
Family Cites Families (36)
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EP0051534B1 (en) * | 1980-10-29 | 1986-05-14 | FAIRCHILD CAMERA & INSTRUMENT CORPORATION | A method of fabricating a self-aligned integrated circuit structure using differential oxide growth |
JPS57157248A (en) * | 1981-03-23 | 1982-09-28 | Nec Corp | Preparation of optical exposure mask |
WO1983004269A1 (en) * | 1982-06-01 | 1983-12-08 | Massachusetts Institute Of Technology | Maskless growth of patterned films |
US4605566A (en) * | 1983-08-22 | 1986-08-12 | Nec Corporation | Method for forming thin films by absorption |
US4595601A (en) * | 1984-05-25 | 1986-06-17 | Kabushiki Kaisha Toshiba | Method of selectively forming an insulation layer |
US4543270A (en) * | 1984-06-20 | 1985-09-24 | Gould Inc. | Method for depositing a micron-size metallic film on a transparent substrate utilizing a visible laser |
US4624736A (en) * | 1984-07-24 | 1986-11-25 | The United States Of America As Represented By The United States Department Of Energy | Laser/plasma chemical processing of substrates |
JPH0642456B2 (ja) * | 1984-11-21 | 1994-06-01 | 株式会社日立製作所 | 表面光処理方法 |
US4810601A (en) * | 1984-12-07 | 1989-03-07 | International Business Machines Corporation | Top imaged resists |
US4578155A (en) * | 1985-03-19 | 1986-03-25 | Halliwell Michael J | Laser induced deposition on polymeric substrates |
US4612085A (en) * | 1985-04-10 | 1986-09-16 | Texas Instruments Incorporated | Photochemical patterning |
JPS6276521A (ja) * | 1985-09-27 | 1987-04-08 | Nec Corp | 電子ビ−ムエツチング方法 |
JPH0778629B2 (ja) * | 1986-12-19 | 1995-08-23 | ミノルタ株式会社 | ポジ型レジスト膜及びそのレジストパターンの形成方法 |
US4748134A (en) * | 1987-05-26 | 1988-05-31 | Motorola, Inc. | Isolation process for semiconductor devices |
US5037720A (en) * | 1987-07-21 | 1991-08-06 | Hoechst Celanese Corporation | Hydroxylated aromatic polyamide polymer containing bound naphthoquinone diazide photosensitizer, method of making and use |
US4834834A (en) * | 1987-11-20 | 1989-05-30 | Massachusetts Institute Of Technology | Laser photochemical etching using surface halogenation |
US5055550A (en) * | 1987-11-24 | 1991-10-08 | Hoechst Celanese Corp. | Polymers prepared from 4,4'-bis(2-[3,4(dicarboxyphenyl)hexafluoroisopropyl] diphenyl ether dianhydride |
EP0334109B1 (de) * | 1988-03-24 | 1993-06-02 | Siemens Aktiengesellschaft | Verfahren und Vorrichtung zum Herstellen von aus amorphen Silizium-Germanium-Legierungen bestehenden Halbleiterschichten nach der Glimmentladungstechnik, insbesondere für Solarzellen |
US4945065A (en) * | 1988-06-02 | 1990-07-31 | Mobil Solar Energy Corporation | Method of passivating crystalline substrates |
US4882008A (en) * | 1988-07-08 | 1989-11-21 | Texas Instruments Incorporated | Dry development of photoresist |
US5041361A (en) * | 1988-08-08 | 1991-08-20 | Midwest Research Institute | Oxygen ion-beam microlithography |
US4978594A (en) * | 1988-10-17 | 1990-12-18 | International Business Machines Corporation | Fluorine-containing base layer for multi-layer resist processes |
JPH0712015B2 (ja) * | 1988-11-18 | 1995-02-08 | 新技術事業団 | シリコン固体表面へのパターン形成法 |
US5098866A (en) * | 1988-12-27 | 1992-03-24 | Texas Instruments Incorporated | Method for reducing hot-electron-induced degradation of device characteristics |
US4994140A (en) * | 1989-01-10 | 1991-02-19 | Optoelectronics Technology Research Corporation | Method capable of forming a fine pattern without crystal defects |
JPH0793285B2 (ja) * | 1989-01-17 | 1995-10-09 | 光技術研究開発株式会社 | 化合物半導体の加工方法 |
US4935377A (en) * | 1989-08-01 | 1990-06-19 | Watkins Johnson Company | Method of fabricating microwave FET having gate with submicron length |
US5015323A (en) * | 1989-10-10 | 1991-05-14 | The United States Of America As Represented By The Secretary Of Commerce | Multi-tipped field-emission tool for nanostructure fabrication |
DE3942472A1 (de) * | 1989-12-22 | 1991-06-27 | Asea Brown Boveri | Beschichtungsverfahren |
US5223445A (en) * | 1990-05-30 | 1993-06-29 | Matsushita Electric Industrial Co., Ltd. | Large angle ion implantation method |
JPH0437129A (ja) * | 1990-06-01 | 1992-02-07 | Fujitsu Ltd | エッチング方法及びエッチング装置 |
EP0470784A3 (en) * | 1990-08-10 | 1993-03-03 | Motorola Inc. | Method for selectively depositing a thin film |
US5316895A (en) * | 1990-10-31 | 1994-05-31 | Texas Instruments Incorporated | Photolithographic method using non-photoactive resins |
US5106770A (en) * | 1990-11-16 | 1992-04-21 | Gte Laboratories Incorporated | Method of manufacturing semiconductor devices |
US5312716A (en) * | 1991-06-06 | 1994-05-17 | Asahi Glass Company Ltd. | Process for producing a semiconductor |
US5358894A (en) * | 1992-02-06 | 1994-10-25 | Micron Technology, Inc. | Oxidation enhancement in narrow masked field regions of a semiconductor wafer |
-
1994
- 1994-05-31 US US08/250,691 patent/US5460693A/en not_active Expired - Lifetime
-
1995
- 1995-05-30 KR KR1019950013803A patent/KR100375908B1/ko not_active IP Right Cessation
- 1995-05-31 EP EP95108351A patent/EP0686999B1/en not_active Expired - Lifetime
- 1995-05-31 DE DE69531472T patent/DE69531472T2/de not_active Expired - Fee Related
- 1995-05-31 JP JP16917095A patent/JP3393958B2/ja not_active Expired - Fee Related
- 1995-11-21 TW TW084112339A patent/TW368758B/zh not_active IP Right Cessation
-
1997
- 1997-01-15 US US08/783,686 patent/US5700628A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69531472T2 (de) | 2004-02-19 |
EP0686999A2 (en) | 1995-12-13 |
DE69531472D1 (de) | 2003-09-18 |
JPH08179519A (ja) | 1996-07-12 |
US5700628A (en) | 1997-12-23 |
KR100375908B1 (ko) | 2003-04-08 |
KR950034481A (ko) | 1995-12-28 |
EP0686999A3 (en) | 1997-08-20 |
US5460693A (en) | 1995-10-24 |
EP0686999B1 (en) | 2003-08-13 |
JP3393958B2 (ja) | 2003-04-07 |
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