JPS55151338A - Fabricating method of semiconductor device - Google Patents

Fabricating method of semiconductor device

Info

Publication number
JPS55151338A
JPS55151338A JP6018179A JP6018179A JPS55151338A JP S55151338 A JPS55151338 A JP S55151338A JP 6018179 A JP6018179 A JP 6018179A JP 6018179 A JP6018179 A JP 6018179A JP S55151338 A JPS55151338 A JP S55151338A
Authority
JP
Japan
Prior art keywords
film
resist
substrate
coated
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6018179A
Other languages
Japanese (ja)
Other versions
JPS647492B2 (en
Inventor
Masanori Fukumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6018179A priority Critical patent/JPS55151338A/en
Publication of JPS55151338A publication Critical patent/JPS55151338A/en
Publication of JPS647492B2 publication Critical patent/JPS647492B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Abstract

PURPOSE:To raise the resolution of a resist and to enable the fine fabrication of the resist by coating a fluidized resin film on the surface of a substrate, reducing the ruggedness of the substrate and coating the resist when forming an element pattern on the semiconductor substrate. CONSTITUTION:After forming a CVD SiO2 film 13 on a silicon substrate 9 formed on an element region, a fluidized resist film 15 is coated on the entire surface of the film 13. Then, the resist film 15 is heat treated to be solidified, an Mo film 16 is coated thereon, and a resist film 17 is coated on the film 16. Thereafter, the film 17 is exposed and developed to form an opening at the film 16, with the film 16 as a mask it is dry etched with O2, and a resist pattern is formed on the film 15. In this manner, the ruggedness on the surface of the substrate is reduced to improve the resolution accuracy of the film 17, and since the dry etching is employed for the resist film 15, accurate pattern can be formed thereon.
JP6018179A 1979-05-16 1979-05-16 Fabricating method of semiconductor device Granted JPS55151338A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6018179A JPS55151338A (en) 1979-05-16 1979-05-16 Fabricating method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6018179A JPS55151338A (en) 1979-05-16 1979-05-16 Fabricating method of semiconductor device

Publications (2)

Publication Number Publication Date
JPS55151338A true JPS55151338A (en) 1980-11-25
JPS647492B2 JPS647492B2 (en) 1989-02-09

Family

ID=13134724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6018179A Granted JPS55151338A (en) 1979-05-16 1979-05-16 Fabricating method of semiconductor device

Country Status (1)

Country Link
JP (1) JPS55151338A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583232A (en) * 1981-06-30 1983-01-10 Fujitsu Ltd Forming method for pattern
JPS5913329A (en) * 1982-07-03 1984-01-24 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Method of producing semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023039270A2 (en) 2021-09-13 2023-03-16 Danisco Us Inc. Bioactive-containing granules

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51107775A (en) * 1975-03-19 1976-09-24 Hitachi Ltd Handotaisochino bisaikakohoho

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51107775A (en) * 1975-03-19 1976-09-24 Hitachi Ltd Handotaisochino bisaikakohoho

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583232A (en) * 1981-06-30 1983-01-10 Fujitsu Ltd Forming method for pattern
JPH0224017B2 (en) * 1981-06-30 1990-05-28 Fujitsu Ltd
JPS5913329A (en) * 1982-07-03 1984-01-24 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Method of producing semiconductor device

Also Published As

Publication number Publication date
JPS647492B2 (en) 1989-02-09

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