JPS56107582A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56107582A JPS56107582A JP906680A JP906680A JPS56107582A JP S56107582 A JPS56107582 A JP S56107582A JP 906680 A JP906680 A JP 906680A JP 906680 A JP906680 A JP 906680A JP S56107582 A JPS56107582 A JP S56107582A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- polycrystalline silicon
- platinum
- gate
- silicide gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 abstract 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 4
- 229910021332 silicide Inorganic materials 0.000 abstract 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 230000010354 integration Effects 0.000 abstract 2
- 229910052697 platinum Inorganic materials 0.000 abstract 2
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 2
- ZXEYZECDXFPJRJ-UHFFFAOYSA-N $l^{3}-silane;platinum Chemical compound [SiH3].[Pt] ZXEYZECDXFPJRJ-UHFFFAOYSA-N 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 238000001259 photo etching Methods 0.000 abstract 1
- 229910021339 platinum silicide Inorganic materials 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE:To obtain MISFET in high integration and high speed by forming a fine metallic silicide gate at high precision through photoetching. CONSTITUTION:A field oxide film 22 and a gate oxide film 23 are formed on a semiconductor substrate 21, and then a polycrystalline silicon 24 and a thin silicon oxide film 27 are formed on the whole surface. Next, the polycrystalline silicon layer 24 is exposed selectively to have platinum 25 coated thereon. Further, platnum silicide 26 is formed on a partial domain of the polycrystalline silicon layer 24 inside at a given distance W from the periphery of a pattern of the silicon oxide film 27 through heat treatment. Next, the platinum 25 is removed through etching and the polycrystalline silicon is also removed to obtain a platinum silicide gate 26. Since a metallic silicide gate fine and high in dimensional accuracy can be formed according to the above constitution, an element is obtainable in high integration and high speed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP906680A JPS56107582A (en) | 1980-01-29 | 1980-01-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP906680A JPS56107582A (en) | 1980-01-29 | 1980-01-29 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56107582A true JPS56107582A (en) | 1981-08-26 |
Family
ID=11710231
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP906680A Pending JPS56107582A (en) | 1980-01-29 | 1980-01-29 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56107582A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0142186A2 (en) * | 1983-10-10 | 1985-05-22 | Koninklijke Philips Electronics N.V. | Method of manufacturing a pattern of conductive material |
-
1980
- 1980-01-29 JP JP906680A patent/JPS56107582A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0142186A2 (en) * | 1983-10-10 | 1985-05-22 | Koninklijke Philips Electronics N.V. | Method of manufacturing a pattern of conductive material |
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