JPS56133847A - Metal processing - Google Patents

Metal processing

Info

Publication number
JPS56133847A
JPS56133847A JP3582580A JP3582580A JPS56133847A JP S56133847 A JPS56133847 A JP S56133847A JP 3582580 A JP3582580 A JP 3582580A JP 3582580 A JP3582580 A JP 3582580A JP S56133847 A JPS56133847 A JP S56133847A
Authority
JP
Japan
Prior art keywords
film
wiring
pattern
oxide film
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3582580A
Other languages
Japanese (ja)
Inventor
Takashi Sato
Michiyuki Sugihara
Hidetaro Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP3582580A priority Critical patent/JPS56133847A/en
Publication of JPS56133847A publication Critical patent/JPS56133847A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02244Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To improve the adhesion of positive photoresist to a metal film and to make wiring highly accurate and minute by removing an oxide film prepared by processing the metal film with oxygen plasma. CONSTITUTION:A field oxide film 2 is made to grow on a p type silicon substrate 1, while a gate oxide film 4 and a gate electrode 3 are formed on the substrate. Then a source 5 and drain 6 as n<+> type impurity layers. Next a CVD-SiO2 film 7 is deposited and contact holes 81, 82, 83 are formed, which is followed by the evaporation of an Al-Si alloy film 9 as a wiring metal over the whole area. Next an Al2O3 film 10 is formed on the surface through the oxygen plasma processing. After the Al2O3 film 10 has been removed, positive photoresist film is applied in order to form a resist pattern 12 through photoetching. With the pattern 12 as a mask, the alloy film is selectively etched to form Al-Si wiring. By so doing, a minutely etched pattern can be obtained.
JP3582580A 1980-03-21 1980-03-21 Metal processing Pending JPS56133847A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3582580A JPS56133847A (en) 1980-03-21 1980-03-21 Metal processing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3582580A JPS56133847A (en) 1980-03-21 1980-03-21 Metal processing

Publications (1)

Publication Number Publication Date
JPS56133847A true JPS56133847A (en) 1981-10-20

Family

ID=12452723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3582580A Pending JPS56133847A (en) 1980-03-21 1980-03-21 Metal processing

Country Status (1)

Country Link
JP (1) JPS56133847A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03214729A (en) * 1990-01-19 1991-09-19 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03214729A (en) * 1990-01-19 1991-09-19 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH0787189B2 (en) * 1990-01-19 1995-09-20 松下電器産業株式会社 Method for manufacturing semiconductor device

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