JPS57204165A - Manufacture of charge coupling element - Google Patents

Manufacture of charge coupling element

Info

Publication number
JPS57204165A
JPS57204165A JP8934981A JP8934981A JPS57204165A JP S57204165 A JPS57204165 A JP S57204165A JP 8934981 A JP8934981 A JP 8934981A JP 8934981 A JP8934981 A JP 8934981A JP S57204165 A JPS57204165 A JP S57204165A
Authority
JP
Japan
Prior art keywords
film
electrodes
sio2
etching
integration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8934981A
Other languages
Japanese (ja)
Other versions
JPS5947470B2 (en
Inventor
Nobuhiro Minotani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP8934981A priority Critical patent/JPS5947470B2/en
Publication of JPS57204165A publication Critical patent/JPS57204165A/en
Publication of JPS5947470B2 publication Critical patent/JPS5947470B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823406Combination of charge coupled devices, i.e. CCD, or BBD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To improve accuracy for integration, by removing by etching only the second insulating film with the first electrodes as a mask to form the third insulating film on the laminating formation of two insulating films etched by different etchants on one conductive type substrate. CONSTITUTION:The first electrodes 4 constituted of Mo are arranged on an SiO2 film 3'-1 and Si3N4 film 3-2 on a Ptype si substrate 1 having a semiconductor layer 2 to remove the SI4N4 film with the electrodes as masks. The etchant is thermo-phosphoric acid not etching an SiO2 film. Next, an SiO2 film 3'-3 are formed thinner than the Si3N4 film over the entire surface with the second electrodes 5 arranged alternately with the first electrodes 4 thereon. Thus, the insulating film can be easily controlled in film thickness serving for the improvement of accuracy and integration.
JP8934981A 1981-06-09 1981-06-09 Method of manufacturing a charge coupled device Expired JPS5947470B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8934981A JPS5947470B2 (en) 1981-06-09 1981-06-09 Method of manufacturing a charge coupled device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8934981A JPS5947470B2 (en) 1981-06-09 1981-06-09 Method of manufacturing a charge coupled device

Publications (2)

Publication Number Publication Date
JPS57204165A true JPS57204165A (en) 1982-12-14
JPS5947470B2 JPS5947470B2 (en) 1984-11-19

Family

ID=13968225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8934981A Expired JPS5947470B2 (en) 1981-06-09 1981-06-09 Method of manufacturing a charge coupled device

Country Status (1)

Country Link
JP (1) JPS5947470B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262461A (en) * 1984-06-08 1985-12-25 Matsushita Electronics Corp Charge coupled device
FR2577715A1 (en) * 1985-02-19 1986-08-22 Thomson Csf METHOD OF MAKING TWO DIFFERENT JUXTAPOSED MOS STRUCTURES AND DIFFERENT DOPING AND FRAME TRANSFER MATRIX OBTAINED THEREBY
JPH04279036A (en) * 1991-01-08 1992-10-05 Nec Corp Electric charge transfer element and manufacture thereof
JPH0685234A (en) * 1992-05-11 1994-03-25 Samsung Electron Co Ltd Image sensor device and its manufacture
US5369040A (en) * 1992-05-18 1994-11-29 Westinghouse Electric Corporation Method of making transparent polysilicon gate for imaging arrays
US5457332A (en) * 1991-07-16 1995-10-10 Thomson-Csf Semiconducteurs Specifiques Process for manufacturing integrated circuits with juxtaposed electrodes and corresponding integrated circuit
US5556803A (en) * 1994-10-26 1996-09-17 Goldstar Electron Co., Ltd. Method for fabricating a charge coupled device
US5637891A (en) * 1994-12-08 1997-06-10 Goldstar Electron Co., Ltd. Charge coupled device having different insulators

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262461A (en) * 1984-06-08 1985-12-25 Matsushita Electronics Corp Charge coupled device
FR2577715A1 (en) * 1985-02-19 1986-08-22 Thomson Csf METHOD OF MAKING TWO DIFFERENT JUXTAPOSED MOS STRUCTURES AND DIFFERENT DOPING AND FRAME TRANSFER MATRIX OBTAINED THEREBY
US4648941A (en) * 1985-02-19 1987-03-10 Thomson-Csf Process for forming two MOS structures with different juxtaposed dielectrics and different dopings
JPH04279036A (en) * 1991-01-08 1992-10-05 Nec Corp Electric charge transfer element and manufacture thereof
US5457332A (en) * 1991-07-16 1995-10-10 Thomson-Csf Semiconducteurs Specifiques Process for manufacturing integrated circuits with juxtaposed electrodes and corresponding integrated circuit
JPH0685234A (en) * 1992-05-11 1994-03-25 Samsung Electron Co Ltd Image sensor device and its manufacture
US5369040A (en) * 1992-05-18 1994-11-29 Westinghouse Electric Corporation Method of making transparent polysilicon gate for imaging arrays
US5556803A (en) * 1994-10-26 1996-09-17 Goldstar Electron Co., Ltd. Method for fabricating a charge coupled device
US5637891A (en) * 1994-12-08 1997-06-10 Goldstar Electron Co., Ltd. Charge coupled device having different insulators

Also Published As

Publication number Publication date
JPS5947470B2 (en) 1984-11-19

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