JPS57190355A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57190355A JPS57190355A JP7590281A JP7590281A JPS57190355A JP S57190355 A JPS57190355 A JP S57190355A JP 7590281 A JP7590281 A JP 7590281A JP 7590281 A JP7590281 A JP 7590281A JP S57190355 A JPS57190355 A JP S57190355A
- Authority
- JP
- Japan
- Prior art keywords
- films
- electrodes
- si3n4
- insulator
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000012212 insulator Substances 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 238000005530 etching Methods 0.000 abstract 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 230000010354 integration Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 150000004767 nitrides Chemical class 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To obtain a high integrated semiconductor device by a method wherein polycrystalline Si electrodes are formed perpendicularly on the same plane of an Si substrate, and the gap between the electrodes are filled up with an insulator being different from an insulator on the electrodes. CONSTITUTION:A polycrystalline Si layer 302, an SiO2 film 303, an Si3N4 mask 304 are piled up on the N type Si substrate 301, and the layer 302 is isolated by SiO2 films 303'. The mask 304 is removed selectively, and N type layers 302, 306, and then P type layers 307, 316 are formed in order. Si3N4 films 304, plasma CVD Si3N4 films 309, resist masks 305'' are piled up to etch the film 309, and are converted into Si3N4 films and SiO2 films 308 by formation of nitride film. Then after the films 309, 304' are etched slightly from the sides, the masks 305'' are removed, grooves are provided perpendicularly to the P type layer 307 by anisotropic etching to form P type layers 310, and after the inside of the grooves are covered with oxide films, plasma CVD Si3N4 layers 314 are filled up therein. The remaining Si3N4 films 304' are removed finally, and electrodes 318 are adhered to complete. By this constitution, the interval between the electrodes can be shortened to enhance the grade of integration of the device. Moreover when the respective electrodes are to be formed by etching, the insulator between the electrodes is not etched completely.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7590281A JPS57190355A (en) | 1981-05-20 | 1981-05-20 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7590281A JPS57190355A (en) | 1981-05-20 | 1981-05-20 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57190355A true JPS57190355A (en) | 1982-11-22 |
Family
ID=13589725
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7590281A Pending JPS57190355A (en) | 1981-05-20 | 1981-05-20 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57190355A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05121416A (en) * | 1991-09-20 | 1993-05-18 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device |
-
1981
- 1981-05-20 JP JP7590281A patent/JPS57190355A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05121416A (en) * | 1991-09-20 | 1993-05-18 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device |
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