JPS5717147A - Wiring formation - Google Patents

Abstract

PURPOSE:To obtain flat wiring permitting high integration and high performance by forming an P-N junction on semiconductor layer provided on a substrate wherein the P-N junction is then buried by an oxide after selectively removing the semiconductor layer up to half the thickness. CONSTITUTION:For example, an N type polycrystalline Si layer 14 is coated and formed on a semiconductor substrate 1 provided a CMOS through insulating layers 8, 9. An impurity is selectively doped to electrode lead-out sections for P type source and drain at a part of the polycrystalline Si layer and the polycrystalline Si layer is converted into a P type polycrystalline Si layer 15. After forming an SiO2 film 31, an Si3N4 film 33 on the surface of the polycrystalline Si layer, the removal of etching is selectively applied to the polycrystalline Si layer up to half the thickness of the layer by a photoresist 33 and the etched parts are converted into SiO2 layers 34 by selective oxidization. In this way, flat-surfaced wiring for polycrystalline Si will be obtained.