TW367656B - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
TW367656B
TW367656B TW084100769A TW84100769A TW367656B TW 367656 B TW367656 B TW 367656B TW 084100769 A TW084100769 A TW 084100769A TW 84100769 A TW84100769 A TW 84100769A TW 367656 B TW367656 B TW 367656B
Authority
TW
Taiwan
Prior art keywords
memory device
control signal
semiconductor memory
pll
constant
Prior art date
Application number
TW084100769A
Other languages
English (en)
Inventor
Koichiro Ishibashi
Kunihiro Komiyaji
Kiyotsugu Ueda
Hiroshi Toyoshima
Original Assignee
Hitachi Ltd
Hitachi Ulsi Sys Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP15692794A external-priority patent/JPH0831180A/ja
Priority claimed from JP6215587A external-priority patent/JPH0878951A/ja
Application filed by Hitachi Ltd, Hitachi Ulsi Sys Co Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW367656B publication Critical patent/TW367656B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Static Random-Access Memory (AREA)
TW084100769A 1994-07-08 1995-01-27 Semiconductor memory device TW367656B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP15692794A JPH0831180A (ja) 1994-07-08 1994-07-08 半導体記憶装置
JP6215587A JPH0878951A (ja) 1994-09-09 1994-09-09 半導体集積回路

Publications (1)

Publication Number Publication Date
TW367656B true TW367656B (en) 1999-08-21

Family

ID=26484548

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084100769A TW367656B (en) 1994-07-08 1995-01-27 Semiconductor memory device

Country Status (3)

Country Link
US (2) US5740115A (zh)
KR (1) KR100379825B1 (zh)
TW (1) TW367656B (zh)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0158762B1 (ko) * 1994-02-17 1998-12-01 세키자와 다다시 반도체 장치
US6009039A (en) * 1994-02-17 1999-12-28 Fujitsu Limited Semiconductor device
JP3893167B2 (ja) 1996-04-26 2007-03-14 株式会社ルネサステクノロジ 同期型半導体記憶装置
KR100206928B1 (ko) * 1996-07-26 1999-07-01 구본준 반도체 메모리의 데이타라인 등화 제어회로
TW353176B (en) * 1996-09-20 1999-02-21 Hitachi Ltd A semiconductor device capable of holding signals independent of the pulse width of an external clock and a computer system including the semiconductor
JP3406790B2 (ja) 1996-11-25 2003-05-12 株式会社東芝 データ転送システム及びデータ転送方法
GB2326065B (en) * 1997-06-05 2002-05-29 Mentor Graphics Corp A scalable processor independent on-chip bus
JP4316792B2 (ja) * 1997-09-04 2009-08-19 シリコン・イメージ，インコーポレーテッド ピーク周波数において電磁妨害雑音を減少させるための複数の同期信号に対する制御可能遅延装置。
US6263448B1 (en) 1997-10-10 2001-07-17 Rambus Inc. Power control system for synchronous memory device
JPH11120769A (ja) * 1997-10-13 1999-04-30 Mitsubishi Electric Corp 同期型半導体記憶装置
JP3090104B2 (ja) * 1997-10-27 2000-09-18 日本電気株式会社 半導体メモリ装置
US5905684A (en) * 1997-11-03 1999-05-18 Arm Limited Memory bit line output buffer
US6154821A (en) * 1998-03-10 2000-11-28 Rambus Inc. Method and apparatus for initializing dynamic random access memory (DRAM) devices by levelizing a read domain
JP2002510118A (ja) 1998-04-01 2002-04-02 モサイド・テクノロジーズ・インコーポレーテッド 半導体メモリ非同期式パイプライン
KR100305646B1 (ko) * 1998-05-29 2001-11-30 박종섭 클럭보정회로
KR100295045B1 (ko) * 1998-06-23 2001-07-12 윤종용 지연동기루프(dll)를구비한반도체메모리장치
JP2000090659A (ja) * 1998-09-10 2000-03-31 Nec Corp 半導体記憶装置
KR100340863B1 (ko) 1999-06-29 2002-06-15 박종섭 딜레이 록 루프 회로
US6178138B1 (en) * 1999-09-21 2001-01-23 Celis Semiconductor Corporation Asynchronously addressable clocked memory device and method of operating same
KR100335493B1 (ko) * 1999-10-27 2002-05-04 윤종용 데이터 라인 센스앰프부의 센싱 효율을 균일하게 하는 반도체 메모리장치
US6313712B1 (en) 2000-06-13 2001-11-06 International Business Machines Corporation Low power crystal oscillator having improved long term and short term stability
US6658544B2 (en) 2000-12-27 2003-12-02 Koninklijke Philips Electronics N.V. Techniques to asynchronously operate a synchronous memory
JP4794059B2 (ja) * 2001-03-09 2011-10-12 富士通セミコンダクター株式会社 半導体装置
DE10115816B4 (de) * 2001-03-30 2008-02-28 Infineon Technologies Ag Integrierter dynamischer Speicher und Verfahren zum Betrieb eines integrierten dynamischen Speichers
KR20020078086A (ko) * 2001-04-04 2002-10-18 삼성전자 주식회사 반도체 메모리 소자 및 이를 한정하기 위한 마스크 패턴
KR100422572B1 (ko) * 2001-06-30 2004-03-12 주식회사 하이닉스반도체 레지스터 제어 지연고정루프 및 그를 구비한 반도체 소자
KR100422585B1 (ko) * 2001-08-08 2004-03-12 주식회사 하이닉스반도체 링 - 레지스터 제어형 지연 고정 루프 및 그의 제어방법
KR100427037B1 (ko) 2001-09-24 2004-04-14 주식회사 하이닉스반도체 적응적 출력 드라이버를 갖는 반도체 기억장치
DE10219371B4 (de) * 2002-04-30 2006-01-12 Infineon Technologies Ag Signalerzeugungsvorrichtung für eine Ladungspumpe sowie damit versehener integrierter Schaltkreis
JP2004013979A (ja) * 2002-06-05 2004-01-15 Elpida Memory Inc 半導体装置
KR100431331B1 (ko) * 2002-08-21 2004-05-12 삼성전자주식회사 반도체 메모리장치의 입출력 센스 앰프 구동방법 및 그구동제어회로
EP1418589A1 (en) * 2002-11-06 2004-05-12 STMicroelectronics S.r.l. Method and device for timing random reading of a memory device
US6970395B2 (en) * 2003-09-08 2005-11-29 Infineon Technologies Ag Memory device and method of reading data from a memory device
KR100555521B1 (ko) * 2003-10-28 2006-03-03 삼성전자주식회사 두 번 이상 샘플링하는 감지 증폭기를 구비하는 반도체 장치 및 반도체 장치의 데이터 판독 방법
US7149128B2 (en) * 2004-11-16 2006-12-12 Realtek Semiconductor Corp. Data latch
JP2007128633A (ja) * 2005-10-07 2007-05-24 Matsushita Electric Ind Co Ltd 半導体記憶装置及びこれを備えた送受信システム
JP2007293933A (ja) * 2006-04-21 2007-11-08 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP4984759B2 (ja) * 2006-09-05 2012-07-25 富士通セミコンダクター株式会社 半導体記憶装置
DE102017114986B4 (de) * 2016-12-13 2021-07-29 Taiwan Semiconductor Manufacturing Co. Ltd. Speicher mit symmetrischem Lesestromprofil und diesbezügliches Leseverfahren

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57150190A (en) * 1981-02-27 1982-09-16 Hitachi Ltd Monolithic storage device
JPH0817032B2 (ja) * 1986-03-12 1996-02-21 株式会社日立製作所 半導体集積回路装置
JPH01138673A (ja) * 1988-02-13 1989-05-31 Nec Corp メモリ回路
JP3992757B2 (ja) * 1991-04-23 2007-10-17 テキサス インスツルメンツ インコーポレイテツド マイクロプロセッサと同期するメモリ、及びデータプロセッサ、同期メモリ、周辺装置とシステムクロックを含むシステム
KR960009033B1 (en) * 1991-07-17 1996-07-10 Toshiba Kk Semiconductor memory
JPH05259900A (ja) * 1992-03-10 1993-10-08 Ricoh Co Ltd 位相変調回路
JP3078934B2 (ja) * 1992-12-28 2000-08-21 富士通株式会社 同期型ランダムアクセスメモリ

Also Published As

Publication number Publication date
KR100379825B1 (ko) 2003-07-18
US5740115A (en) 1998-04-14
US5930197A (en) 1999-07-27

Similar Documents

Publication Publication Date Title
TW367656B (en) Semiconductor memory device
US7032092B2 (en) Memory controller for supporting a plurality of different memory accesse modes
US7554878B2 (en) Synchronous memory device
US6075393A (en) Clock synchronous semiconductor device system and semiconductor devices used with the same
KR910005308A (ko) 반도체 메모리
EP1026692A3 (en) Data output buffers in semiconductor memory devices
JPS54152931A (en) Semiconductor memory device
KR870002582A (ko) 테스트 패턴 발생회로를 갖는 반도체 기억장치
KR950034777A (ko) 반도체 기억장치
KR960042730A (ko) 반도체기억장치
US6618457B1 (en) Apparatus and method for receiving external data signal to generate internal data signal
HK80095A (en) Serial-accessed memory data accessing circuit involving low operating current,and method thereof
KR970029812A (ko) 컬럼 선택 신호 제어회로
TW428101B (en) Synchronous semiconductor memory apparatus
TW430817B (en) Zero power high speed configuration memory
KR20030039179A (ko) 싱글 엔디드 스트로브 모드와 디퍼렌셜 스트로브 모드상호간의 모드 변환이 가능한 동기식 반도체 메모리 장치
JPS63229691A (ja) メモリ周辺回路
US7890786B2 (en) Memory controller and signal synchronizing method thereof
US5579271A (en) Automatic test circuit for a semiconductor memory device capable of generating internal ras and cas signals, and row and column address signals
JPS6055916B2 (ja) タイミング回路
US6970395B2 (en) Memory device and method of reading data from a memory device
JPS6419582A (en) Semiconductor memory device
KR20010004353A (ko) 반도체메모리장치의 데이터 기록 동작 제어 장치
KR20010011641A (ko) 반도체장치의 테스트를 위한 내부 클럭 발생장치
KR100633336B1 (ko) 디디알 동기식메모리 장치의 데이터 얼라인 장치