TW360980B - Single transistor EEPROM memory device - Google Patents

Single transistor EEPROM memory device

Info

Publication number
TW360980B
TW360980B TW086101953A TW86101953A TW360980B TW 360980 B TW360980 B TW 360980B TW 086101953 A TW086101953 A TW 086101953A TW 86101953 A TW86101953 A TW 86101953A TW 360980 B TW360980 B TW 360980B
Authority
TW
Taiwan
Prior art keywords
floating gate
programming
cell
word line
field insulating
Prior art date
Application number
TW086101953A
Other languages
English (en)
Chinese (zh)
Inventor
James T Chen
Atsuo Yagi
Original Assignee
Nippon Precision Circuits
James T Chen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22895050&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=TW360980(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Nippon Precision Circuits, James T Chen filed Critical Nippon Precision Circuits
Application granted granted Critical
Publication of TW360980B publication Critical patent/TW360980B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/44—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a control gate layer also being used as part of the peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/47—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a floating-gate layer also being used as part of the peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/48—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/46—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with an inter-gate dielectric layer also being used as part of the peripheral transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
TW086101953A 1994-05-04 1995-03-04 Single transistor EEPROM memory device TW360980B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US23776194A 1994-05-04 1994-05-04

Publications (1)

Publication Number Publication Date
TW360980B true TW360980B (en) 1999-06-11

Family

ID=22895050

Family Applications (2)

Application Number Title Priority Date Filing Date
TW086101953A TW360980B (en) 1994-05-04 1995-03-04 Single transistor EEPROM memory device
TW084102172A TW318961B (enExample) 1994-05-04 1995-03-04

Family Applications After (1)

Application Number Title Priority Date Filing Date
TW084102172A TW318961B (enExample) 1994-05-04 1995-03-04

Country Status (4)

Country Link
US (2) US5635416A (enExample)
JP (1) JP2928986B2 (enExample)
KR (1) KR0184632B1 (enExample)
TW (2) TW360980B (enExample)

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JP2871593B2 (ja) * 1996-05-30 1999-03-17 日本電気株式会社 半導体記憶装置およびその製造方法
JPH10189777A (ja) * 1996-12-26 1998-07-21 Toshiba Corp 不揮発性半導体記憶装置の製造方法
US6201732B1 (en) 1997-01-02 2001-03-13 John M. Caywood Low voltage single CMOS electrically erasable read-only memory
US5986931A (en) 1997-01-02 1999-11-16 Caywood; John M. Low voltage single CMOS electrically erasable read-only memory
WO1998044567A1 (en) * 1997-03-28 1998-10-08 Hitachi, Ltd. Nonvolatile semiconductor storage device and method for manufacturing the same and semiconductor device and method for manufacturing the same
US6342715B1 (en) 1997-06-27 2002-01-29 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
DE69734278D1 (de) * 1997-07-03 2006-02-09 St Microelectronics Srl Herstellungsverfahren eines nichtflüchtigen Halbleiterspeicherbauelementes mit abgeschirmtem Einpolysiliziumgate-Speicherabschnitt
JP3214432B2 (ja) * 1998-02-04 2001-10-02 日本電気株式会社 固体撮像装置の製造方法
JP3705919B2 (ja) * 1998-03-05 2005-10-12 三菱電機株式会社 半導体装置及びその製造方法
US6054348A (en) * 1998-05-15 2000-04-25 Taiwan Semiconductor Manufacturing Company Self-aligned source process
KR100276653B1 (ko) 1998-08-27 2001-01-15 윤종용 스프릿 게이트형 불휘발성 메모리 셀의 구동방법 및 이 셀들을구비한 반도체 메모리 장치의 구동방법
US6191444B1 (en) * 1998-09-03 2001-02-20 Micron Technology, Inc. Mini flash process and circuit
KR100284739B1 (ko) * 1998-09-25 2001-05-02 윤종용 불휘발성메모리장치제조방법
EP1020920B1 (en) * 1999-01-11 2010-06-02 Sel Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a driver TFT and a pixel TFT on a common substrate
US6180456B1 (en) 1999-02-17 2001-01-30 International Business Machines Corporation Triple polysilicon embedded NVRAM cell and method thereof
US6284637B1 (en) 1999-03-29 2001-09-04 Chartered Semiconductor Manufacturing Ltd. Method to fabricate a floating gate with a sloping sidewall for a flash memory
US6261906B1 (en) * 1999-08-03 2001-07-17 Worldwide Semiconductor Manufacturing Corp. Method for forming a flash memory cell with improved drain erase performance
US6235587B1 (en) * 1999-10-13 2001-05-22 Advanced Micro Devices, Inc. Method of manufacturing a semiconductor device with reduced arc loss in peripheral circuitry region
JP2002064157A (ja) 2000-06-09 2002-02-28 Toshiba Corp 半導体メモリ集積回路及びその製造方法
US6590255B2 (en) * 2000-09-29 2003-07-08 Kabushiki Kaisha Toshiba Semiconductor memory device having memory cell section and peripheral circuit section and method of manufacturing the same
JP2003023114A (ja) * 2001-07-05 2003-01-24 Fujitsu Ltd 半導体集積回路装置およびその製造方法
JP2003163290A (ja) * 2001-11-27 2003-06-06 Mitsubishi Electric Corp 不揮発性半導体記憶装置およびその製造方法
US6841446B2 (en) * 2002-01-09 2005-01-11 Macronix International Co., Ltd. Fabrication method for a flash memory device
JP2003332466A (ja) * 2002-05-17 2003-11-21 Mitsubishi Electric Corp 半導体装置
AU2002328180A1 (en) * 2002-08-26 2004-03-11 Solid State System Co., Ltd. Contactless mask programmable rom
JP2004235313A (ja) * 2003-01-29 2004-08-19 Renesas Technology Corp 半導体装置
JP2007294750A (ja) * 2006-04-26 2007-11-08 Toshiba Corp 半導体装置及びその製造方法
US7504676B2 (en) * 2006-05-31 2009-03-17 Alpha & Omega Semiconductor, Ltd. Planar split-gate high-performance MOSFET structure and manufacturing method
US7868370B2 (en) * 2008-04-14 2011-01-11 Macronix International Co., Ltd. Single gate nonvolatile memory cell with transistor and capacitor
KR101044017B1 (ko) * 2008-12-26 2011-06-24 주식회사 하이닉스반도체 불휘발성 메모리 소자의 제조방법
KR101096388B1 (ko) * 2009-12-30 2011-12-20 주식회사 하이닉스반도체 불휘발성 메모리 소자 및 이의 제조 방법
TWI449045B (zh) * 2010-07-16 2014-08-11 Yield Microelectronics Corp Low cost electronic erasure can be rewritten read only memory array
JP6120609B2 (ja) * 2013-02-25 2017-04-26 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
FR3046696A1 (fr) * 2016-01-12 2017-07-14 St Microelectronics Crolles 2 Sas Procede de fabrication de puce electronique
WO2018063301A1 (en) * 2016-09-30 2018-04-05 Intel Corporation Transistors including source/drain employing double-charge dopants

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JP3059442B2 (ja) * 1988-11-09 2000-07-04 株式会社日立製作所 半導体記憶装置
US5005155A (en) * 1988-06-15 1991-04-02 Advanced Micro Devices, Inc. Optimized electrically erasable PLA cell for minimum read disturb
US5017979A (en) * 1989-04-28 1991-05-21 Nippondenso Co., Ltd. EEPROM semiconductor memory device
US5102814A (en) * 1990-11-02 1992-04-07 Intel Corporation Method for improving device scalability of buried bit line flash EPROM devices having short reoxidation beaks and shallower junctions
KR960002006B1 (ko) * 1991-03-12 1996-02-09 가부시끼가이샤 도시바 2개의 기준 레벨을 사용하는 기록 검증 제어기를 갖는 전기적으로 소거 가능하고 프로그램 가능한 불휘발성 메모리 장치
US5284786A (en) * 1992-08-14 1994-02-08 National Semiconductor Corporation Method of making a split floating gate EEPROM cell
JPH0677440A (ja) * 1992-08-27 1994-03-18 Mitsubishi Electric Corp 不揮発性半導体記憶装置およびその製造方法

Also Published As

Publication number Publication date
KR950034805A (ko) 1995-12-28
TW318961B (enExample) 1997-11-01
KR0184632B1 (ko) 1999-03-20
US5635416A (en) 1997-06-03
US5773861A (en) 1998-06-30
JPH07302853A (ja) 1995-11-14
JP2928986B2 (ja) 1999-08-03

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