TW201841341A - 半導體結構用支撐件 - Google Patents

半導體結構用支撐件 Download PDF

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Publication number
TW201841341A
TW201841341A TW107101223A TW107101223A TW201841341A TW 201841341 A TW201841341 A TW 201841341A TW 107101223 A TW107101223 A TW 107101223A TW 107101223 A TW107101223 A TW 107101223A TW 201841341 A TW201841341 A TW 201841341A
Authority
TW
Taiwan
Prior art keywords
support
layer
insulating layer
silicon
ohm
Prior art date
Application number
TW107101223A
Other languages
English (en)
Chinese (zh)
Inventor
派翠克 雷納德
馬賽爾 伯克卡特
弗雷德里克 奧利伯
克里斯朵 維堤蘇
路西那 卡佩羅
伊莎貝爾 伯崔德
Original Assignee
法商索泰克公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 法商索泰克公司 filed Critical 法商索泰克公司
Publication of TW201841341A publication Critical patent/TW201841341A/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3215—Doping the layers
    • H01L21/32155—Doping polycristalline - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Semiconductor Memories (AREA)
TW107101223A 2017-01-26 2018-01-12 半導體結構用支撐件 TW201841341A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
??1750646 2017-01-26
FR1750646A FR3062238A1 (fr) 2017-01-26 2017-01-26 Support pour une structure semi-conductrice

Publications (1)

Publication Number Publication Date
TW201841341A true TW201841341A (zh) 2018-11-16

Family

ID=59253590

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107101223A TW201841341A (zh) 2017-01-26 2018-01-12 半導體結構用支撐件

Country Status (9)

Country Link
US (2) US11373856B2 (enExample)
EP (1) EP3574519B1 (enExample)
JP (1) JP2020505769A (enExample)
KR (1) KR20190108138A (enExample)
CN (1) CN110199375A (enExample)
FR (1) FR3062238A1 (enExample)
SG (1) SG11201906017UA (enExample)
TW (1) TW201841341A (enExample)
WO (1) WO2018137937A1 (enExample)

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FR3104322B1 (fr) 2019-12-05 2023-02-24 Soitec Silicon On Insulator Procédé de formation d'un substrat de manipulation pour une structure composite ciblant des applications rf
EP4189734B1 (fr) 2020-07-28 2024-06-26 Soitec Procede de report d'une couche mince sur un substrat support muni d'une couche de piegeage de charges
FR3113184B1 (fr) * 2020-07-28 2022-09-16 Soitec Silicon On Insulator Procede de preparation d’un substrat support, et procede de report d’une couche mince sur ce substrat support
US11522516B2 (en) 2020-08-27 2022-12-06 RF360 Europe GmbH Thin-film surface-acoustic-wave filter using lithium niobate
WO2022141442A1 (zh) * 2020-12-31 2022-07-07 华为技术有限公司 一种集成电路、功率放大器及电子设备
FR3127588B1 (fr) 2021-09-28 2025-01-17 Lynred Procede de realisation d’au moins une fenetre optique, fenetre optique et detecteur infrarouge associes
FR3138239B1 (fr) * 2022-07-19 2024-06-21 Soitec Silicon On Insulator Procédé de fabrication d’un substrat support pour application radiofréquences
CN120530730A (zh) 2022-12-19 2025-08-22 新电元工业株式会社 一种半导体装置
WO2024134916A1 (ja) 2022-12-19 2024-06-27 新電元工業株式会社 半導体装置
CN117594521A (zh) * 2023-12-25 2024-02-23 中国科学院微电子研究所 一种低衬底漏电的rfsoi晶圆及其制备方法

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Also Published As

Publication number Publication date
SG11201906017UA (en) 2019-08-27
JP2020505769A (ja) 2020-02-20
US20200020520A1 (en) 2020-01-16
US11373856B2 (en) 2022-06-28
EP3574519B1 (en) 2020-08-19
WO2018137937A1 (en) 2018-08-02
FR3062238A1 (fr) 2018-07-27
EP3574519A1 (en) 2019-12-04
US20220301847A1 (en) 2022-09-22
KR20190108138A (ko) 2019-09-23
CN110199375A (zh) 2019-09-03

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