FR3113184B1 - Procede de preparation d’un substrat support, et procede de report d’une couche mince sur ce substrat support - Google Patents

Procede de preparation d’un substrat support, et procede de report d’une couche mince sur ce substrat support Download PDF

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Publication number
FR3113184B1
FR3113184B1 FR2007952A FR2007952A FR3113184B1 FR 3113184 B1 FR3113184 B1 FR 3113184B1 FR 2007952 A FR2007952 A FR 2007952A FR 2007952 A FR2007952 A FR 2007952A FR 3113184 B1 FR3113184 B1 FR 3113184B1
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France
Prior art keywords
support substrate
preparing
transferring
thin layer
layer onto
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Active
Application number
FR2007952A
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English (en)
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FR3113184A1 (fr
Inventor
Marcel Broekaart
Bruno Clemenceau
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Soitec SA
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Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR2007952A priority Critical patent/FR3113184B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to PCT/FR2021/051140 priority patent/WO2022023630A1/fr
Priority to JP2023501665A priority patent/JP2023535319A/ja
Priority to US18/007,145 priority patent/US20230230874A1/en
Priority to EP21740160.3A priority patent/EP4189734A1/fr
Priority to CN202180048518.0A priority patent/CN115777139A/zh
Priority to KR1020227041969A priority patent/KR20230042215A/ko
Priority to TW110126926A priority patent/TWI796735B/zh
Publication of FR3113184A1 publication Critical patent/FR3113184A1/fr
Application granted granted Critical
Publication of FR3113184B1 publication Critical patent/FR3113184B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Recrystallisation Techniques (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

L’invention porte sur un procédé de préparation d’un substrat support (1) comprenant les étapes suivantes : - fournir un substrat de base (3) présentant sur une face principale une couche de piégeage de charges (2) ; - former une couche diélectrique (4) sur la couche de piégeage de charges (2), la formation de la couche diélectrique (4) mettant simultanément en œuvre le dépôt et la pulvérisation ionique de la couche diélectrique. ( Figure 1 )
FR2007952A 2020-07-28 2020-07-28 Procede de preparation d’un substrat support, et procede de report d’une couche mince sur ce substrat support Active FR3113184B1 (fr)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR2007952A FR3113184B1 (fr) 2020-07-28 2020-07-28 Procede de preparation d’un substrat support, et procede de report d’une couche mince sur ce substrat support
JP2023501665A JP2023535319A (ja) 2020-07-28 2021-06-23 電荷トラップ層が設けられたキャリア基板に薄層を転写するプロセス
US18/007,145 US20230230874A1 (en) 2020-07-28 2021-06-23 Method for transferring a thin layer onto a support substrate provided with a charge-trapping layer
EP21740160.3A EP4189734A1 (fr) 2020-07-28 2021-06-23 Procede de report d'une couche mince sur un substrat support muni d'une couche de piegeage de charges
PCT/FR2021/051140 WO2022023630A1 (fr) 2020-07-28 2021-06-23 Procede de report d'une couche mince sur un substrat support muni d'une couche de piegeage de charges
CN202180048518.0A CN115777139A (zh) 2020-07-28 2021-06-23 将薄层转移到设有电荷俘获层的载体衬底的方法
KR1020227041969A KR20230042215A (ko) 2020-07-28 2021-06-23 전하 트래핑 층을 구비한 캐리어 기판에 박층을 전사하는 공정
TW110126926A TWI796735B (zh) 2020-07-28 2021-07-22 將薄層轉移到提供有電荷捕捉層的載體基板之方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2007952A FR3113184B1 (fr) 2020-07-28 2020-07-28 Procede de preparation d’un substrat support, et procede de report d’une couche mince sur ce substrat support
FR2007952 2020-07-28

Publications (2)

Publication Number Publication Date
FR3113184A1 FR3113184A1 (fr) 2022-02-04
FR3113184B1 true FR3113184B1 (fr) 2022-09-16

Family

ID=73038162

Family Applications (1)

Application Number Title Priority Date Filing Date
FR2007952A Active FR3113184B1 (fr) 2020-07-28 2020-07-28 Procede de preparation d’un substrat support, et procede de report d’une couche mince sur ce substrat support

Country Status (1)

Country Link
FR (1) FR3113184B1 (fr)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60041309D1 (de) 1999-03-16 2009-02-26 Shinetsu Handotai Kk Herstellungsverfahren für siliziumwafer und siliziumwafer
FR2838865B1 (fr) 2002-04-23 2005-10-14 Soitec Silicon On Insulator Procede de fabrication d'un substrat avec couche utile sur support de resistivite elevee
FR2860341B1 (fr) 2003-09-26 2005-12-30 Soitec Silicon On Insulator Procede de fabrication de structure multicouche a pertes diminuees
FR2933233B1 (fr) 2008-06-30 2010-11-26 Soitec Silicon On Insulator Substrat de haute resistivite bon marche et procede de fabrication associe
FR2953640B1 (fr) 2009-12-04 2012-02-10 S O I Tec Silicon On Insulator Tech Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante
US9768056B2 (en) 2013-10-31 2017-09-19 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition
FR3062238A1 (fr) * 2017-01-26 2018-07-27 Soitec Support pour une structure semi-conductrice
WO2020008116A1 (fr) 2018-07-05 2020-01-09 Soitec Substrat pour un dispositif integre radioafrequence et son procede de fabrication

Also Published As

Publication number Publication date
FR3113184A1 (fr) 2022-02-04

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