FR3062238A1 - Support pour une structure semi-conductrice - Google Patents

Support pour une structure semi-conductrice Download PDF

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Publication number
FR3062238A1
FR3062238A1 FR1750646A FR1750646A FR3062238A1 FR 3062238 A1 FR3062238 A1 FR 3062238A1 FR 1750646 A FR1750646 A FR 1750646A FR 1750646 A FR1750646 A FR 1750646A FR 3062238 A1 FR3062238 A1 FR 3062238A1
Authority
FR
France
Prior art keywords
support
layer
trapping layer
ohm
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR1750646A
Other languages
English (en)
French (fr)
Inventor
Patrick Reynaud
Marcel Broekaart
Frederic Allibert
Christelle Veytizou
Luciana Capello
Isabelle Bertrand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1750646A priority Critical patent/FR3062238A1/fr
Priority to US16/476,415 priority patent/US11373856B2/en
Priority to CN201880007067.4A priority patent/CN110199375A/zh
Priority to JP2019538671A priority patent/JP2020505769A/ja
Priority to SG11201906017UA priority patent/SG11201906017UA/en
Priority to KR1020197024048A priority patent/KR20190108138A/ko
Priority to PCT/EP2018/050677 priority patent/WO2018137937A1/en
Priority to EP18700172.2A priority patent/EP3574519B1/en
Priority to TW107101223A priority patent/TW201841341A/zh
Publication of FR3062238A1 publication Critical patent/FR3062238A1/fr
Priority to US17/805,206 priority patent/US20220301847A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3215Doping the layers
    • H01L21/32155Doping polycristalline - or amorphous silicon layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Semiconductor Memories (AREA)
FR1750646A 2017-01-26 2017-01-26 Support pour une structure semi-conductrice Withdrawn FR3062238A1 (fr)

Priority Applications (10)

Application Number Priority Date Filing Date Title
FR1750646A FR3062238A1 (fr) 2017-01-26 2017-01-26 Support pour une structure semi-conductrice
KR1020197024048A KR20190108138A (ko) 2017-01-26 2018-01-11 반도체 구조를 위한 지지부
CN201880007067.4A CN110199375A (zh) 2017-01-26 2018-01-11 用于半导体结构的支撑件
JP2019538671A JP2020505769A (ja) 2017-01-26 2018-01-11 半導体構造用の支持体
SG11201906017UA SG11201906017UA (en) 2017-01-26 2018-01-11 Support for a semiconductor structure
US16/476,415 US11373856B2 (en) 2017-01-26 2018-01-11 Support for a semiconductor structure
PCT/EP2018/050677 WO2018137937A1 (en) 2017-01-26 2018-01-11 Support for a semiconductor structure
EP18700172.2A EP3574519B1 (en) 2017-01-26 2018-01-11 Support for a semiconductor structure
TW107101223A TW201841341A (zh) 2017-01-26 2018-01-12 半導體結構用支撐件
US17/805,206 US20220301847A1 (en) 2017-01-26 2022-06-02 Support for a semiconductor structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1750646 2017-01-26
FR1750646A FR3062238A1 (fr) 2017-01-26 2017-01-26 Support pour une structure semi-conductrice

Publications (1)

Publication Number Publication Date
FR3062238A1 true FR3062238A1 (fr) 2018-07-27

Family

ID=59253590

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1750646A Withdrawn FR3062238A1 (fr) 2017-01-26 2017-01-26 Support pour une structure semi-conductrice

Country Status (9)

Country Link
US (2) US11373856B2 (enExample)
EP (1) EP3574519B1 (enExample)
JP (1) JP2020505769A (enExample)
KR (1) KR20190108138A (enExample)
CN (1) CN110199375A (enExample)
FR (1) FR3062238A1 (enExample)
SG (1) SG11201906017UA (enExample)
TW (1) TW201841341A (enExample)
WO (1) WO2018137937A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110687138A (zh) * 2019-09-05 2020-01-14 长江存储科技有限责任公司 半导体结构的测量与边界特征提取方法及其装置

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* Cited by examiner, † Cited by third party
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FR3062517B1 (fr) * 2017-02-02 2019-03-15 Soitec Structure pour application radiofrequence
FR3098342B1 (fr) * 2019-07-02 2021-06-04 Soitec Silicon On Insulator structure semi-conductrice comprenant une couche poreuse enterrée, pour applications RF
FR3104322B1 (fr) 2019-12-05 2023-02-24 Soitec Silicon On Insulator Procédé de formation d'un substrat de manipulation pour une structure composite ciblant des applications rf
EP4189734B1 (fr) 2020-07-28 2024-06-26 Soitec Procede de report d'une couche mince sur un substrat support muni d'une couche de piegeage de charges
FR3113184B1 (fr) * 2020-07-28 2022-09-16 Soitec Silicon On Insulator Procede de preparation d’un substrat support, et procede de report d’une couche mince sur ce substrat support
US11522516B2 (en) 2020-08-27 2022-12-06 RF360 Europe GmbH Thin-film surface-acoustic-wave filter using lithium niobate
WO2022141442A1 (zh) * 2020-12-31 2022-07-07 华为技术有限公司 一种集成电路、功率放大器及电子设备
FR3127588B1 (fr) 2021-09-28 2025-01-17 Lynred Procede de realisation d’au moins une fenetre optique, fenetre optique et detecteur infrarouge associes
FR3138239B1 (fr) * 2022-07-19 2024-06-21 Soitec Silicon On Insulator Procédé de fabrication d’un substrat support pour application radiofréquences
CN120530730A (zh) 2022-12-19 2025-08-22 新电元工业株式会社 一种半导体装置
WO2024134916A1 (ja) 2022-12-19 2024-06-27 新電元工業株式会社 半導体装置
CN117594521A (zh) * 2023-12-25 2024-02-23 中国科学院微电子研究所 一种低衬底漏电的rfsoi晶圆及其制备方法

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FR2933233A1 (fr) * 2008-06-30 2010-01-01 Soitec Silicon On Insulator Substrat de haute resistivite bon marche et procede de fabrication associe
US9129800B2 (en) * 2011-03-22 2015-09-08 Soitec Manufacturing method for a semiconductor on insulator type substrate for radiofrequency applications
US20160071959A1 (en) * 2014-09-04 2016-03-10 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
WO2016140850A1 (en) * 2015-03-03 2016-09-09 Sunedison Semiconductor Limited Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress

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FR2838865B1 (fr) 2002-04-23 2005-10-14 Soitec Silicon On Insulator Procede de fabrication d'un substrat avec couche utile sur support de resistivite elevee
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FR2860341B1 (fr) 2003-09-26 2005-12-30 Soitec Silicon On Insulator Procede de fabrication de structure multicouche a pertes diminuees
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FR3029682B1 (fr) 2014-12-04 2017-12-29 Soitec Silicon On Insulator Substrat semi-conducteur haute resistivite et son procede de fabrication
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Publication number Priority date Publication date Assignee Title
FR2933233A1 (fr) * 2008-06-30 2010-01-01 Soitec Silicon On Insulator Substrat de haute resistivite bon marche et procede de fabrication associe
US9129800B2 (en) * 2011-03-22 2015-09-08 Soitec Manufacturing method for a semiconductor on insulator type substrate for radiofrequency applications
US20160071959A1 (en) * 2014-09-04 2016-03-10 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
WO2016140850A1 (en) * 2015-03-03 2016-09-09 Sunedison Semiconductor Limited Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110687138A (zh) * 2019-09-05 2020-01-14 长江存储科技有限责任公司 半导体结构的测量与边界特征提取方法及其装置

Also Published As

Publication number Publication date
SG11201906017UA (en) 2019-08-27
JP2020505769A (ja) 2020-02-20
US20200020520A1 (en) 2020-01-16
US11373856B2 (en) 2022-06-28
EP3574519B1 (en) 2020-08-19
TW201841341A (zh) 2018-11-16
WO2018137937A1 (en) 2018-08-02
EP3574519A1 (en) 2019-12-04
US20220301847A1 (en) 2022-09-22
KR20190108138A (ko) 2019-09-23
CN110199375A (zh) 2019-09-03

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