TW201733041A - 具矽穿孔連續型態之晶圓級晶片尺寸封裝構造及其製造方法 - Google Patents

具矽穿孔連續型態之晶圓級晶片尺寸封裝構造及其製造方法 Download PDF

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TW201733041A
TW201733041A TW105106770A TW105106770A TW201733041A TW 201733041 A TW201733041 A TW 201733041A TW 105106770 A TW105106770 A TW 105106770A TW 105106770 A TW105106770 A TW 105106770A TW 201733041 A TW201733041 A TW 201733041A
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TW105106770A
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TWI595612B (zh
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方立志
張家彰
徐宏欣
張文雄
鍾基偉
連加雯
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力成科技股份有限公司
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Priority to TW105106770A priority Critical patent/TWI595612B/zh
Priority to CN201610962355.8A priority patent/CN107154387B/zh
Priority to US15/432,932 priority patent/US9972554B2/en
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Abstract

揭示一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，主要包含裝置晶片、貼合於裝置晶片之載體晶片、保護蓋片以及矽穿孔結構。一金屬互連平行墊組合嵌埋於裝置晶片中，偏移墊設置於裝置晶片並連接至金屬互連平行墊組合。間隔導體凸塊接合於偏移墊上。間隔黏合層形成於裝置晶片上並包覆間隔導體凸塊。保護蓋片壓貼於間隔黏合層上。矽穿孔結構包含一貫穿孔以及一孔金屬層，貫穿孔微偏心地對準偏移墊連續貫穿載體晶片與裝置晶片，孔金屬層形成於貫穿孔內並連接偏移墊，貫穿孔非中心對準於間隔導體凸塊。保護層形成於載體晶片並覆蓋貫穿孔。因此，藉由偏移墊上間隔導體凸塊，以確保矽穿孔結構的連續型態。

Description

具矽穿孔連續型態之晶圓級晶片尺寸封裝構造及其製造方法
本發明係有關於半導體晶片封裝領域，特別係有關於一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造及其製造方法，可適用於CMOS影像感測器晶片之封裝應用。
晶圓級晶片尺寸封裝構造(Wafer Level Chip Scale Package,WLCSP)不同於傳統的晶片封裝方式，其先在整片晶圓上進行封裝和測試，然後才切割成一個個包含IC顆粒的封裝構造，並且半導體封裝尺寸不大於晶片尺寸1.44倍之面積，有效地縮減半導體封裝體積。通常晶圓級晶片尺寸封裝構造係具備雙面縱向電性連接結構，以將外接端子接合於晶片底部，以縮小基板尺寸或省略基板構件。習知的雙面縱向電性連接結構係可為矽穿孔(Through Silicon Via,TSV)，或可為晶側重配置線路(chip side RDL)，其中矽穿孔為較佳選擇。
在其中一種使用矽穿孔之晶圓級晶片尺寸封裝製程中，係針對複合式堆疊晶片進行封裝作業，在晶圓階段先組裝成一體連接之多個複合式堆疊晶片，每一複合式堆疊晶片係包含一 體連接之裝置晶片(device chip)以及載體晶片(carrier chip)，接著使用雷射或蝕刻方式進行鑽孔以貫穿裝置晶片以及載體晶片，再以銅、金鎳銅合金、多晶矽、鎢等導電材料填入孔洞，使複合式堆疊晶片達到雙面縱向電性連接，由於不需要利用傳統的打線方式使晶片電性連接至基板，不僅節省了基板的空間也減少了打線接合的製程。然而，此種結構在進行矽穿孔製程中的雷射或蝕刻步驟時，不容易控制孔深度，常會發生孔洞的過度蝕刻(over-etching)與蝕刻不足(under-etching)的現象。當過度蝕刻，可能造成孔洞過深而穿透裝置晶片上的銲墊，並使得蝕刻物質或蝕刻電漿擴散至晶片主動面，導致微電子元件的汙染，並且容易產生晶片上的銲墊與孔洞內導電材料之間的電性連接失敗的問題。當蝕刻不足，孔洞內導電材料將無法順利連接到晶片上的銲墊。
美國發明專利US 7,781,781 B2揭示一種互補式金屬氧化物半導體影像感應器結構(Complementary metal oxide semiconductor image sensor,CMOS image sensor)，係具備使用矽穿孔之晶圓級晶片尺寸封裝型態，其係包含一基板以及一形成於基板上的感光相素結構陣列(an array of light receiving pixel structures)，每個陣列中形成有m個層級的導電結構(conductive structures)，每個層級之間形成有對應的層間絕緣材料層(interlevel dielectric material layer)，一密集邏輯配線區域(dense logic wiring region)相鄰地形成於感光相素結構陣列，並具有n個層級的導電結構，每個層級之間形成有對應的層間絕層間絕緣材料層，其中n大 於m，微透鏡陣列的微透鏡以及濾光器係形成於層間絕緣材料層上，並對準基板表面上各個感光結構的位置設置。
為了解決上述之問題，本發明之主要目的係在於提供一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造及其製造方法，達到複合式晶片結構的矽穿孔連續型態，且不會有孔過度蝕刻(hole over-etching)造成的製程污染與孔內電性連接失敗的問題。此外，不會損害複合式晶片結構內裝置晶片的金屬互連平行墊組合。
本發明的目的及解決其技術問題是採用以下技術方案來實現的。本發明揭示一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，包含一裝置晶片、一載體晶片、至少一間隔導體凸塊、一間隔黏合層、一保護蓋片、至少一矽穿孔結構、一保護層以及複數個外接端子。該裝置晶片之主體係具有一第一表面與一第二表面，其中一金屬互連平行墊組合係嵌埋於該裝置晶片之中，至少一偏移墊係設置於該第一表面並連接至該金屬互連平行墊組合，一元件設置區係形成於該第一表面。該載體晶片之主體係具有一第三表面與一第四表面，該裝置晶片之該第二表面係貼合於該載體晶片之該第三表面。該間隔導體凸塊係接合於該偏移墊上而突出於該第一表面。該間隔黏合層係形成於該裝置晶片之該第一表面上，該間隔黏合層係包覆該間隔導體凸塊。該保護蓋片係壓貼於該間隔黏合層上。該矽穿孔結構係包含一貫穿孔以及 一孔金屬層，該貫穿孔係微偏心地對準該偏移墊由該第四表面連續貫穿該載體晶片與該裝置晶片，該孔金屬層係形成於該貫穿孔內並連接該偏移墊，該貫穿孔係非中心對準於該間隔導體凸塊。該保護層係形成於該第四表面上並覆蓋該貫穿孔。該些外接端子係設置於該載體晶片而突出於該第四表面上。本發明另揭示上述具矽穿孔連續型態之晶圓級晶片尺寸封裝構造之製造方法。
本發明的目的及解決其技術問題還可採用以下技術措施進一步實現。
在前述晶圓級晶片尺寸封裝構造中，該保護層係可更封閉該矽穿孔結構之一開口而不填入該貫穿孔，以使該矽穿孔結構內具有與外部阻絕之空氣。
在前述晶圓級晶片尺寸封裝構造中，該載體晶片之該第三表面與該裝置晶片之該第二表面之間係可形成有一熔合結合層，並且該貫穿孔係可連續式貫穿該熔合結合層。
在前述晶圓級晶片尺寸封裝構造中，該裝置晶片之該第一表面上係可形成有一絕緣層，並且該貫穿孔係可連續式貫穿該絕緣層，以顯露該偏移墊。
在前述晶圓級晶片尺寸封裝構造中，該間隔導體凸塊係可包含一電鍍金屬塊。
在前述晶圓級晶片尺寸封裝構造中，該間隔導體凸塊係可包含一打線形成之結線凸塊(stud bump)。
在前述晶圓級晶片尺寸封裝構造中，該孔金屬層係 可更一體延伸為一形成於該第四表面之重配置線路，至少一之該些外接端子係可接合於該重配置線路，該些外接端子係可包含複數個銲球。
在前述晶圓級晶片尺寸封裝構造中，一導體栓係可連接在該偏移墊與該金屬互連平行墊組合之間，該間隔導體凸塊之表面覆蓋面積係可涵蓋該導體栓之形成位置。
藉由上述的技術手段，本發明可以達成以下功效：
一、本發明之晶圓級晶片尺寸封裝構造可以取代傳統打線封裝構造，並降低晶片尺寸並減少製程，進一步達成節省成本的目的。
二、本發明之晶圓級晶片尺寸封裝構造可避免在矽穿孔製程時，發生孔過度蝕刻所造成的製程污染與孔內電性連接失敗的問題。
三、本發明之晶圓級晶片尺寸封裝構造中，間隔導體凸塊可提供剛性支撐力予微偏心的矽穿孔結構，在後續半導體封裝製程中能避免晶片內金屬互連平行墊組合及其連接之偏移墊產生破裂與損壞。
M1、M2、M3‧‧‧金屬墊
100‧‧‧晶圓級晶片尺寸封裝構造
110‧‧‧裝置晶片
111‧‧‧第一表面
112‧‧‧第二表面
113‧‧‧金屬互連平行墊組合
114‧‧‧偏移墊
115‧‧‧元件設置區
116‧‧‧絕緣層
117‧‧‧表面介電層
118‧‧‧導體栓
120‧‧‧載體晶片
121‧‧‧第三表面
122‧‧‧第四表面
130‧‧‧間隔導體凸塊
140‧‧‧間隔黏合層
141‧‧‧窗口孔
150‧‧‧保護蓋片
160‧‧‧矽穿孔結構
161‧‧‧貫穿孔
162‧‧‧孔金屬層
163‧‧‧開口
164‧‧‧介電內襯
165‧‧‧重配置線路
170‧‧‧保護層
180‧‧‧外接端子
190‧‧‧熔合結合層
191‧‧‧第一熔合材料
192‧‧‧第二熔合材料
200‧‧‧晶圓級晶片尺寸封裝構造
230‧‧‧間隔導體凸塊
第1圖：依據本發明之第一具體實施例，一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造之截面示意圖。
第2A至2J圖：依據本發明之第一具體實施例，該晶圓級晶片尺寸 封裝構造之製造方法中各主要步驟之元件截面示意圖。
第3圖：依據本發明之第二具體實施例，另一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造之截面示意圖。
第4A與4B圖：依據本發明之第二具體實施例，該晶圓級晶片尺寸封裝構造之製造方法中在貫穿孔形成之前與之後的元件截面示意圖。
以下將配合所附圖示詳細說明本發明之實施例，然應注意的是，該些圖示均為簡化之示意圖，僅以示意方法來說明本發明之基本架構或實施方法，故僅顯示與本案有關之元件與組合關係，圖中所顯示之元件並非以實際實施之數目、形狀、尺寸做等比例繪製，某些尺寸比例與其他相關尺寸比例或已誇張或是簡化處理，以提供更清楚的描述。實際實施之數目、形狀及尺寸比例為一種選置性之設計，詳細之元件佈局可能更為複雜。
依據本發明之第一具體實施例，一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造100係舉例說明於第1圖之截面示意圖。該晶圓級晶片尺寸封裝構造100係包含一裝置晶片110、一載體晶片120、至少一間隔導體凸塊130、一間隔黏合層140、一保護蓋片150、至少一矽穿孔結構160、一保護層170以及複數個外接端子180。
請參閱第1圖，該裝置晶片110之主體係具有一第一表面111與一第二表面112；通常該裝置晶片110之主體係為一半 導體材料層，例如單晶矽，該裝置晶片110之該第一表面111上係可形成有一絕緣層116。其中一金屬互連平行墊組合113係嵌埋於該裝置晶片110之中，至少一偏移墊114係設置於該第一表面111並連接至該金屬互連平行墊組合113；具體地，該金屬互連平行墊組合113係由複數個金屬墊M1、M2、M3所構成，該些金屬墊M1、M2、M3係相互平行且電性互連，可利用墊與墊之間的短栓柱達到電性互連；更具體地，該些金屬墊M1、M2、M3之墊中心點係可對準在一垂直中心線；該偏移墊114之材質係可為鋁(Al)、或鋁銅合金(AlCu)。此外，一元件設置區115係形成於該第一表面111；具體地，該元件設置區115係為一影像感應元件區，可包含CMOS影像感應器之微鏡結構；在不同實施例中，該元件設置區115係可為一積體電路區或是一例如麥克風晶片感應器…等之微機電元件安裝區。一表面介電層117係可形成於該絕緣層116上，其中該絕緣層116係作為該偏移墊114之底部周邊絕緣層，該表面介電層117係作為該偏移墊114之表面周邊絕緣層。
該載體晶片120之主體係具有一第三表面121與一第四表面122，該裝置晶片110之該第二表面112係貼合於該載體晶片120之該第三表面121。該載體晶片120之該第三表面121與該裝置晶片110之該第二表面112之間係可形成有一熔合結合層190，使得該裝置晶片110與該載體晶片120之間為熔合結合(fusion bonding)。該裝置晶片110與該載體晶片120之組合因其兩者無熱膨脹係數差異，將可避免在後續熱處理製程之後產生應力 剝離，或提高了耐用度等級。
該間隔導體凸塊130係接合於該偏移墊114上而突出於該第一表面111。在本實施例中，該間隔導體凸塊130係可包含一電鍍金屬塊，其材質可包含金、銀、銅及其合金，具體材質係可為銅(Cu)或銅/鎳/金(Cu/Ni/Au)的組合。此外，在一較佳型態中，一導體栓118係可連接在該偏移墊114與該金屬互連平行墊組合113之間，該間隔導體凸塊130之表面覆蓋面積係可涵蓋該導體栓118之形成位置，以使該導體栓118得到較佳的支撐與保護。
該間隔黏合層140係形成於該裝置晶片110之該第一表面111上，該間隔黏合層140係包覆該間隔導體凸塊130，以使該間隔導體凸塊130不會曝露於大氣環境而導致電氣短路或干擾，藉此控制該間隔導體凸塊130只發揮對該矽穿孔結構160的電性連接與結構支撐之效果。具體地，該間隔黏合層140係具有一窗口孔141，以使該間隔黏合層140不覆蓋該元件設置區115。該保護蓋片150係壓貼於該間隔黏合層140上。
該矽穿孔結構160係包含一貫穿孔161以及一孔金屬層162，該貫穿孔161係微偏心地對準該偏移墊114由該第四表面122連續貫穿該載體晶片120與該裝置晶片110，該孔金屬層162係形成於該貫穿孔161內並連接該偏移墊114，該貫穿孔161係非中心對準於該間隔導體凸塊130。此外，該貫穿孔161係可連續式貫穿該熔合結合層190，該貫穿孔161之深度係可介於10~75微米(μm)。更具體地，該貫穿孔161係可連續式貫穿該絕緣層116， 以顯露該偏移墊114。一介電內襯164係可形成於該貫穿孔161之孔壁並隔離了該孔金屬層162，以避免該孔金屬層162漏電流至該載體晶片120之主體。
該保護層170係形成於該第四表面122上並覆蓋該貫穿孔161。較佳地，該保護層170係可更封閉該矽穿孔結構160之一開口163而不填入該貫穿孔161，以使該矽穿孔結構160內具有與外部阻絕之空氣。
該些外接端子180係設置於該載體晶片120而突出於該第四表面122上。較佳地，該孔金屬層162係可更一體延伸為一形成於該第四表面122之重配置線路165，該些外接端子180係可接合於該重配置線路165，該些外接端子180係可包含複數個銲球。
關於上述具矽穿孔連續型態之晶圓級晶片尺寸封裝構造100之製造方法係說明如後，第2A至2J圖係繪示在該晶圓級晶片尺寸封裝構造100之製造方法中各主要步驟之元件截面示意圖。
首先，請參閱第2A圖，提供在晶圓階段之一裝置晶片110與一載體晶片120，該裝置晶片110之主體係具有一第一表面111與一第二表面112，一金屬互連平行墊組合113係嵌埋於該裝置晶片110之中，該載體晶片120之主體係具有一第三表面121與一第四表面122。該金屬互連平行墊組合113係由複數個金屬墊M1、M2、M3所構成，其係為相互平行並且以導體栓電性互連。 其中一金屬墊M3係可貼平於該第二表面112。
之後，請參閱第2A及2B圖，結合該裝置晶片110與該載體晶片120，使得該第二表面112上之一第一熔合材料191係熔合結合於該第三表面121上之一第二熔合材料192。該熔合結合步驟係可包含一加熱製程，使得該第一熔合材料191與該第二熔合材料192熔融後冷卻結合在一起，進而形成一熔合結合層190。該熔合結合層190係可為一鍵合氧化層。
之後，請參閱第2C圖，一第一晶圓薄化步驟係實施在上述結合該裝置晶片110與該載體晶片120之步驟之後與在設置一偏移墊114(如第2D圖所示)於該第一表面111之步驟之前，以降低該裝置晶片110之厚度。
之後，請參閱第2D圖，形成一絕緣層116於該第一表面111，一導體栓118係穿透該絕緣層116並連接至該金屬互連平行墊組合113。接著，在該絕緣層116上形成至少一偏移墊114。之後，分別形成一元件設置區115以及一表面介電層117於該絕緣層116，其中，該偏移墊114係連接於該導體栓118，以該導體栓118連接至該金屬互連平行墊組合113之金屬墊M1。
之後，請參閱第2E圖，接合至少一間隔導體凸塊130於該偏移墊114上而突出於該第一表面111，在一較佳型態中，該間隔導體凸塊130之表面覆蓋面積係可涵蓋該導體栓118之形成位置。該間隔導體凸塊130係可更突出於該表面介電層117。該間隔導體凸塊130之形成方法係具體可為銅電鍍。
之後，請參閱第2F圖，形成一間隔黏合層140於該裝置晶片110之該第一表面111上，該間隔黏合層140係包覆該間隔導體凸塊130並部分覆蓋該表面介電層117，以使該間隔導體凸塊130不會曝露於大氣環境而導致電氣短路或干擾。在一較佳型態中，該間隔黏合層140係具有一窗口孔141，以使該間隔黏合層140不覆蓋該元件設置區115。該間隔黏合層140係具體可為一晶粒貼附材料(Die Attach Material,DAM)。
之後，請參閱第2G圖，壓貼一保護蓋片150於該間隔黏合層140上，以保護該元件設置區115不受外力損傷。該保護蓋片150係可為一光學玻璃，用以接收來自外部的影像。
之後，請參閱第2H圖，一第二晶圓薄化步驟係實施在上述壓貼該保護蓋片150於該間隔黏合層140上之步驟之後與在製作該矽穿孔結構160之步驟之前，以降低該載體晶片120之厚度。
之後，請參閱第2I圖，製作至少一矽穿孔結構之貫穿孔161，其中該矽穿孔結構的貫穿孔161形成方式可為雷射或蝕刻方式。由於該間隔導體凸塊130係接合於該偏移墊114，當發生過度蝕刻時，可避免蝕刻穿透該偏移墊114所造成的製程污染與孔內電性連接失敗的問題。
之後，請參閱第2J圖，在該貫穿孔161內沉積一孔金屬層162，該孔金屬層162之沉積方式可包含電鍍、真空濺鍍、化學氣相沉積、物理氣相沉積等方式。在該孔金屬層162形成之前 可在該貫穿孔161內先形成一介電內襯164，以避免該孔金屬層162漏電流。該貫穿孔161係微偏心地對準該偏移墊114由該第四表面122連續貫穿該載體晶片120與該裝置晶片110，該孔金屬層162係形成於該貫穿孔161內並連接該偏移墊114，該孔金屬層162之材質係可包含金、鎳、銅及其任一組合之合金。在一較佳形態中，該貫穿孔161係非中心對準於該間隔導體凸塊130。在一較佳型態中，該孔金屬層162係可更一體延伸為一形成於該第四表面122之重配置線路165。
再請參閱第2J圖，形成一保護層170於該第四表面122上並覆蓋該貫穿孔161，以使該孔金屬層162以及該重配置線路165不會曝露於大氣環境而導致電氣短路或干擾。在一較佳型態中，該保護層170係封閉該矽穿孔結構160之一開口163而不填入該貫穿孔161。
再請參閱第2J圖，設置複數個外接端子180於該載體晶片120而突出於該第四表面122上，在一較佳型態中，該些外接端子180係設置於該重配置線路165。
依據本發明之第二具體實施例，另一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造200係說明於第3圖之截面示意圖，其中對應於第一具體實施例相同名稱與功能之元件係以第一具體實施例的相同元件圖號表示之，相同細部特徵不再贅述。該晶圓級晶片尺寸封裝構造200係包含一裝置晶片110、一載體晶片120、至少一間隔導體凸塊230、一間隔黏合層140、一保護蓋 片150、至少一矽穿孔結構160、一保護層170以及複數個外接端子180。
請參閱第3圖，該裝置晶片110之主體係具有一第一表面111與一第二表面112，其中一金屬互連平行墊組合113係嵌埋於該裝置晶片110之中。至少一偏移墊114係設置於該第一表面111並連接至該金屬互連平行墊組合113，該偏移墊114之材料可包含銅、鋁及其合金。一元件設置區115係形成於該第一表面111。
該載體晶片120之主體係具有一第三表面121與一第四表面122，該裝置晶片110之該第二表面112係貼合於該載體晶片120之該第三表面121。
在本實施例中，該間隔導體凸塊230係接合於該偏移墊114上而突出於該第一表面111。具體地，該間隔導體凸塊230係可包含一打線形成之結線凸塊(stud bump)，其係提供剛性支撐力，可避免在後續半導體封裝製程中晶圓級晶片尺寸封裝構造200進行熱處理製程時，因熱應力的不匹配所導致的破裂與損壞。較佳地，該間隔導體凸塊230之材質可包含金、銀、銅及其合金，其具體材質係可為金(Au)、銀(Ag)或銅(Cu)。
在本實施例中，該間隔黏合層140係形成於該裝置晶片110之該第一表面111上，該間隔黏合層140係包覆該間隔導體凸塊230。該保護蓋片150係壓貼於該間隔黏合層140上。
在本實施例中，該貫穿孔161係微偏心地對準該偏移墊114由該第四表面122連續貫穿該載體晶片120與該裝置晶片 110，該孔金屬層162係形成於該貫穿孔161內並連接該偏移墊114，該貫穿孔161係非中心對準於該間隔導體凸塊230。此外，該貫穿孔161係可連續式貫穿該熔合結合層190。更具體地，該貫穿孔161係可連續式貫穿該絕緣層116，以顯露該偏移墊114。一介電內襯164係可形成於該貫穿孔161之孔壁並隔離了該孔金屬層162，以避免該孔金屬層162漏電流至該裝置晶片110之主體與該載體晶片120之主體。
在本實施例中，該保護層170係形成於該第四表面122上並覆蓋該貫穿孔161。較佳地，該保護層170係可更封閉該矽穿孔結構160之一開口163而不填入該貫穿孔161，以使該矽穿孔結構160內具有與外部阻絕之空氣。
在本實施例中，該些外接端子180係設置於該載體晶片120而突出於該第四表面122上。較佳地，該孔金屬層162係可更一體延伸為一形成於該第四表面122之重配置線路165，該些外接端子180係可接合於該重配置線路165，該些外接端子180係可包含複數個銲球。
關於第二具體實施例之晶圓級晶片尺寸封裝構造200之製造方法係大致相同於第一具體實施例之晶圓級晶片尺寸封裝構造100之製造方法。第4A與4B圖係為該晶圓級晶片尺寸封裝構造200之製造方法中在貫穿孔形成之前與之後的元件截面示意圖。該晶圓級晶片尺寸封裝構造200之製造方法中在貫穿孔形成之前的步驟係可相同於第一具體實施例對應第2A至2G圖之步 驟操作。
請參閱第4A圖，在矽穿孔結構之貫穿孔形成之前，對該載體晶片120實施一第二晶圓薄化步驟，以降低該載體晶片120之厚度。
請參閱第4B圖，製作至少一矽穿孔結構之一貫穿孔161，該貫穿孔161係微偏心地對準該偏移墊114由該第四表面122連續貫穿該載體晶片120與該裝置晶片110。在一較佳形態中，該貫穿孔161係非中心對準於該間隔導體凸塊230。由於該間隔導體凸塊230係接合於該偏移墊114，當發生過度蝕刻時，可避免蝕刻穿透該偏移墊114所造成的製程污染與孔內電性連接失敗的問題。
因此，本發明提供了一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造及其製造方法，不僅可以取代傳統打線封裝構造，降低晶片尺寸並減少製程，達到複合式晶片結構的矽穿孔連續型態，且不會有孔過度蝕刻(hole over-etching)造成的製程污染與孔內電性連接失敗的問題，進一步達成高成品率並節省成本。
以上所揭露的僅為本發明較佳實施例而已，當然不能以此來限定本發明之權利範圍，因此依本發明權利要求所作的等同變化，仍屬本發明所涵蓋的範圍。
M1、M2、M3‧‧‧金屬墊
100‧‧‧晶圓級晶片尺寸封裝構造
110‧‧‧裝置晶片
111‧‧‧第一表面
112‧‧‧第二表面
113‧‧‧金屬互連平行墊組合
114‧‧‧偏移墊
115‧‧‧元件設置區
116‧‧‧絕緣層
117‧‧‧表面介電層
118‧‧‧導體栓
120‧‧‧載體晶片
121‧‧‧第三表面
122‧‧‧第四表面
130‧‧‧間隔導體凸塊
140‧‧‧間隔黏合層
141‧‧‧窗口孔
150‧‧‧保護蓋片
160‧‧‧矽穿孔結構
161‧‧‧貫穿孔
162‧‧‧孔金屬層
163‧‧‧開口
164‧‧‧介電內襯
165‧‧‧重配置線路
170‧‧‧保護層
180‧‧‧外接端子
190‧‧‧熔合結合層

Claims (10)

  1. 一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，包含：一裝置晶片，該裝置晶片之主體係具有一第一表面與一第二表面，其中一金屬互連平行墊組合係嵌埋於該裝置晶片之中，至少一偏移墊係設置於該第一表面並連接至該金屬互連平行墊組合，一元件設置區係形成於該第一表面；一載體晶片，該載體晶片之主體係具有一第三表面與一第四表面，該裝置晶片之該第二表面係貼合於該載體晶片之該第三表面；至少一間隔導體凸塊，係接合於該偏移墊上而突出於該第一表面；一間隔黏合層，係形成於該裝置晶片之該第一表面上，該間隔黏合層係包覆該間隔導體凸塊；一保護蓋片，係壓貼於該間隔黏合層上；至少一矽穿孔結構，係包含一貫穿孔以及一孔金屬層，該貫穿孔係微偏心地對準該偏移墊由該第四表面連續貫穿該載體晶片與該裝置晶片，該孔金屬層係形成於該貫穿孔內並連接該偏移墊，該貫穿孔係非中心對準於該間隔導體凸塊；一保護層，係形成於該第四表面上並覆蓋該貫穿孔；以及複數個外接端子，係設置於該載體晶片而突出於該第四表面上。
  2. 如申請專利範圍第1項所述之具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，其中該保護層係更封閉該矽穿孔結構之一開口而不填入該貫穿孔，以使該矽穿孔結構內具有與外部阻 絕之空氣。
  3. 如申請專利範圍第1項所述之具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，其中該載體晶片之該第三表面與該裝置晶片之該第二表面之間係形成有一熔合結合層，並且該貫穿孔係連續式貫穿該熔合結合層。
  4. 如申請專利範圍第3項所述之具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，其中該裝置晶片之該第一表面上係形成有一絕緣層，並且該貫穿孔係連續式貫穿該絕緣層，以顯露該偏移墊。
  5. 如申請專利範圍第1項所述之具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，其中該間隔導體凸塊係包含一電鍍金屬塊。
  6. 如申請專利範圍第1項所述之具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，其中該間隔導體凸塊係包含一打線形成之結線凸塊(stud bump)。
  7. 如申請專利範圍第1項所述之具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，其中該孔金屬層係更一體延伸為一形成於該第四表面之重配置線路，至少一之該些外接端子係接合於該重配置線路，該些外接端子係包含複數個銲球。
  8. 如申請專利範圍第1至7項任一項所述之具矽穿孔連續型態之晶圓級晶片尺寸封裝構造，其中一導體栓係連接在該偏移墊與該金屬互連平行墊組合之間，該間隔導體凸塊之表面覆蓋面積係涵蓋該導體栓之形成位置。
  9. 一種具矽穿孔連續型態之晶圓級晶片尺寸封裝構造之製造方 法，包含：提供一裝置晶片與一載體晶片，該裝置晶片之主體係具有一第一表面與一第二表面，一金屬互連平行墊組合係嵌埋於該裝置晶片之中，該載體晶片之主體係具有一第三表面與一第四表面；結合該裝置晶片與該載體晶片，使得該裝置晶片之該第二表面係貼合於該載體晶片之該第三表面；設置至少一偏移墊於該第一表面，並且該偏移墊係連接至該金屬互連平行墊組合；形成一元件設置區於該第一表面；接合至少一間隔導體凸塊於該偏移墊上而突出於該第一表面；形成一間隔黏合層於該裝置晶片之該第一表面上，該間隔黏合層係包覆該間隔導體凸塊；壓貼一保護蓋片於該間隔黏合層上；製作至少一矽穿孔結構，該矽穿孔結構係包含一貫穿孔以及一孔金屬層，該貫穿孔係微偏心地對準該偏移墊由該第四表面連續貫穿該載體晶片與該裝置晶片，該孔金屬層係形成於該貫穿孔內並連接該偏移墊，該貫穿孔係非中心對準於該間隔導體凸塊；形成一保護層於該第四表面上並覆蓋該貫穿孔；以及設置複數個外接端子於該載體晶片而突出於該第四表面上。
  10. 如申請專利範圍第9項所述之具矽穿孔連續型態之晶圓級晶片尺寸封裝構造之製造方法，另包含一第一晶圓薄化步驟與 一第二晶圓薄化步驟，其中該第一晶圓薄化步驟係實施在上述結合該裝置晶片與該載體晶片之步驟之後與在上述設置該偏移墊於該第一表面之步驟之前，以降低該裝置晶片之厚度，該第二晶圓薄化步驟係實施在上述壓貼該保護蓋片於該間隔黏合層上之步驟之後與在上述製作該矽穿孔結構之步驟之前，以降低該載體晶片之厚度。
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