CN107154387A - 具硅穿孔连续型态的晶圆级晶片尺寸封装构造及制造方法 - Google Patents

具硅穿孔连续型态的晶圆级晶片尺寸封装构造及制造方法 Download PDF

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CN107154387A
CN107154387A CN201610962355.8A CN201610962355A CN107154387A CN 107154387 A CN107154387 A CN 107154387A CN 201610962355 A CN201610962355 A CN 201610962355A CN 107154387 A CN107154387 A CN 107154387A
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wafer
hole
silicon perforation
device wafer
pad
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CN107154387B (zh
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方立志
张家彰
徐宏欣
张文雄
鍾基伟
连加雯
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Powertech Technology Inc
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Powertech Technology Inc
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Abstract

本发明公开了一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造及制造方法。该封装构造，主要包含装置晶片、贴合于装置晶片的载体晶片、保护盖片以及硅穿孔结构。一金属互连平行垫组合嵌埋于装置晶片中，偏移垫设置于装置晶片并连接至金属互连平行垫组合。间隔导体凸块接合于偏移垫上。间隔黏合层形成于装置晶片上并包覆间隔导体凸块。保护盖片压贴于间隔黏合层上。硅穿孔结构包含一贯穿孔以及一孔金属层，贯穿孔微偏心地对准偏移垫连续贯穿载体晶片与装置晶片，孔金属层形成于贯穿孔内并连接偏移垫，贯穿孔非中心对准于间隔导体凸块。保护层形成于载体晶片并覆盖贯穿孔。因此，借由偏移垫上间隔导体凸块，以确保硅穿孔结构的连续型态。

Description

具硅穿孔连续型态的晶圆级晶片尺寸封装构造及制造方法
技术领域
本发明有关于半导体晶片封装领域，特别有关于一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造及其制造方法，可适用于CMOS影像传感器晶片之封装应用。
背景技术
晶圆级晶片尺寸封装构造(Wafer Level Chip Scale Package, WLCSP)不同于传统的晶片封装方式，其先在整片晶圆上进行封装和测试，然后才切割成一个个包含IC颗粒的封装构造，并且半导体封装尺寸不大于晶片尺寸1.44倍的面积，有效地缩减半导体封装体积。通常晶圆级晶片尺寸封装构造具备双面纵向电性连接结构，以将外接端子接合于晶片底部，以缩小基板尺寸或省略基板构件。现有的双面纵向电性连接结构可为硅穿孔(Through Silicon Via, TSV)，或可为晶侧重配置线路(chip side RDL)，其中硅穿孔为较佳选择。
在其中一种使用硅穿孔的晶圆级晶片尺寸封装制程中，是针对复合式堆栈晶片进行封装作业，在晶圆阶段先组装成一体连接的多个复合式堆栈晶片，每一复合式堆栈晶片包含一体连接的装置晶片(device chip)以及载体晶片(carrier chip)，接着使用激光或蚀刻方式进行钻孔以贯穿装置晶片以及载体晶片，再以铜、金镍铜合金、多晶硅、钨等导电材料填入孔洞，使复合式堆栈晶片达到双面纵向电性连接，由于不需要利用传统的打线方式使晶片电性连接至基板，不仅节省了基板的空间也减少了打线接合的制程。然而，此种结构在进行硅穿孔制程中的激光或蚀刻步骤时，不容易控制孔深度，常会发生孔洞的过度蚀刻(over-etching)与蚀刻不足(under-etching)的现象。当过度蚀刻，可能造成孔洞过深而穿透装置晶片上的焊垫，并使得蚀刻物质或蚀刻电浆扩散至晶片主动面，导致微电子组件的污染，并且容易产生晶片上的焊垫与孔洞内导电材料之间的电性连接失败的问题。当蚀刻不足，孔洞内导电材料将无法顺利连接到晶片上的焊垫。
发明内容
为了解决上述技术问题，本发明的主要目的在于提供一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造及其制造方法，达到复合式晶片结构的硅穿孔连续型态，且不会有孔过度蚀刻(hole over-etching)造成的制程污染与孔内电性连接失败的问题。此外，不会损害复合式晶片结构内装置晶片的金属互连平行垫组合。
本发明的目的及解决其技术问题是采用以下技术方案来实现的。
本发明提供一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造，包含：
一装置晶片，该装置晶片的主体具有一第一表面与一第二表面，其中一金属互连平行垫组合嵌埋于该装置晶片之中，至少一偏移垫设置于该第一表面并连接至该金属互连平行垫组合，一组件设置区形成于该第一表面；
一载体晶片，该载体晶片的主体具有一第三表面与一第四表面，该装置晶片的该第二表面贴合于该载体晶片的该第三表面；
至少一间隔导体凸块，接合于该偏移垫上而突出于该第一表面；
一间隔黏合层，形成于该装置晶片的该第一表面上，该间隔黏合层包覆该间隔导体凸块；
一保护盖片，压贴于该间隔黏合层上；
至少一硅穿孔结构，包含一贯穿孔以及一孔金属层，该贯穿孔对着该偏移垫由该第四表面连续贯穿该载体晶片与该装置晶片，该孔金属层形成于该贯穿孔内并连接该偏移垫，该贯穿孔非中心对准于该间隔导体凸块；
一保护层，形成于该第四表面上并覆盖该贯穿孔；以及
多个外接端子，设置于该载体晶片而突出于该第四表面上。
优选地，在上述具硅穿孔连续型态的晶圆级晶片尺寸封装构造中，该保护层更封闭该硅穿孔结构的一开口而不填入该贯穿孔，以使该硅穿孔结构内具有与外部阻绝的空气。
优选地，在上述具硅穿孔连续型态的晶圆级晶片尺寸封装构造中，该载体晶片的该第三表面与该装置晶片的该第二表面之间形成有一熔合结合层，并且该贯穿孔连续式贯穿该熔合结合层。
优选地，在该孔金属层形成之前，在该贯穿孔内形成一介电内衬，以避免该孔金属层漏电流。
优选地，在上述具硅穿孔连续型态的晶圆级晶片尺寸封装构造中，该间隔导体凸块包含一电镀金属块。
优选地，在上述具硅穿孔连续型态的晶圆级晶片尺寸封装构造中，该间隔导体凸块包含一打线形成的结线凸块。
优选地，在上述具硅穿孔连续型态的晶圆级晶片尺寸封装构造中，该孔金属层更一体延伸为一形成于该第四表面的重配置线路，至少一个外接端子接合于该重配置线路，该多个外接端子包含多个焊球。
优选地，在上述具硅穿孔连续型态的晶圆级晶片尺寸封装构造中，一导体栓连接在该偏移垫与该金属互连平行垫组合之间，该间隔导体凸块的表面覆盖面积涵盖该导体栓的形成位置。
本发明还提供一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造的制造方法，包含：
提供一装置晶片与一载体晶片，该装置晶片的主体具有一第一表面与一第二表面，一金属互连平行垫组合嵌埋于该装置晶片之中，该载体晶片的主体具有一第三表面与一第四表面；
结合该装置晶片与该载体晶片，使得该装置晶片的该第二表面贴合于该载体晶片的该第三表面；
设置至少一偏移垫于该第一表面，并且该偏移垫连接至该金属互连平行垫组合；
形成一组件设置区于该第一表面；
接合至少一间隔导体凸块于该偏移垫上而突出于该第一表面；
形成一间隔黏合层于该装置晶片的该第一表面上，该间隔黏合层包覆该间隔导体凸块；
压贴一保护盖片于该间隔黏合层上；
制作至少一硅穿孔结构，该硅穿孔结构包含一贯穿孔以及一孔金属层，该贯穿孔对着该偏移垫由该第四表面连续贯穿该载体晶片与该装置晶片，该孔金属层形成于该贯穿孔内并连接该偏移垫，该贯穿孔非中心对准于该间隔导体凸块；
形成一保护层于该第四表面上并覆盖该贯穿孔；以及
设置多个外接端子于该载体晶片而突出于该第四表面上。
优选地，上述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造的制造方法，另包含一第一晶圆薄化步骤与一第二晶圆薄化步骤，其中该第一晶圆薄化步骤实施在上述结合该装置晶片与该载体晶片的步骤之后与在上述设置该偏移垫于该第一表面的步骤之前，以降低该装置晶片的厚度，该第二晶圆薄化步骤实施在上述压贴该保护盖片于该间隔黏合层上的步骤之后与在上述制作该硅穿孔结构的步骤之前，以降低该载体晶片的厚度。
借由上述的技术手段，本发明可以达成以下功效：
一、本发明的晶圆级晶片尺寸封装构造可以取代传统打线封装构造，并降低晶片尺寸并减少制程，进一步达成节省成本的目的。
二、本发明的晶圆级晶片尺寸封装构造可避免在硅穿孔制程时，发生孔过度蚀刻所造成的制程污染与孔内电性连接失败的问题。
三、本发明的晶圆级晶片尺寸封装构造中，间隔导体凸块可提供刚性支撑力予微偏心的硅穿孔结构，在后续半导体封装制程中能避免晶片内金属互连平行垫组合及其连接的偏移垫产生破裂与损坏。
附图说明
图1：依据本发明的第一具体实施例，一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造的截面示意图。
图2A至图2J：依据本发明的第一具体实施例，该晶圆级晶片尺寸封装构造的制造方法中各主要步骤的组件截面示意图。
图3：依据本发明的第二具体实施例，另一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造的截面示意图。
图4A与图4B：依据本发明 第二具体实施例，该晶圆级晶片尺寸封装构造的制造方法中在贯穿孔形成之前与之后的组件截面示意图。
附图标记：
M1、M2、M3 金属垫；
100 晶圆级晶片尺寸封装构造；
110 装置晶片； 111 第一表面；
112 第二表面； 113 金属互连平行垫组合；
114 偏移垫； 115 组件设置区；
116 绝缘层； 117 表面介电层；
118 导体栓；
120 载体晶片； 121 第三表面；
122 第四表面；
130 间隔导体凸块；
140 间隔黏合层； 141 窗口孔；
150 保护盖片；
160 硅穿孔结构； 161 贯穿孔；
162 孔金属层； 163 开口；
164 介电内衬； 165 重配置线路；
170 保护层； 180 外接端子；
190 熔合结合层； 191 第一熔合材料；
192 第二熔合材料；
200 晶圆级晶片尺寸封装构造；
230 间隔导体凸块。
具体实施方式
下面结合附图和具体实施例对本发明作进一步说明，以使本领域的技术人员可以更好的理解本发明并能予以实施，但所举实施例不作为对本发明的限定。
依据本发明的第一具体实施例，一种具硅穿孔连续型态 晶圆级晶片尺寸封装构造100举例说明于图1的截面示意图。该晶圆级晶片尺寸封装构造100包含一装置晶片110、一载体晶片120、至少一间隔导体凸块130、一间隔黏合层140、一保护盖片150、至少一硅穿孔结构160、一保护层170以及多个外接端子180。
请参阅图1，该装置晶片110的主体具有一第一表面111与一第二表面112；通常该装置晶片110的主体为一半导体材料层，例如单晶硅，该装置晶片110的该第一表面111上可形成有一绝缘层116。其中一金属互连平行垫组合113嵌埋于该装置晶片110之中，至少一偏移垫114设置于该第一表面111并连接至该金属互连平行垫组合113；具体地，该金属互连平行垫组合113由多个金属垫M1、M2、M3所构成，该些金属垫M1、M2、M3相互平行且电性互连，可利用垫与垫之间的短栓柱达到电性互连；更具体地，该些金属垫M1、M2、M3的垫中心点可对准在一垂直中心线；该偏移垫114的材质可为铝(Al)、或铝铜合金(AlCu)。此外，一组件设置区115形成于该第一表面111；具体地，该组件设置区115为一影像感应组件区，可包含CMOS影像传感器的微镜结构；在不同实施例中，该组件设置区115可为一集成电路区或是一例如麦克风晶片传感器…等的微机电组件安装区。一表面介电层117可形成于该绝缘层116上，其中该绝缘层116作为该偏移垫114的底部周边绝缘层，该表面介电层117作为该偏移垫114的表面周边绝缘层。
该载体晶片120的主体具有一第三表面121与一第四表面122，该装置晶片110的该第二表面112贴合于该载体晶片120的该第三表面121。该载体晶片120的该第三表面121与该装置晶片110的该第二表面112之间可形成有一熔合结合层190，使得该装置晶片110与该载体晶片120之间为熔合结合(fusion bonding)。该装置晶片110与该载体晶片120的组合因其两者无热膨胀系数差异，将可避免在后续热处理制程之后产生应力剥离，或提高了耐用度等级。
该间隔导体凸块130接合于该偏移垫114上而突出于该第一表面111。在本实施例中，该间隔导体凸块130可包含一电镀金属块，其材质可包含金、银、铜及其合金，具体材质可为铜(Cu)或铜/镍/金(Cu/Ni/Au)的组合。此外，在一较佳型态中，一导体栓118可连接在该偏移垫114与该金属互连平行垫组合113之间，该间隔导体凸块130的表面覆盖面积可涵盖该导体栓118的形成位置，以使该导体栓118得到较佳的支撑与保护。
该间隔黏合层140形成于该装置晶片110的该第一表面111上，该间隔黏合层140包覆该间隔导体凸块130，以使该间隔导体凸块130不会曝露于大气环境而导致电气短路或干扰，借此控制该间隔导体凸块130只发挥对该硅穿孔结构160的电性连接与结构支撑的效果。具体地，该间隔黏合层140具有一窗口孔141，以使该间隔黏合层140不覆盖该组件设置区115。该保护盖片150压贴于该间隔黏合层140上。
该硅穿孔结构160包含一贯穿孔161以及一孔金属层162，该贯穿孔161微偏心地对准该偏移垫114由该第四表面122连续贯穿该载体晶片120与该装置晶片110，该孔金属层162形成于该贯穿孔161内并连接该偏移垫114，该贯穿孔161非中心对准于该间隔导体凸块130。此外，该贯穿孔161可连续式贯穿该熔合结合层190，该贯穿孔161的深度可介于10~75微米(μm)。更具体地，该贯穿孔161可连续式贯穿该绝缘层116，以显露该偏移垫114。一介电内衬164可形成于该贯穿孔161的孔壁并隔离了该孔金属层162，以避免该孔金属层162漏电流至该载体晶片120的主体。
该保护层170形成于该第四表面122上并覆盖该贯穿孔161。较佳地，该保护层170可更封闭该硅穿孔结构160的一开口163而不填入该贯穿孔161，以使该硅穿孔结构160内具有与外部阻绝的空气。
该些外接端子180设置于该载体晶片120而突出于该第四表面122上。较佳地，该孔金属层162可更一体延伸为一形成于该第四表面122的重配置线路165，该些外接端子180可接合于该重配置线路165，该些外接端子180可包含多个焊球。
关于上述具硅穿孔连续型态的晶圆级晶片尺寸封装构造100的制造方法说明如后，图2A至图2J绘示在该晶圆级晶片尺寸封装构造100的制造方法中各主要步骤的组件截面示意图。
首先，请参阅图2A，提供在晶圆阶段的一装置晶片110与一载体晶片120，该装置晶片110的主体具有一第一表面111与一第二表面112，一金属互连平行垫组合113嵌埋于该装置晶片110之中，该载体晶片120的主体具有一第三表面121与一第四表面122。该金属互连平行垫组合113由多个金属垫M1、M2、M3所构成，其为相互平行并且以导体栓电性互连。其中一金属垫M3可贴平于该第二表面112。
之后，请参阅图2A及图2B，结合该装置晶片110与该载体晶片120，使得该第二表面112上的一第一熔合材料191熔合结合于该第三表面121上的一第二熔合材料192。该熔合结合步骤可包含一加热制程，使得该第一熔合材料191与该第二熔合材料192熔融后冷却结合在一起，进而形成一熔合结合层190。该熔合结合层190可为一键合氧化层。
之后，请参阅图2C，一第一晶圆薄化步骤实施在上述结合该装置晶片110与该载体晶片120的步骤之后与在设置一偏移垫114(如图2D所示)于该第一表面111的步骤之前，以降低该装置晶片110的厚度。
之后，请参阅图2D，形成一绝缘层116于该第一表面111，一导体栓118穿透该绝缘层116并连接至该金属互连平行垫组合113。接着，在该绝缘层116上形成至少一偏移垫114。之后，分别形成一组件设置区115以及一表面介电层117于该绝缘层116，其中，该偏移垫114连接于该导体栓118，以该导体栓118连接至该金属互连平行垫组合113的金属垫M1。
之后，请参阅图2E，接合至少一间隔导体凸块130于该偏移垫114上而突出于该第一表面111，该间隔导体凸块130的表面覆盖面积可涵盖该导体栓118的形成位置。该间隔导体凸块130可更突出于该表面介电层117。该间隔导体凸块130的形成方法具体可为铜电镀。
之后，请参阅图2F，形成一间隔黏合层140于该装置晶片110的该第一表面111上，该间隔黏合层140包覆该间隔导体凸块130并部分覆盖该表面介电层117，以使该间隔导体凸块130不会曝露于大气环境而导致电气短路或干扰。在一较佳型态中，该间隔黏合层140具有一窗口孔141，以使该间隔黏合层140不覆盖该组件设置区115。该间隔黏合层140具体可为一晶粒贴附材料(Die Attach Material, DAM)。
之后，请参阅图2G，压贴一保护盖片150于该间隔黏合层140上，以保护该组件设置区115不受外力损伤。该保护盖片150可为一光学玻璃，用以接收来自外部的影像。
之后，请参阅图2H，一第二晶圆薄化步骤实施在上述压贴该保护盖片150于该间隔黏合层140上的步骤之后与在制作该硅穿孔结构160的步骤之前，以降低该载体晶片120的厚度。
之后，请参阅图2I，制作至少一硅穿孔结构的贯穿孔161，其中该硅穿孔结构的贯穿孔161形成方式可为激光或蚀刻方式。由于该间隔导体凸块130接合于该偏移垫114，当发生过度蚀刻时，可避免蚀刻穿透该偏移垫114所造成的制程污染与孔内电性连接失败的问题。
之后，请参阅图2J，在该贯穿孔161内沉积一孔金属层162，该孔金属层162的沉积方式可包含电镀、真空溅镀、化学气相沉积、物理气相沉积等方式。在该孔金属层162形成之前可在该贯穿孔161内先形成一介电内衬164，以避免该孔金属层162漏电流。该贯穿孔161对着该偏移垫114由该第四表面122连续贯穿该载体晶片120与该装置晶片110，该孔金属层162形成于该贯穿孔161内并连接该偏移垫114，该孔金属层162的材质可包含金、镍、铜及其任一组合的合金。在一较佳形态中，该贯穿孔161非中心对准于该间隔导体凸块130。该孔金属层162可更一体延伸为一形成于该第四表面122的重配置线路165。
再请参阅图2J，形成一保护层170于该第四表面122上并覆盖该贯穿孔161，以使该孔金属层162以及该重配置线路165不会曝露于大气环境而导致电气短路或干扰。该保护层170封闭该硅穿孔结构160的一开口163而不填入该贯穿孔161。
再请参阅图2J，设置多个外接端子180于该载体晶片120而突出于该第四表面122上，该些外接端子180设置于该重配置线路165。
依据本发明的第二具体实施例，另一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造200说明于图3的截面示意图，其中对应于第一具体实施例相同名称与功能的组件以第一具体实施例的相同组件图号表示之，相同细部特征不再赘述。该晶圆级晶片尺寸封装构造200包含一装置晶片110、一载体晶片120、至少一间隔导体凸块230、一间隔黏合层140、一保护盖片150、至少一硅穿孔结构160、一保护层170以及多个外接端子180。
请参阅图3，该装置晶片110主体具有一第一表面111与一第二表面112，其中一金属互连平行垫组合113嵌埋于该装置晶片110之中。至少一偏移垫114设置于该第一表面111并连接至该金属互连平行垫组合113，该偏移垫114的材料可包含铜、铝及其合金。一组件设置区115形成于该第一表面111。
该载体晶片120的主体具有一第三表面121与一第四表面122，该装置晶片110的该第二表面112贴合于该载体晶片120的该第三表面121。
在本实施例中，该间隔导体凸块230接合于该偏移垫114上而突出于该第一表面111。具体地，该间隔导体凸块230可包含一打线形成的结线凸块(stud bump)，其提供刚性支撑力，可避免在后续半导体封装制程中晶圆级晶片尺寸封装构造200进行热处理制程时，因热应力的不匹配所导致的破裂与损坏。该间隔导体凸块230的材质可包含金、银、铜及其合金，其具体材质可为金(Au)、银(Ag)或铜(Cu)。
在本实施例中，该间隔黏合层140形成于该装置晶片110的该第一表面111上，该间隔黏合层140包覆该间隔导体凸块230。该保护盖片150压贴于该间隔黏合层140上。
在本实施例中，该贯穿孔161微偏心地对准该偏移垫114由该第四表面122连续贯穿该载体晶片120与该装置晶片110，该孔金属层162形成于该贯穿孔161内并连接该偏移垫114，该贯穿孔161非中心对准于该间隔导体凸块230。此外，该贯穿孔161可连续式贯穿该熔合结合层190。该贯穿孔161可连续式贯穿该绝缘层116，以显露该偏移垫114。一介电内衬164可形成于该贯穿孔161的孔壁并隔离了该孔金属层162，以避免该孔金属层162漏电流至该装置晶片110的主体与该载体晶片120的主体。
在本实施例中，该保护层170形成于该第四表面122上并覆盖该贯穿孔161。该保护层170可更封闭该硅穿孔结构160的一开口163而不填入该贯穿孔161，以使该硅穿孔结构160内具有与外部阻绝的空气。
在本实施例中，该些外接端子180设置于该载体晶片120而突出于该第四表面122上。较佳地，该孔金属层162可更一体延伸为一形成于该第四表面122的重配置线路165，该些外接端子180可接合于该重配置线路165，该些外接端子180可包含多个焊球。
关于第二具体实施例的晶圆级晶片尺寸封装构造200的制造方法大致相同于第一具体实施例的晶圆级晶片尺寸封装构造100的制造方法。图4A与图4B为该晶圆级晶片尺寸封装构造200的制造方法中在贯穿孔形成之前与之后的组件截面示意图。该晶圆级晶片尺寸封装构造200的制造方法中在贯穿孔形成之前的步骤可相同于第一具体实施例对应图2A至图2G的步骤操作。
请参阅图4A，在硅穿孔结构的贯穿孔形成之前，对该载体晶片120实施一第二晶圆薄化步骤，以降低该载体晶片120的厚度。
请参阅图4B，制作至少一硅穿孔结构的一贯穿孔161，该贯穿孔161微偏心地对准该偏移垫114由该第四表面122连续贯穿该载体晶片120与该装置晶片110。在一较佳形态中，该贯穿孔161非中心对准于该间隔导体凸块230。由于该间隔导体凸块230接合于该偏移垫114，当发生过度蚀刻时，可避免蚀刻穿透该偏移垫114所造成的制程污染与孔内电性连接失败的问题。
因此，本发明提供了一种具硅穿孔连续型态之晶圆级晶片尺寸封装构造及其制造方法，不仅可以取代传统打线封装构造，降低晶片尺寸并减少制程，达到复合式晶片结构的硅穿孔连续型态，且不会有孔过度蚀刻(hole over-etching)造成的制程污染与孔内电性连接失败的问题，进一步达成高成品率并节省成本。
以上所述实施例仅是为充分说明本发明而所举的较佳的实施例，本发明的保护范围不限于此。本技术领域的技术人员在本发明基础上所作的等同替代或变换，均在本发明的保护范围之内。本发明的保护范围以权利要求书为准。

Claims (10)

1.一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造，其特征在于，包含：
一装置晶片，该装置晶片的主体具有一第一表面与一第二表面，其中一金属互连平行垫组合嵌埋于该装置晶片之中，至少一偏移垫设置于该第一表面并连接至该金属互连平行垫组合，一组件设置区形成于该第一表面；
一载体晶片，该载体晶片的主体具有一第三表面与一第四表面，该装置晶片的该第二表面贴合于该载体晶片的该第三表面；
至少一间隔导体凸块，接合于该偏移垫上而突出于该第一表面；
一间隔黏合层，形成于该装置晶片的该第一表面上，该间隔黏合层包覆该间隔导体凸块；
一保护盖片，压贴于该间隔黏合层上；
至少一硅穿孔结构，包含一贯穿孔以及一孔金属层，该贯穿孔对着该偏移垫由该第四表面连续贯穿该载体晶片与该装置晶片，该孔金属层形成于该贯穿孔内并连接该偏移垫，该贯穿孔非中心对准于该间隔导体凸块；
一保护层，形成于该第四表面上并覆盖该贯穿孔；以及
多个外接端子，设置于该载体晶片而突出于该第四表面上。
2.如权利要求1所述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造，其特征在于，该保护层更封闭该硅穿孔结构的一开口而不填入该贯穿孔，以使该硅穿孔结构内具有与外部阻绝的空气。
3.如权利要求1所述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造，其特征在于，该载体晶片的该第三表面与该装置晶片的该第二表面之间形成有一熔合结合层，并且该贯穿孔连续式贯穿该熔合结合层。
4.如权利要求3所述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造，其特征在于，在该孔金属层形成之前，在该贯穿孔内形成一介电内衬，以避免该孔金属层漏电流。
5.如权利要求1所述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造，其特征在于，该间隔导体凸块包含一电镀金属块。
6.如权利要求1所述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造，其特征在于，该间隔导体凸块包含一打线形成的结线凸块。
7.如权利要求1所述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造，其特征在于，该孔金属层更一体延伸为一形成于该第四表面的重配置线路，至少一个外接端子接合于该重配置线路，该多个外接端子包含多个焊球。
8.如权利要求1至7任一项所述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造，其特征在于，一导体栓连接在该偏移垫与该金属互连平行垫组合之间，该间隔导体凸块的表面覆盖面积涵盖该导体栓的形成位置。
9.一种具硅穿孔连续型态的晶圆级晶片尺寸封装构造的制造方法，其特征在于，包含：
提供一装置晶片与一载体晶片，该装置晶片的主体具有一第一表面与一第二表面，一金属互连平行垫组合嵌埋于该装置晶片之中，该载体晶片的主体具有一第三表面与一第四表面；
结合该装置晶片与该载体晶片，使得该装置晶片的该第二表面贴合于该载体晶片的该第三表面；
设置至少一偏移垫于该第一表面，并且该偏移垫连接至该金属互连平行垫组合；
形成一组件设置区于该第一表面；
接合至少一间隔导体凸块于该偏移垫上而突出于该第一表面；
形成一间隔黏合层于该装置晶片的该第一表面上，该间隔黏合层包覆该间隔导体凸块；
压贴一保护盖片于该间隔黏合层上；
制作至少一硅穿孔结构，该硅穿孔结构包含一贯穿孔以及一孔金属层，该贯穿孔对着该偏移垫由该第四表面连续贯穿该载体晶片与该装置晶片，该孔金属层形成于该贯穿孔内并连接该偏移垫，该贯穿孔非中心对准于该间隔导体凸块；
形成一保护层于该第四表面上并覆盖该贯穿孔；以及
设置多个外接端子于该载体晶片而突出于该第四表面上。
10.如权利要求9所述的具硅穿孔连续型态的晶圆级晶片尺寸封装构造的制造方法，其特征在于，另包含一第一晶圆薄化步骤与一第二晶圆薄化步骤，其中该第一晶圆薄化步骤实施在上述结合该装置晶片与该载体晶片的步骤之后与在上述设置该偏移垫于该第一表面的步骤之前，以降低该装置晶片的厚度，该第二晶圆薄化步骤实施在上述压贴该保护盖片于该间隔黏合层上的步骤之后与在上述制作该硅穿孔结构的步骤之前，以降低该载体晶片的厚度。
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