TW201604334A - 用於焊料凸塊之包括全氟烷基界面活性劑之錫合金電鍍溶液 - Google Patents
用於焊料凸塊之包括全氟烷基界面活性劑之錫合金電鍍溶液 Download PDFInfo
- Publication number
- TW201604334A TW201604334A TW104124104A TW104124104A TW201604334A TW 201604334 A TW201604334 A TW 201604334A TW 104124104 A TW104124104 A TW 104124104A TW 104124104 A TW104124104 A TW 104124104A TW 201604334 A TW201604334 A TW 201604334A
- Authority
- TW
- Taiwan
- Prior art keywords
- tin
- plating solution
- copper
- fluorinated surfactant
- perfluoroalkyl
- Prior art date
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/56—Electroplating: Baths therefor from solutions of alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/30—Electroplating: Baths therefor from solutions of tin
- C25D3/32—Electroplating: Baths therefor from solutions of tin characterised by the organic bath constituents used
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/46—Electroplating: Baths therefor from solutions of silver
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/56—Electroplating: Baths therefor from solutions of alloys
- C25D3/60—Electroplating: Baths therefor from solutions of alloys containing more than 50% by weight of tin
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
- C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/615—Microstructure of the layers, e.g. mixed structure
- C25D5/617—Crystalline layers
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/38—Electroplating: Baths therefor from solutions of copper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/0345—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11462—Electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
- H01L2224/11849—Reflowing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Organic Chemistry (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electroplating And Plating Baths Therefor (AREA)
Abstract
本發明所揭示者為一種形成覆晶封裝之焊料凸塊用的錫系電鍍溶液。此錫系電鍍溶液包括甲磺酸錫、甲磺酸銀、甲磺酸、氟化界面活性劑、芳香族聚氧伸烷基醚、及水。亦揭示者為一種藉由此電鍍溶液而形成焊料凸塊之方法。此方法包括(1)以銅或銅/鎳電鍍溶液電鍍具有保護層之矽晶圓,透過暴露電極墊及凸塊下冶金(UBM,under bump metallurgy)層,以於凸塊下冶金層上形成銅或銅/鎳支柱,及(2)以此錫系電鍍溶液電鍍此支柱以形成焊料凸塊。
Description
本揭示係關於一種錫系電鍍溶液,其係用於覆晶封裝(flip-chip packaging)製程中形成焊料凸塊。
隨著體積小、超薄、高性能電子裝置的出現,對於快速操作和必要設備之改進的電極密度如記憶體的需求日益增加。於此種情況下,覆晶封裝技術正快速擴張並應用於電子裝置之製造。習用之焊線(wire bonding)製程涉及以細金屬線連接晶片與配電板。捲帶式自動接合(TAB,tape automated bonding)製程涉及排列晶片於可撓性帶上。然而,此等習用製程於達成減少系統體積或改進電子效能上有限制。於覆晶封裝製程,焊料凸塊被形成於積體電路晶片之墊上並藉由加熱直接連接於電路板。此即覆晶封裝製程為區域陣列封裝製程,其利用晶片之整個區域,而不像焊線或TAB製程僅使用晶片的邊緣。因此,覆晶封裝製程能夠形成顯著增加之每單位區域之輸入/輸出端子數量且如此適合於細節距(fine pitch)應用。此外,覆晶封裝製程使用長度短於焊線之焊料凸塊,確保優異的電子性質。由於此等優點,覆晶封裝製程可最小化封裝的體積,如此適於製造輕量、細、緻密、高效能、及快速操作的電子產品。此外,覆晶封裝製程可提供噪音問體的解決。此技術可發展並可應用於顯示器、半導體、及其他相關產業,包括CPU及記憶體產業。
此種焊線覆晶封裝採取各種形式,但大部分使用銅(或銅/鎳)支柱及錫合金凸塊於銅系凸塊下冶金(UBM,under bump metallurgy)層所構成的焊料凸塊。於發展用於形成合金系焊料凸塊中有許多問題須被解決。例如,有許多與產品之缺陷、產量、品質之問題,諸如模間(WID,within die)及晶片間(WIW,within wafer)凸塊之高度變化、凸塊內部空間的形成、及金屬間的化合物層(IMC,intermetallic compound layer)發生龜裂。
本發明之一目標係提供一種含有全氟烷基界面活性劑的錫系電鍍溶液,用於藉由電鍍在覆晶封裝時於金屬系UBM層上形成錫系焊料凸塊,於電流效率項目上其為有利的,於金屬間化合物(IMC)層不會留下龜裂且無凸塊內部空間,可用於形成具有高度平坦性及小的高度變化之凸塊,且可應用於高速電鍍。本發明之另一目標係提供一種藉由使用錫系電鍍溶液於覆晶時形成焊料凸塊之方法。
本發明之一態樣提供一種錫系電鍍溶液,其包括含量為電鍍溶液之錫含量為40至105g/L之甲磺酸錫(tin methanesulfonate)、70至210g/L之甲磺酸(methanesulfonic acid)、0.01至100mg/L之氟化界面活性劑、0.5至60g/L之芳香族聚氧伸烷基醚(polyoxyalkylene ether)、及水。此錫系電鍍溶液可選擇包括含量為電鍍溶液之銀含量為0.40至3.0g/L之甲磺酸銀(silver methanesulfonate)。於此情形,此錫-銀合金電鍍溶液可進一步包括130至350g/L之錯合劑(complexing agent)。
除了上述組份,本發明之電鍍溶液可進一步包括各種有機添加劑。於此情形,此有機添加劑適合以總濃度6.0至650g/L存在。適合使用於本
發明之錫系電鍍溶液中之有機添加劑的種類可由此技術領域中具通常知識者依據所欲應用而決定,因此其詳細描述於本文中被省略。例如,此有機添加劑可為促進劑、抑制劑、消泡劑、有機抗氧化劑,及晶粒細化劑(grain-refining agent)。此有機添加劑之特定例為羥基苯系抗氧化劑,諸如酚(phenol)、氫醌(hydroquinone)、及間苯二酚(resorcinol),其可單獨使用或合併使用。
於本發明之一具體實施例中,此電鍍溶液含有0.05至10mg/L之氟化界面活性劑。
此氟化界面活性劑可選自全氟烷基磷酸酯鹽(perfluoroalkyl phosphate salt)、全氟烷基硫酸酯(perfluoroalkyl sulfate)、全氟烷基磺酸酯鹽(perfluoroalkyl sulfonate salt)、及其混合物。
此全氟烷基磷酸酯鹽為含有單-及二-C6-C12全氟烷基磷酸酯鹽之混合物,其中單酯鹽佔單酯鹽及二酯鹽之總重量的33至45重量%。全氟烷基磷酸酯鹽具有560至980之表觀平均分子量。此單-及二-氟烷基磷酸酯鹽係由將單-及二-全氟烷基磷酸酯之混合物與至少一種鹼反應而獲得,該鹼選自氫氧化鈉、氫氧化鉀及氫氧化鋰所組成之群組。
此全氟烷基硫酸酯係一種含有全氟烷基胺基磺酸酯及水之界面活性劑。
此全氟烷基磺酸酯鹽係一種包括C6-C12全氟烷基之界面活性劑。
於本發明之一具體實施例中,三種界面活性劑之全氟烷基為未分枝直鏈。
本發明之另一態樣揭示一種藉由使用此錫系電鍍溶液於覆晶時形成焊料凸塊之方法,此方法包括:電鍍具有保護層之矽晶片,以銅或銅/鎳電
鍍溶液通過被暴露的電極墊及凸塊下冶金(UBM)層,以於凸塊下冶金層上形成銅或銅/鎳支柱;及以錫系電鍍溶液電鍍支柱以形成焊料凸塊。
於本發明之一特定具體實施例中,將電鍍溶液通過濾筒以移除妨礙合金焊料凸塊形成之沉澱物或雜質。
於UBM層上形成金屬支柱後,使用本發明之錫系電鍍溶液可於金屬支柱上形成焊料凸塊。此氟化界面活性劑之存在可改善錫系電鍍溶液之表面張力、可濕度、及擴延性(spreadability)。結果,可增進電鍍製程之電流效率,可防止金屬間的化合物層中龜裂之發生及凸塊內側空間之形成,可減少WID及WIW凸塊之高度變化,且即使於高速電鍍範圍(10至19A/dm2)可獲得電鍍薄膜性質優異之覆晶封裝。
本發明之此等及/或其他態樣,結合附圖並由下列具體實施例之描述將變得明顯且更容易被了解:圖1 圖解顯示整體覆晶封裝製程包括使用錫系電鍍溶液於凸塊下冶金層上形成銅支柱及於銅支柱上形成焊料凸塊;圖2 顯示於12-吋圖案畫晶片之凸塊下冶金(UBM)層上形成的銅支柱之頂部及側部電子顯微鏡影像(2a:x 7000,2b:x 3000放大率);圖3及4係於依據本發明之具體實施例的不同條件下,藉由定電流電鍍(galvanostatic plating)形成於黃銅板上的錫-銀合金結構之表面的電子顯微鏡影像;及圖5及6係顯示圖案化晶圓試驗片上形成的錫-銀合金焊料凸塊(凸塊CD 25μm)之形狀之電子顯微鏡影像,係於晶片試驗片上形成銅金屬支柱,依據本發明之具體實施例,藉由不同條件處理下電鍍。
現詳細描述本發明。
圖1圖解顯示整體覆晶封裝製程,包括使用錫系電鍍溶液於凸塊下冶金層上形成銅支柱及於銅支柱上形成焊料凸塊。於圖1,A顯示藉由濺鍍於由晶片所構成的圖案化晶圓上形成銅UBM層,B顯示光阻(PR)圖案之形成,C顯示藉由電鍍形成銅或銅/鎳支柱,D顯示藉由電鍍於銅支柱上形成錫-銀凸塊,E顯示光阻之移除,F顯示金屬蝕刻及迴焊(reflow)。
本發明之一態樣揭示一水性錫系或錫-銀系電鍍溶液,其可用於圖1所示製程之步驟D。本發明之錫系電鍍溶液包括下列組份:A)甲磺酸錫,其含量為電鍍溶液之錫含量為40至105g/L;B)甲磺酸銀,作為可選擇組份,其含量為電鍍溶液之銀含量為0.40至3.0g/L;C)70至210g/L之甲磺酸;D)0.01至100mg/L之氟化界面活性劑;E)0.5至60g/L之芳香族聚氧伸烷基醚;及F)水。
於本發明之一特定具體實施例中,甲磺酸錫可以電鍍溶液之錫含量為80至100g/L被使用。錫系凸塊形成時於電流效率之項目上,甲磺酸錫以電鍍溶液之錫含量於上述界定的範圍內存在為較佳。
於本發明之一特定具體實施例中,電鍍溶液中使用的甲磺酸錫(基於最終錫含量(10-20wt%))係藉由電鍍於市售65至75%甲磺酸中的錫之氧化而製備。
本發明之錫系電鍍溶液可僅包括錫作為電鍍金屬或可為包括錫
及銀之合金電鍍溶液。
於本發明之一特定具體實施例中,甲磺酸銀(基於電鍍溶液中使用的最終銀含量(2-7wt%))可藉由電鍍於市售65至75%甲磺酸中之銀之氧化而製備或氧化銀於市售65至75%甲磺酸中溶解而製備。
於本發明之一具體實施例中,錫系電鍍溶液可包括銀。於此具體實施例,錫系電鍍溶液可選擇性地進一步包括錯合劑。任何一般之於電鍍領域之能夠與銀形成錯合物的錯合劑皆可被使用於本發明而無特別限制。於本發明之一特定具體實施例中,錯合劑可以130至350g/L之濃度存於電鍍溶液中。
本發明之電鍍溶液中使用的甲磺酸可為電鍍領域中使用的市售等級產品之任一者。於本發明之一特定具體實施例中,電鍍溶液所使用的甲磺酸及用於製備錫或甲磺酸銀之甲磺酸係購自市場且於使用前純化。例如,甲磺酸可藉由活性碳過濾、起泡或於浴中處理以移除諸如氯及硫化合物之雜質而純化。此活性碳可典型地具有40至100μm之平均粒徑,500m2/g以上之表面積,及10至20Å之平均孔徑。甲磺酸過濾後,可將濾液通過具有數微米之孔徑的濾筒以移除活性碳及雜質。或者,甲磺酸可藉由以氮氣或空氣起泡約6至約12小時而純化。或者,靜置於60至85℃約6至約12小時後,甲磺酸之濃度以超純水調整至適當程度。
氟化界面活性劑之全氟烷基可為全氟化直鏈烷基、分枝烷基或環烷基。
於本發明之一具體實施例中,氟化界面活性劑為一種包括單-及二-全氟烷基磷酸酯鹽之組成物。於一具體實施例中,此界面活性劑組成物係藉由將磷酸酯混合物以鹼處理而獲得。此鹼可為彼等本項技術領域中通常使用者
之任一者。此等鹼之例包括,但不限於,鈉、鉀、及鋰。藉由鹼處理獲得的材料包括由單-及二-全氟烷基磷酸酯與鹼反應所形成的中性鹽類(即,鈉、鉀、鋰及銨鹽)。此鹼處理可增加界面活性劑之親水性。
於本發明之特定具體實施例中,全氟化磷酸酯鹽之混合物可為含下式1所表示之具有1-I結構之單酯鹽及具有1-II結構之二酯鹽之酯混合物:
其中式1中各n為一自然數,較佳為範圍為5至11之整數。於更特別之一具體實施例中,各n為7。當各n於上述界定範圍中時,可獲得低黏度及流動性之界面活性劑,達成改進的可操作性。此外,界面活性劑之親水性及厭水性係可調整的,而確保良好的分散性及加工安定性。於式中,各M為鹼金屬。單酯鹽佔單酯鹽與二酯鹽之總重量的33至45重量%。於此酯鹽混合物中,酯鹽組份具有560至980之表觀平均分子量。
於本發明之另一具體實施例,氟化界面活性劑為全氟烷基硫酸酯界面活性劑。全氟烷基硫酸酯與全氟烷基與硫原子透過氧原子而連接之全氟烷基磺酸酯可區別。作為陰離子界面活性劑,亦具有可用於氯磺酸(ClSO3H)或胺基磺酸(NH2SO3H)與全氟化醇之酯或可選擇之酯的鹼鹽。
於本發明之特定具體實施例中,全氟烷基硫酸酯界面活性劑可為具有式2代表之結構的胺基磺酸酯:
於本發明之一特定具體實施例中,式2中之n為5至11之整數。於一更特別之具體實施例,n為7。當n於上述界定之範圍中,可達成界面活性劑之低黏度及可流動性,達成改進的可操作性。此外,界面活性劑之親水性及厭水性係可調整的,而確保良好的分散性及加工安定性。胺基磺酸酯界面活性劑之水含量可為30至90重量%。胺基磺酸酯作為硫酸系界面活性劑之使用為有利的,因僅以全氟烷基即可獲得作為帶電離子物種之銨鹽(質子化胺基)。由於此優點,胺基磺酸酯之使用可避免鹼處理以增進界面活性劑之親水性的需求,而不像硫酸或氯硫酸之使用。
於本發明之另一具體實施例,氟化界面活性劑為一種全氟烷基磺酸酯鹽界面活性劑。
於本發明之一特定具體實施例,全氟烷基磺酸酯鹽界面活性劑可具有式3所代表的結構:
其中式3中之n為一自然數,較佳為5至11之整數。於更特別之一具體實施例中,n為7。當n於上述界定範圍中時,可獲得低黏度及流動性之界面活性劑,達成改進的可操作性。此外,界面活性劑之親水性及厭水性係可調整的,而確保良好的分散性及加工安定性。全氟烷基磺酸酯鹽可為全氟
化辛基磺酸鉀(n=7,M=鉀)。
於本發明之錫系電鍍溶液中,氟化界面活性劑可展現分散、乳化、及去泡效果。氟化界面活性劑的功能係作電鍍金屬細粒的結晶、增進晶粒尺寸及凸塊的成形特性。此氟化界面活性劑之其他功能係減少凸塊之高度變化(WID及WIW)及防止凸塊內空洞形成及金屬層間龜裂。
此氟化界面活性劑可為一種商業上可取得的產品。
於此錫系電鍍溶液中包括0.01至100mg/L之氟化界面活性劑。於本發明之一特定具體實施例中,此氟化界面活性劑之含量可被調整為0.05至10mg/L之範圍。於此範圍間,凸塊表面上的錫系結晶可被精細地形成,可減少凸塊之高度變化,並可防止凸塊內空洞形成及金屬層間龜裂。
本發明之電鍍溶液可進一步包括有機添加劑。添加劑及氟化界面活性劑之總濃度被適當地調整為10至100g/L。適合使用於本發明之錫系電鍍溶液中的有機添加劑之種類可由本項所述技術領域中具通常知識者依所欲應用而決定,如此其詳細說明於本文省略。有機添加劑之例包括晶粒細化劑、錯合劑、抗氧化劑、及消泡劑。
本發明之電鍍溶液較佳為電鍍使用之前歷經過濾。攪拌混合電鍍溶液之組份後,可通過具有數微米的孔徑的濾筒來過濾電鍍溶液以移除沉澱物或雜質。濾筒之孔徑可為例如0.2至6μm。亦可使用具有0.2至6μm孔徑之濾紙。
本發明之另一態樣係提供一種藉由使用錫系電鍍溶液生產覆晶用焊料凸塊之方法。本發明之方法涉及銅系金屬支柱於UBM層上之形成及錫或錫-銀合金焊料凸塊於其上之電鍍。較佳地,於銅或銅/鎳支柱被形成於UBM層
上後12小時之間施予此錫系電鍍溶液。於此時,錫電鍍或錫-銀合金電鍍可於連續製程中進行。此於12小時間的連續電鍍製程可最小化由於氧化物膜於銅或鎳表面上之形成或金屬層之間龜裂及缺陷的發生所造成的金屬間黏附。
具體而言,本發明之方法包括(A)電鍍一具有保護層之矽晶圓,以銅或銅/鎳電鍍溶液,透過暴露電極墊及凸塊下冶金(UBM)層,於凸塊下冶金層上形成銅或銅/鎳支柱,及(B)以此錫系電鍍溶液電鍍此支柱以形成焊料凸塊。
於凸塊下冶金層上形成銅或銅/鎳支柱之電鍍方法及此電鍍方法之步驟(A)中所使用的銅或銅/鎳電鍍溶液並無限制。此電鍍方法及電鍍溶液可為此技術中彼等通常被使用者。例如,此銅電鍍溶液可為包括硫酸銅、硫酸(H2SO4)、氫氯酸、水、及可選擇之添加劑者。此銅電鍍溶液可為以Cu-BRITE BUHD之商標名於商業上取自JCU,Co.,Ltd.(Japan)者。
步驟(B)中之焊料凸塊之形成用的錫系電鍍可藉由本項技術中任何適合的已知方法來進行,且如此其特定條件並未描述於本文。例如,以下列方式可進行電鍍,使用矽晶圓作為陰極,以銅支柱形成於UBM層上,並使用惰性金屬電極(例如,鉑電極或塗鉑電極)作為陽極。於一具體實施例,於步驟(B)中電鍍以形成焊料凸塊可於電流密度3至20A/dm2下進行。於一較佳具體實施例中,於電流密度10至19A/dm2下,高速電鍍係可能的。焊料凸塊形成後,焊料迴焊可接續。
將參考下列實施例來說明本發明。然而,此等實施例僅以說明目的被提供,且未以任何方式被意圖限制本發明之範疇。
製備實施例1:銅支柱之形成
於此實施例,於覆晶半導體封裝之銅凸塊下冶金(UBM)層上形成銅支柱。具體而言,將含CuSO4.5H2O、H2SO4、HCl、H2O、及有機添加劑(Cu-BRITE BUHD,JCU Co.,Ltd.,Japan)之市售硫酸銅系電鍍溶液於12吋圖案化晶圓上電鍍以形成銅支柱。此銅電鍍係依據製造商的建議來進行,如此本文提供此電鍍條件以簡要說明。於室溫下攪拌此電鍍溶液並於電流密度10A/dm2下電鍍直到銅支柱之柱之高度到達10μm。圖2顯示上列條件下形成的銅支柱之電子顯微鏡影像。
實施例1:錫-銀電鍍溶液之製備
經攪拌混合甲磺酸錫(基於最終錫含量(95g/L))、甲磺酸銀(基於最終銀含量(2.0g/L))、100g/L之甲磺酸、0.1mg/L之全氟化辛基磺酸鉀(potassium perfluorinated octyl sulfonate)、13.5g/L之聚氧乙烯苯乙烯苯基醚(polyoxyethylenestyrenic phenyl ether)、1.5g/L之聚氧乙烯雙酚F醚(polyoxyethylene bisphenol F ether)、及270g/L之作為錯合劑的硫二甘醇(thiodiglycol)並通過聚有數微米之孔徑的濾筒以製備錫-銀合金電鍍溶液。
評估實施例1:定電流電鍍
於此實施例,進行定電流電鍍,使用實施例1之錫-銀合金電鍍溶液並評估此經電鍍錫-銀合金之特性。於定電流電鍍,使用具有2x2cm2大小之黃銅電鍍的橫切面作為陰極並使用塗鉑的鈦電極作為陽極。於電流密度5及10A/dm2下並同時攪拌250mL之電鍍溶液且於100rpm之速率以進行定電流電鍍直到厚度到達20μm。結果示於圖3及4。於電流密度5ASD及10ASD所形成的錫-銀電鍍層之表面形狀分別示於圖3及4。
實施例2:錫系焊料凸塊之特性
於此實施例,觀察錫-銀合金凸塊之形狀及特性。於製備實施例1中的12吋
圖案化晶圓上形成的銅支柱上電鍍實施例1之錫-銀電鍍溶液,以形成焊料凸塊。於電流密度13A/dm2並同時於室溫攪拌電鍍溶液下進行此錫-銀電鍍。於13A/dm2,電鍍速度為6.6μm/min。獲得99.5%之電流效率及2.2%之銀含量。於2℃/min之速率加熱至240℃後以3℃/min之速率冷卻,進行焊料迴焊。此焊料凸塊被良好地圖案化(凸塊CD 20-60μm,凸塊間距95-190μm)且電鍍趨勢(plating tendency)為良好,不管焊料凸塊之形狀為何(支柱或蘑菇形)。同時,於不同電流密度下進行錫-銀電鍍。於10、12、13、14、15、及16A/dm2之電流密度分別發現電流效率為99.6、99.5、99.5、98.9、98.0、及95.8%。
藉由電子顯微鏡及X射線成影分析於13A/dm2之電流密度下電鍍所獲得的焊料凸塊。結果,可確認焊料迴焊後,凸塊具有平滑表面外觀。於模具(WID)焊料凸塊之最大及最小高度間的變動為19.79±0.19μm。銀於錫-銀合金之比率為2.2%,以原子吸收(AA)分光光度法測量。X射線成影顯示焊料凸塊具有緻密結構而無空洞。
實施例3:氟化界面活性劑之影響
於此實施例,觀察錫-銀合金凸塊之形狀及特性。相似於評估實施例1,於製備實施例1中被製備之凸塊下冶金層所形成的12吋圖案化晶圓上電鍍實施例1之錫-銀電鍍溶液,以形成焊料凸塊。實施例3不同於評估實施例1,其中製備實施例1所使用的電鍍圖案化晶圓被切成具有3x3cm2大小之試驗片,其被使用作為陰極,塗鉑的鈦電極被使用作為陽極,且於5及10A/dm2電流密度同時於250rpm之速率下攪拌250mL之電鍍溶液以進行定電流電鍍,直到厚度到達20μm。測量焊料凸塊之特性且結果示於表2及圖5(5a)及6(6a)。
比較實施例1
以相同於實施例3之方式藉由錫-銀電鍍以形成焊料凸塊,除了於電鍍溶液中排除氟化界面活性劑組份之外。測量於密度5A/dm2及10A/dm2所形成的焊料凸塊之特性。結果示於表2及圖5(5b)及6(6B)。
表1摘述實施例3及比較例1所使用的錫系電鍍溶液之組份。
為了評估實施例3及比較實施例1中獲得的電鍍膜之外觀,藉由SEM觀察焊料迴焊之前及之後的凸塊之形狀。測量電流效率、銀含量(藉由原子吸收分光光度法)、迴焊後凸塊內側空洞(藉由X射線成影)、及WID值(%)。藉由模具(WID)凸塊之最大及最小高度之間的差除以平均高度獲得WID值,並以百分比表示。基於表面細緻度及平坦度而相對地評估凸塊之外觀。當以X射線成影觀察時,當凸塊內無空洞,評斷凸塊為「優良」,當空洞未大於0.05%,評斷為「良好」,且當空洞大於0.05%,評斷為「差」。結果示於表2及圖5。
如由比較實驗可見,經電鍍結構或凸塊之特性極為不同,端視氟化界面活性劑組份之存在或不存在。發現氟化界面活性劑組份影響電鍍結構之晶粒大小及形狀特性、WID及WIW凸塊之高度變化、及凸塊內空洞及金屬層間龜裂之形成。圖5(5a)及6(6a)顯示使用包括氟化界面活性劑組份之電鍍溶液分別於5ASD及10ASD所形成的凸塊之SEM影像。圖5(5b)及6(6b)顯示使用無氟化界面活性劑組份之電鍍溶液分別於5ASD及10ASD所形成的凸塊之SEM影像。尤其是,比較實施例1之焊料凸塊,其使用無氟化界面活性劑組份之錫-銀電鍍溶液所形成,具有WID凸塊之極大增加的高度變化、損害凸塊圖案之均一性、及焊料凸塊之銀含量相對於錫含量顯示有增加的傾向(圖2)。亦於迴焊後電流效率及凸塊內側空洞之比率發現差異。
Claims (8)
- 一種錫系電鍍溶液,其包含:甲磺酸錫,其量為電鍍溶液之錫含量係40至105g/L;甲磺酸銀,作為一可選擇的組份,其量為電鍍溶液的銀含量為0.40至3.0g/L;70至210g/L之甲磺酸;0.01至100mg/L之氟化界面活性劑;0.5至60g/L之芳香族聚氧伸烷基醚;及水。
- 如請求項1之電鍍溶液,其中電鍍溶液含有0.05至10mg/L之氟化界面活性劑。
- 如請求項1之電鍍溶液,其中氟化界面活性劑係選自鹼性全氟烷基磷酸酯鹽、全氟烷基硫酸酯、全氟烷基磺酸酯鹽、及其混合物。
- 如請求項1之電鍍溶液,其中氟化界面活性劑含有式1所代表之1-I及1-II之鹼全氟烷基磷酸酯種類及水,
- 如請求項1之電鍍溶液,其中氟化界面活性劑含有式2之全氟烷基胺基磺酸酯及水,
- 如請求項1之電鍍溶液,其中氟化界面活性劑含有式3之全氟烷基磺酸酯鹽及水,
- 一種於覆晶形成焊料凸塊之方法,其包含:以銅或銅/鎳電鍍溶液電鍍具有保護層之矽晶圓,透過暴露電極墊及凸塊下冶金(UBM,under bump metallurgy)層,而於凸塊下冶金層上形成銅或銅/鎳支柱;及以如請求項1至6中任一項之錫系電鍍溶液電鍍此支柱以形成焊料凸塊。
- 如請求項7之方法,其中焊料凸塊係於金屬支柱形成後之12小時間形成。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20140098394 | 2014-07-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201604334A true TW201604334A (zh) | 2016-02-01 |
TWI575115B TWI575115B (zh) | 2017-03-21 |
Family
ID=55180823
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW104124104A TWI575115B (zh) | 2014-07-31 | 2015-07-24 | 用於焊料凸塊之包括全氟烷基界面活性劑之錫合金電鍍溶液 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9871010B2 (zh) |
KR (1) | KR101636361B1 (zh) |
CN (1) | CN105316711B (zh) |
TW (1) | TWI575115B (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7009679B2 (ja) * | 2015-07-29 | 2022-01-26 | 石原ケミカル株式会社 | 電気スズ及び電気スズ合金メッキ浴、当該メッキ浴を用いた電着物の形成方法 |
CN106757212B (zh) * | 2016-11-30 | 2018-02-02 | 昆山成功环保科技有限公司 | 用于晶圆级封装的电镀锡银合金溶液 |
CN111690958B (zh) * | 2019-03-15 | 2023-07-28 | 上海新阳半导体材料股份有限公司 | 一种锡镀液、其制备方法和应用 |
CN113652719B (zh) * | 2021-08-13 | 2024-01-19 | 广西隆林利通线缆科技有限公司 | 用于铜线镀锡的电镀液及铜线电镀锡的方法 |
CN117773409A (zh) * | 2023-12-20 | 2024-03-29 | 道尔化成电子材料(上海)有限公司 | 一种纳米银基复合焊料及其制备方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4381228A (en) * | 1981-06-16 | 1983-04-26 | Occidental Chemical Corporation | Process and composition for the electrodeposition of tin and tin alloys |
US6251249B1 (en) * | 1996-09-20 | 2001-06-26 | Atofina Chemicals, Inc. | Precious metal deposition composition and process |
JP3334594B2 (ja) * | 1998-02-16 | 2002-10-15 | 三菱マテリアル株式会社 | 半導体ウエハの突起電極形成用めっき浴およびめっき方法 |
JP3455712B2 (ja) * | 2000-04-14 | 2003-10-14 | 日本ニュークローム株式会社 | 銅−スズ合金めっき用ピロリン酸浴 |
JP4698904B2 (ja) * | 2001-09-20 | 2011-06-08 | 株式会社大和化成研究所 | 錫又は錫系合金めっき浴、該めっき浴の建浴用又は維持・補給用の錫塩及び酸又は錯化剤溶液並びに該めっき浴を用いて製作した電気・電子部品 |
JP2004276219A (ja) * | 2003-03-18 | 2004-10-07 | Ebara Corp | 電解加工液、電解加工装置及び配線加工方法 |
JP4758614B2 (ja) * | 2003-04-07 | 2011-08-31 | ローム・アンド・ハース・エレクトロニック・マテリアルズ,エル.エル.シー. | 電気めっき組成物および方法 |
CN100595342C (zh) * | 2005-03-24 | 2010-03-24 | 肇庆市羚光电子化学品材料科技有限公司 | 用于甲基磺酸锡系镀纯锡电镀液的添加剂 |
JP4812365B2 (ja) * | 2005-08-19 | 2011-11-09 | ローム・アンド・ハース・エレクトロニック・マテリアルズ,エル.エル.シー. | 錫電気めっき液および錫電気めっき方法 |
JP4811880B2 (ja) * | 2006-01-06 | 2011-11-09 | エントン インコーポレイテッド | 艶消し金属層を堆積するための電解液および工程 |
US8226807B2 (en) * | 2007-12-11 | 2012-07-24 | Enthone Inc. | Composite coatings for whisker reduction |
EP2221396A1 (en) * | 2008-12-31 | 2010-08-25 | Rohm and Haas Electronic Materials LLC | Lead-Free Tin Alloy Electroplating Compositions and Methods |
KR20150080398A (ko) * | 2013-12-31 | 2015-07-09 | 주식회사 에이피씨티 | 플립칩용 솔더범프 제조 방법과 이를 위한 금속 전기도금액 |
KR102233334B1 (ko) * | 2014-04-28 | 2021-03-29 | 삼성전자주식회사 | 주석 도금액, 주석 도금 장치 및 상기 주석 도금액을 이용한 반도체 장치 제조 방법 |
-
2014
- 2014-11-10 KR KR1020140155735A patent/KR101636361B1/ko active IP Right Grant
-
2015
- 2015-07-24 TW TW104124104A patent/TWI575115B/zh active
- 2015-07-27 US US14/810,414 patent/US9871010B2/en active Active
- 2015-07-30 CN CN201510458355.XA patent/CN105316711B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
US20160035685A1 (en) | 2016-02-04 |
KR101636361B1 (ko) | 2016-07-06 |
KR20160018310A (ko) | 2016-02-17 |
US9871010B2 (en) | 2018-01-16 |
CN105316711A (zh) | 2016-02-10 |
CN105316711B (zh) | 2018-01-05 |
TWI575115B (zh) | 2017-03-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI575115B (zh) | 用於焊料凸塊之包括全氟烷基界面活性劑之錫合金電鍍溶液 | |
JP5207968B2 (ja) | 電子工学の製造分野での錫−銀ハンダ・バンプ | |
JP6759736B2 (ja) | めっき液 | |
KR20150051927A (ko) | 도금조 및 방법 | |
WO2019181906A1 (ja) | 錫又は錫合金めっき液、及びバンプの形成方法 | |
KR101722703B1 (ko) | 주석-은 솔더 범프 도금액 | |
KR20160033678A (ko) | 플립칩용 솔더범프 제조 방법과 이를 위한 금속 전기도금액 | |
Goh et al. | Electrodeposition of lead‐free solder alloys | |
EP3781729A1 (en) | Composition for tin or tin alloy electroplating comprising suppressing agent | |
JP2017155296A (ja) | めっき液 | |
CN111690958B (zh) | 一种锡镀液、其制备方法和应用 | |
KR102568529B1 (ko) | 보이드 생성이 억제되고 두께편차가 개선된 웨이퍼 범프용 주석 전기 도금액 | |
TWI805090B (zh) | 錫-銀鍍覆液、利用其的錫-銀焊料凸點的形成方法及由所述形成方法形成的錫-銀焊料凸點 | |
KR102533369B1 (ko) | 주석-은 도금액 및 이를 이용한 주석-은 솔더범프의 형성방법 | |
KR101596437B1 (ko) | 플립칩 패키지 구리 필라의 제조 방법과 이를 위한 동계 전기도금액 | |
KR101738535B1 (ko) | 솔더범프용 주석계 전기도금액 | |
KR20230029380A (ko) | 솔더 범프용 주석-은 전기 도금액 및 이를 이용한 플립칩용 솔더 범프의 제조 방법 | |
WO2022080191A1 (ja) | 錫又は錫合金めっき液及びそのめっき液を用いたバンプの形成方法 | |
KR102634250B1 (ko) | 도금 조성물 및 솔더 범프 형성 방법 | |
KR102634249B1 (ko) | 도금 조성물 및 솔더 범프 형성 방법 | |
KR102445575B1 (ko) | 도금용 평활제, 이를 포함하는 도금용 조성물 및 구리 배선의 형성방법 | |
KR20220125608A (ko) | 솔더범프용 주석계 도금액의 제조방법 및 이에 의하여 제조된 솔더범프용 주석계 도금액 | |
WO2017217234A1 (ja) | ハロゲンフリーまたは低ハロゲン電解穴埋め銅めっき浴 | |
KR20210068249A (ko) | 주석-은 도금액 조성물 |