TW201405276A - 輸出驅動器電路 - Google Patents
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/0812—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
- H03K17/08122—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
- H03K19/1737—Controllable logic circuits using multiplexers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0063—High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0072—Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0081—Power supply means, e.g. to the switch driver
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Abstract
[課題]提供簡單之電路構成,且具備有過電流保護功能之輸出驅動器電路。[解決手段]構成具備有定電流電路和定電流鏡用MOS電晶體和選擇器電路,定電流鏡用MOS電晶體和輸出MOS電晶體構成電流鏡電路,藉由根據電流鏡用MOS電晶體產生之定電流的電壓控制輸出MOS電晶體之閘極,而限制在輸出MOS電晶體之源極-汲極間流動的電流。
Description
本發明係關於具備有過電流保護電路之輸出驅動器電路。
針對以往之具有過電流保護功能之輸出驅動器電路予以說明。第5圖為表示以往之輸出驅動器電路的電路圖。
以往之具有過電流保護功能之輸出驅動器電路50具備:被連接於輸出端子57,屬於輸出驅動器之NMOS電晶體55;被連接於輸出驅動器之電流路徑,用以監視輸出電流之感測電阻58;輸出基準電壓之基準電壓電路51;比較在感測電阻58產生之電壓和基準電壓的比較器52;藉由比較器52之輸出訊號和輸入端子53之訊號控制NMOS電晶體55之閘極的NOR電路54。
在NMOS電晶體55接通之狀態下,於輸出端子57和電源短路之情況下,在NMOS電晶體55之汲極-源極間流通大電流。此時,當在感測電阻58產生的電壓高於基準電壓時,比較器52之輸出訊號成為“H”位準,被
控制成NMOS電晶體55斷開。依此,NMOS電晶體55之源極-汲極間之電流不再流動,可以防止由於過電流所造成之IC破壞。
再者,藉由連接NMOS電晶體以取代感測電阻58,可以進行同樣的保護(例如,參照專利文獻1)。
[專利文獻1]日本特開平6-38363號公報
但是,以往之具有過電流保護功能的輸出驅動器電路,因必須要有比較器和基準電壓電路,故有電路規模變大之課題。
再者,因在屬於輸出驅動器之NMOS驅動器之源極連接感測電阻,故有一般動作時輸出驅動器之驅動能力下降之課題。
本發明之輸出驅動器電路係鑒於上述課題而創作出,其目的係提供簡單電路構成並且不會使輸出驅動器之驅動能力下降之具備有過電流保護功能之輸出驅動器電路。
本發明為了解決上述課題,提供一種具備有過電流保護功能之開汲極輸出的輸出驅動器電路,其具備:定電流電路,其係用以供給定電流;定電流鏡用MOS電晶體,其係用以產生根據定電流之電壓;選擇器電路,其係被輸入定電流鏡用MOS電晶體之電壓和第1電源端子之電壓,藉由被輸入至輸出驅動器電路之輸入端子的訊號,輸出被輸入之任一的電壓;及輸出MOS電晶體,其係閘極被連接於選擇器電路之輸出端子,汲極被連接於輸出驅動器電路之輸出端子,源極被連接於第1電源端子,藉由根據定電流之電壓,在輸出MOS電晶體之源極-汲極間流動之電流被限制。
本發明之輸出驅動器電路係構成藉由電流鏡電路控制輸出MOS電晶體之電流,實現過電流保護功能。因此,因在輸出MOS電晶體之源極不需要感測電阻,不需要比較器和基準電壓電路,故可以提供簡單構成,並且不會使在一般動作時之驅動能力下降的具有過電流保護功能之輸出驅動器電路。
10、40‧‧‧輸出驅動器電路
11‧‧‧定電流電路
12‧‧‧定電流鏡用MOS電晶體
13、53‧‧‧輸入端子
14、44‧‧‧選擇器電路
15、45‧‧‧輸出MOS電晶體
17‧‧‧輸出端子
51‧‧‧基準電壓電路
52‧‧‧比較器
第1圖為表示本實施型態之輸出驅動器電路的電路圖。
第2圖為表示本實施型態之輸出驅動器電路之其他例的電路圖。
第3圖為表示本實施型態之輸出驅動器電路之其他例的電路圖。
第4圖為表示本實施型態之輸出驅動器電路之其他例的電路圖。
第5圖為表示以往之輸出驅動器電路的電路圖。
以下,參照圖面說明本發明之實施型態。
第1圖為表示本實施型態之輸出驅動器電路的電路圖。
輸出驅動器電路10具備定電流電路11、定電流鏡用MOS驅動器12、輸入端子13、選擇器電路14和NMOS電晶體15。
NMOS電晶體15係閘極被連接於選擇器電路14之輸出,源極被連接於接地端子2,汲極被連接於輸出端子17。NMOS電晶體15係開汲極形式之輸出驅動器,輸出端子17係經外部之上拉電阻16,而被連接於後段之電路之電源端子3。
選擇器電路14係以藉由輸入端子13之電壓選擇並輸出定電流鏡用MOS電晶體12之輸出電壓,和接地電壓VSS中之一方之方式,被設置在定電流鏡用MOS電晶體12和NMOS電晶體15之間。
定電流鏡用MOS電晶體12接收在被連接於接地端子2之定電流電路11產生之電流,輸出用以限制NMOS電晶體15之源極-汲極間電流的電壓。即是,定電流鏡用MOS電晶體12構成NMOS電晶體15和電流鏡電路。
接著,針對本實施型態之輸出驅動器電路10之動作予以說明。
於輸入端子13之電壓為“L”位準之時,選擇器電路14輸出接地電壓VSS。依此,NMOS電晶體15成為斷開,輸出驅動器電路10之輸出端子17成為高阻抗狀態。因此,輸出驅動器電路10之輸出端子17被上拉至將此連接於輸入端子之後段之電路的電源電壓VCC。即是,輸出驅動器電路10係對輸出端子17輸出“H”位準。
於輸入端子13之電壓為“H”位準之時,選擇器電路14輸出定電流鏡用MOS電晶體12之閘極電壓。NMOS電晶體15接通(ON),而在源極-汲極間流通藉由電源電壓VCC和上拉電阻16之電阻值所決定之電流。即是,輸出驅動器電路10係對輸出端子17輸出“L”位準。
在此,假設輸出驅動器電路10之輸出端子17和後段之電路之電源電壓VCC由於某種理由造成短路之情況。當NMOS電晶體15接通(ON)時,因電源電壓VCC和接地電壓VSS短路,故在NMOS電晶體15之源極-汲極間流通過電流。
在NMOS電晶體15之源極-汲極間流通之電流之電流限制值Ilimit係以在定電流電路11產生之電流Iconst和電流鏡電路之電流鏡比所決定。因此,NMOS電晶體15不管後段之電源電壓VCC或上拉電阻16之電阻值,在源極-汲極間流通之電流被限制成電流限制值Ilimit。電流限制值Ilimit為用以限制過電流之值,被設定成較一般動作時在NMOS電晶體15接通(ON)之情況下所流動之電流充分大的值。
如上述說明般,若藉由本實施型態之輸出驅動器電路時,因設成設置定電流鏡用MOS電晶體12和選擇器電路14,控制NMOS電晶體15之閘極電壓之構成,故可以以簡單電路構成,實現輸出端子17之過電流保護功能。
並且,如第2圖所示般,定電流鏡用MOS電晶體12即使具備電流調整用之NMOS電晶體及熔絲使可以調整電流鏡比亦可。藉由將定電流鏡用MOS電晶體12設成如此之構成,可以抑制定電流Iconst之偏差或電流鏡比之偏差。因此,可以提高電流限制值Ilimit之精度。
再者,雖然無圖示,即使藉由熔絲修整等之手段調整定電流電路11,抑制電流限制值Ilimit之偏差亦可。
再者,如第3圖所示般,定電流鏡用MOS電晶體12即使為具備有接收在被連接於接地端子2側之定電流電路11所產生之電流的PMOS電流鏡電路之構成亦可。PMOS電流鏡電路係使定電流電路11之電流成為電
流鏡比倍而流入至被飽和接線之NMOS電晶體。藉由將定電流用MOS電晶體12設成如此之構成,使成為PMOS電流鏡電路和NMOS電流鏡電路之兩段構成,可縮小電路面積。並且,即使將電流鏡之段數設成任何段亦可,再者,即使使用熔絲修整等之手段,使可以調整電流鏡比亦可。
再者,如第4圖所示般,即使為Pch開汲極形式之輸出驅動器電路,亦可以使用定電流鏡用MOS電晶體12和選擇器電路44和輸出MOS電晶體45,而同樣可以實現過電流保護功能。此時,輸出端子17經外部之上拉電阻16而被連接於後段之電路之接地端子4。再者,即使使用熔絲修整等之手段,附加抑制電流限制值Ilimit之偏差的功能亦可。
2‧‧‧接地端子
3‧‧‧電源端子
10‧‧‧輸出驅動器電路
11‧‧‧定電流電路
12‧‧‧定電流鏡用MOS電晶體
13‧‧‧輸入端子
14‧‧‧選擇器電路
15‧‧‧輸出MOS電晶體
16‧‧‧上拉電阻
17‧‧‧輸出端子
Claims (3)
- 一種輸出驅動器電路,係開汲極輸出的輸出驅動器電路,其特徵為具備:定電流電路,其係用以供給定電流;定電流鏡用MOS電晶體,其係用以產生根據上述定電流之電壓;選擇器電路,其係被輸入根據上述定電流鏡用MOS電晶體所產生之上述定電流的電壓和第1電源端子之電壓,藉由被輸入至上述輸出驅動器電路之輸入端子的訊號,輸出被輸入之任一的電壓;及輸出MOS電晶體,其係閘極被連接於上述選擇器電路之輸出端子,汲極被連接於上述輸出驅動器電路之輸出端子,源極被連接於上述第1電源端子,上述定電流鏡用MOS電晶體和上述輸出MOS電晶體構成電流鏡電路,藉由根據上述定電流之電壓,在上述輸出MOS電晶體之源極-汲極間流動之電流被限制。
- 如申請專利範圍第1項所記載之輸出驅動器電路,其中上述電流鏡電路具有調整電流鏡比之手段,調整上述輸出MOS電晶體之電流限制值。
- 如申請專利範圍第1項所記載之輸出驅動器電路,其中上述定電流電路具有調整電流值之手段,可以調整上述輸出MOS電晶體之電流限制值。
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JP2012103218A JP5806972B2 (ja) | 2012-04-27 | 2012-04-27 | 出力ドライバ回路 |
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KR101419806B1 (ko) * | 2010-11-19 | 2014-07-17 | 한국전자통신연구원 | 고정 대역폭을 갖는 가변 이득 증폭기 |
CN202085343U (zh) * | 2011-01-25 | 2011-12-21 | 武汉光华芯科技有限公司 | 一种宽电源电压范围的高性能led恒流驱动电路 |
JP5938852B2 (ja) * | 2011-05-25 | 2016-06-22 | 富士電機株式会社 | 電圧制御型スイッチング素子のゲート駆動回路 |
KR20150129155A (ko) * | 2014-05-08 | 2015-11-19 | 에스케이하이닉스 주식회사 | 바이어스 샘플링 장치 및 그에 따른 씨모스 이미지 센서 |
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2012
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2013
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- 2013-03-26 EP EP13780640.2A patent/EP2846467B1/en active Active
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- 2013-03-26 WO PCT/JP2013/058681 patent/WO2013161483A1/ja active Application Filing
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US10379565B2 (en) | 2019-08-13 |
CN111585552A (zh) | 2020-08-25 |
TWI561956B (zh) | 2016-12-11 |
JP5806972B2 (ja) | 2015-11-10 |
WO2013161483A1 (ja) | 2013-10-31 |
JP2013232760A (ja) | 2013-11-14 |
EP2846467A1 (en) | 2015-03-11 |
CN104247267A (zh) | 2014-12-24 |
KR20150015449A (ko) | 2015-02-10 |
CN111585552B (zh) | 2023-08-15 |
KR101982904B1 (ko) | 2019-05-27 |
EP2846467A4 (en) | 2016-09-21 |
EP2846467B1 (en) | 2019-03-06 |
US20150035567A1 (en) | 2015-02-05 |
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