CN104247267A - 输出驱动器电路 - Google Patents

输出驱动器电路 Download PDF

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CN104247267A
CN104247267A CN201380022125.8A CN201380022125A CN104247267A CN 104247267 A CN104247267 A CN 104247267A CN 201380022125 A CN201380022125 A CN 201380022125A CN 104247267 A CN104247267 A CN 104247267A
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circuit
mos transistor
current
output driver
driver circuit
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三谷正宏
有山稔
村冈大介
挽地友生
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Seiko Instruments Inc
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/262—Current mirrors using field-effect transistors only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/0812—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
    • H03K17/08122—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1737—Controllable logic circuits using multiplexers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0063—High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0072—Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0081—Power supply means, e.g. to the switch driver

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
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Abstract

本发明提供电路结构简单且具备过电流保护功能的输出驱动器电路。构成为：具备恒流电路和恒流镜用MOS晶体管和选择器电路，恒流镜用MOS晶体管和输出MOS晶体管构成电流镜电路，根据基于恒流镜用MOS晶体管产生的恒流的电压控制输出MOS晶体管的栅极，限制在输出MOS晶体管的源极－漏极间流动的电流。

Description

输出驱动器电路
技术领域
本发明涉及具备过电流保护功能的输出驱动器电路。
背景技术
对现有的带过电流保护功能的输出驱动器电路进行说明。图5是示出现有的输出驱动器电路的电路图。
现有的带过电流保护功能的输出驱动器电路50，具备：与输出端子57连接的输出驱动器即NMOS晶体管55；与输出驱动器的电流路径连接的、用于监视输出电流的读出电阻58；输出参考电压的参考电压电路51；比较由读出电阻58产生的电压和参考电压的比较器52；以及根据比较器52的输出信号和输入端子53的信号控制NMOS晶体管55的栅极的NOR电路54。
在NMOS晶体管55导通的状态下，如果输出端子57与电源短路，则在NMOS晶体管55的漏极－源极间就会有大电流流过。此时，若在读出电阻58产生的电压高于参考电压，则比较器52的输出信号成为“H（高）”电平，使NMOS晶体管55截止地进行控制。由此，NMOS晶体管55的源极－漏极间的电流变得不能流动，能够防止过电流造成的IC的破坏。
此外，取代读出电阻58而连接NMOS晶体管，从而能够进行同样的保护（例如，参照专利文献1）。
现有技术文献
专利文献
专利文献1：日本特开平6－38363号公报。
发明内容
发明要解决的课题
但是，现有的带过电流保护功能的输出驱动器电路，存在这样的课题：由于需要比较器和参考电压电路，电路规模会变大。
此外，还存在这样的课题：由于对输出驱动器即NMOS晶体管的源极连接读出电阻，所以正常动作时的输出驱动器的驱动能力下降。
本发明的输出驱动器电路鉴于上述课题而完成，其目的在于提供电路结构简单且不会降低输出驱动器的驱动能力的、具备过电流保护功能的输出驱动器电路。
用于解决课题的方案
本发明为了解决上述课题，提供一种输出驱动器电路，具备：恒流电路，供给恒流；恒流镜用MOS晶体管，产生基于恒流的电压；选择器电路，被输入恒流镜用MOS晶体管的电压和第1电源端子的电压，根据输入到输出驱动器电路的输入端子的信号，输出所输入的任一个电压；以及输出MOS晶体管，其栅极与选择器电路的输出端子连接，漏极与输出驱动器电路的输出端子连接，源极与第1电源端子连接，所述输出驱动器电路是漏极开路输出的输出驱动器电路，具备根据基于恒流的电压，限制在输出MOS晶体管的源极－漏极间流动的电流的过电流保护功能。
发明效果
本发明的输出驱动器电路构成为根据电流镜电路控制输出MOS晶体管的电流，从而实现了过电流保护功能。因而，在输出MOS晶体管的源极不需要读出电阻，并且不需要比较器和参考电压电路，因此能够提供结构简单且也不会降低正常动作时的驱动能力的、带过电流保护功能的输出驱动器电路。
附图说明
图1是示出本实施方式的输出驱动器电路的电路图；
图2是示出本实施方式的输出驱动器电路的其他例的电路图；
图3是示出本实施方式的输出驱动器电路的其他例的电路图；
图4是示出本实施方式的输出驱动器电路的其他例的电路图；
图5是示出现有的输出驱动器电路的电路图。
具体实施方式
以下，参照附图，说明本发明的实施方式。
图1是示出本实施方式的输出驱动器电路的电路图。
输出驱动器电路10具备恒流电路11、恒流镜用MOS晶体管12、输入端子13、选择器电路14、和NMOS晶体管15。
NMOS晶体管15，栅极与选择器电路14的输出连接，源极与接地端子2连接，漏极与输出端子17连接。NMOS晶体管15是漏极开路形式的输出驱动器，输出端子17经由外部的上拉电阻16而与后级电路的电源端子3连接。
选择器电路14设在恒流镜用MOS晶体管12与NMOS晶体管15之间，以根据输入端子13的电压选择输出恒流镜用MOS晶体管12的输出电压和接地电压VSS的哪一个。
恒流镜用MOS晶体管12接受由与接地端子2连接的恒流电路11产生的电流，输出用于限制NMOS晶体管15的源极－漏极间电流的电压。即，恒流镜用MOS晶体管12与NMOS晶体管15构成电流镜电路。
接着，对本实施方式的输出驱动器电路10的动作进行说明。
在输入端子13的电压为“L（低）”电平的情况下，选择器电路14输出接地电压VSS。因而，NMOS晶体管15截止，输出驱动器电路10的输出端子17成为高阻抗状态。因而，输出驱动器电路10的输出端子17，上拉到将其连接到输入端子的后级电路的电源电压VCC。即，输出驱动器电路10向输出端子17输出“H”电平。
在输入端子13的电压为“H”电平的情况下，选择器电路14输出恒流镜用MOS晶体管12的栅极电压。NMOS晶体管15导通，从而在源极－漏极间流过由电源电压VCC和上拉电阻16的电阻值决定的电流。即，输出驱动器电路10向输出端子17输出“L”电平。
在此，考虑输出驱动器电路10的输出端子17与后级电路的电源电压VCC因某些原因而短路的情况。若NMOS晶体管15导通，则电源电压VCC和接地电压VSS会短路，因此在NMOS晶体管15的源极－漏极间流动过电流。
在NMOS晶体管15的源极－漏极间流动的电流的电流极限值Ilimit，取决于由恒流电路11产生的电流Iconst和电流镜电路的电流镜比。因此，NMOS晶体管15中，在源极－漏极间流动的电流与后级的电源电压VCC或上拉电阻16的电阻值无关地，被限制在电流极限值Ilimit。电流极限值Ilimit是用于限制过电流的值，被设定为比在正常动作时NMOS晶体管15导通的情况下流动的电流充分大的值。
如以上说明，依据本实施方式的输出驱动器电路，由于采用设置恒流镜用MOS晶体管12和选择器电路14，控制NMOS晶体管15的栅极电压的结构，能够以简单的电路结构实现输出端子17的过电流保护功能。
再者，如图2所示，恒流镜用MOS晶体管12也可以具备电流调整用的NMOS晶体管及熔丝，以能够调整电流镜比。通过这样构成恒流镜用MOS晶体管12，能够抑制恒流Iconst的偏差或电流镜比的偏差。因而，能够提高电流极限值Ilimit的精度。
此外，虽然未图示，但通过用熔丝修整等的方法调整恒流电路11，抑制电流极限值Ilimit的偏差也可。
此外，如图3所示，恒流镜用MOS晶体管12也可为具备接受连接在接地端子2侧的恒流电路11产生的电流的PMOS电流镜电路的结构。PMOS电流镜电路使恒流电路11的电流按电流镜比成倍，并流入饱和连线的NMOS晶体管。通过这样构成恒流镜用MOS晶体管12，做成PMOS电流镜电路和NMOS电流镜电路的2级结构，从而能够缩小电路面积。进而，电流镜的级数也可为任意级，此外，利用熔丝修整等的方法，以能够调整电流镜比也可。
此外，如图4所示，即便为Pch漏极开路形式的输出驱动器电路，利用恒流镜用MOS晶体管12和选择器电路44和输出MOS晶体管45，也能同样地实现过电流保护功能。在该情况下，输出端子17经由外部的上拉电阻16，与后级电路的接地端子4连接。此外，利用熔丝修整等的方法，附加抑制电流极限值Ilimit的偏差的功能也可。
标号说明
10，40　输出驱动器电路
11　恒流电路
12　恒流镜用MOS晶体管
13，53　输入端子
14，44　选择器电路
15，45　输出MOS晶体管
17　输出端子
51　参考电压电路
52　比较器。

Claims (3)

1. 一种输出驱动器电路，是漏极开路输出的输出驱动器电路，其特征在于，包括：
恒流电路，供给恒流；
恒流镜用MOS晶体管，产生基于所述恒流的电压；
选择器电路，被输入基于所述恒流镜用MOS晶体管产生的所述恒流的电压和第1电源端子的电压，根据输入到所述输出驱动器电路的输入端子的信号，输出所输入的任一电压；以及
输出MOS晶体管，其栅极与所述选择器电路的输出端子连接，漏极与所述输出驱动器电路的输出端子连接，源极与所述第1电源端子连接，
所述恒流镜用MOS晶体管和所述输出MOS晶体管构成电流镜电路，
根据基于所述恒流的电压，限制在所述输出MOS晶体管的源极－漏极间流动的电流。
2. 根据权利要求1所述的输出驱动器电路，其特征在于：所述电流镜电路具有调整电流镜比的单元，从而调整所述输出MOS晶体管的电流极限值。
3. 根据权利要求1所述的输出驱动器电路，其特征在于：所述恒流电路具有调整电流值的单元，从而能够调整所述输出MOS晶体管的电流极限值。
CN201380022125.8A 2012-04-27 2013-03-26 输出驱动器电路 Pending CN104247267A (zh)

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CN111585552A (zh) 2020-08-25
TWI561956B (zh) 2016-12-11
JP5806972B2 (ja) 2015-11-10
WO2013161483A1 (ja) 2013-10-31
JP2013232760A (ja) 2013-11-14
EP2846467A1 (en) 2015-03-11
KR20150015449A (ko) 2015-02-10
CN111585552B (zh) 2023-08-15
TW201405276A (zh) 2014-02-01
KR101982904B1 (ko) 2019-05-27
EP2846467A4 (en) 2016-09-21
EP2846467B1 (en) 2019-03-06
US20150035567A1 (en) 2015-02-05

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