TW200903588A - Align mark, semiconductor chip including the same, semiconductor package including the chip and methods of fabricating the same - Google Patents
Align mark, semiconductor chip including the same, semiconductor package including the chip and methods of fabricating the same Download PDFInfo
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- TW200903588A TW200903588A TW97117550A TW97117550A TW200903588A TW 200903588 A TW200903588 A TW 200903588A TW 97117550 A TW97117550 A TW 97117550A TW 97117550 A TW97117550 A TW 97117550A TW 200903588 A TW200903588 A TW 200903588A
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- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01013—Aluminum [Al]
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- H01L2924/01—Chemical elements
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- H01L2924/01—Chemical elements
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- H01L2924/01—Chemical elements
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- H01L2924/01—Chemical elements
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- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L2924/01—Chemical elements
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- H01L2924/01—Chemical elements
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- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0494—4th Group
- H01L2924/04941—TiN
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20070046768A KR100809726B1 (ko) | 2007-05-14 | 2007-05-14 | 얼라인 마크, 상기 얼라인 마크를 구비하는 반도체 칩,상기 반도체 칩을 구비하는 반도체 패키지 및 상기 반도체칩과 상기 반도체 패키지의 제조방법들 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200903588A true TW200903588A (en) | 2009-01-16 |
Family
ID=39397549
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW97117550A TW200903588A (en) | 2007-05-14 | 2008-05-13 | Align mark, semiconductor chip including the same, semiconductor package including the chip and methods of fabricating the same |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20080284048A1 (enExample) |
| JP (1) | JP2008283195A (enExample) |
| KR (1) | KR100809726B1 (enExample) |
| CN (1) | CN101369572B (enExample) |
| TW (1) | TW200903588A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI512862B (zh) * | 2013-03-25 | 2015-12-11 | 東芝股份有限公司 | Manufacturing method of semiconductor device |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7638888B2 (en) * | 2007-02-16 | 2009-12-29 | Panasonic Corporation | Semiconductor chip mounting substrate, semiconductor chip mounting body, semiconductor chip stacked module, and semiconductor chip mounting substrate manufacturing method |
| FR2913529B1 (fr) * | 2007-03-09 | 2009-04-24 | E2V Semiconductors Soc Par Act | Boitier de circuit integre,notamment pour capteur d'image, et procede de positionnement |
| US7875988B2 (en) * | 2007-07-31 | 2011-01-25 | Seiko Epson Corporation | Substrate and manufacturing method of the same, and semiconductor device and manufacturing method of the same |
| KR101055432B1 (ko) * | 2008-10-30 | 2011-08-08 | 삼성전기주식회사 | 정렬홀을 갖는 반도체칩 및 그 제조방법 |
| JP5658442B2 (ja) * | 2009-06-02 | 2015-01-28 | 株式会社東芝 | 電子部品とその製造方法 |
| JP5927756B2 (ja) * | 2010-12-17 | 2016-06-01 | ソニー株式会社 | 半導体装置及び半導体装置の製造方法 |
| JP5795196B2 (ja) * | 2011-06-09 | 2015-10-14 | 新光電気工業株式会社 | 半導体パッケージ |
| KR20140017086A (ko) | 2012-07-30 | 2014-02-11 | 삼성디스플레이 주식회사 | 집적회로 및 이를 포함하는 표시 장치 |
| KR101688350B1 (ko) * | 2012-11-21 | 2016-12-20 | 미쓰비시덴키 가부시키가이샤 | 반도체 장치 및 그 제조 방법 |
| US8901756B2 (en) | 2012-12-21 | 2014-12-02 | Spansion Llc | Chip positioning in multi-chip package |
| US9355979B2 (en) * | 2013-08-16 | 2016-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Alignment structures and methods of forming same |
| JP6287103B2 (ja) * | 2013-11-22 | 2018-03-07 | セイコーエプソン株式会社 | 半導体装置、半導体装置の製造方法 |
| US20150187608A1 (en) * | 2013-12-26 | 2015-07-02 | Sanka Ganesan | Die package architecture with embedded die and simplified redistribution layer |
| US9589900B2 (en) | 2014-02-27 | 2017-03-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal pad for laser marking |
| US9343434B2 (en) | 2014-02-27 | 2016-05-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Laser marking in packages |
| US9666522B2 (en) | 2014-05-29 | 2017-05-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Alignment mark design for packages |
| US10170444B2 (en) * | 2015-06-30 | 2019-01-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packages for semiconductor devices, packaged semiconductor devices, and methods of packaging semiconductor devices |
| CN105654856A (zh) * | 2016-02-04 | 2016-06-08 | 京东方科技集团股份有限公司 | 一种显示装置及其芯片邦定方法 |
| US10692813B2 (en) * | 2016-11-28 | 2020-06-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor package with dummy bumps connected to non-solder mask defined pads |
| KR102554017B1 (ko) * | 2018-10-02 | 2023-07-11 | 삼성전자주식회사 | 반도체 패키지 |
| KR102606567B1 (ko) * | 2018-11-07 | 2023-11-28 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 |
| TWI730799B (zh) * | 2020-06-04 | 2021-06-11 | 力晶積成電子製造股份有限公司 | 影像感測器的製造方法及對準標記結構 |
| CN112420534B (zh) * | 2020-11-27 | 2021-11-23 | 上海易卜半导体有限公司 | 形成半导体封装件的方法及半导体封装件 |
| US12224267B2 (en) | 2020-12-04 | 2025-02-11 | Yibu Semiconductor Co., Ltd. | Chip interconnecting method, interconnect device and method for forming chip packages |
| CN112687619A (zh) | 2020-12-25 | 2021-04-20 | 上海易卜半导体有限公司 | 形成半导体封装件的方法及半导体封装件 |
| JP7629340B2 (ja) * | 2021-05-13 | 2025-02-13 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
| KR102876389B1 (ko) | 2021-12-27 | 2025-10-24 | 삼성전자주식회사 | 인쇄회로기판 및 그를 포함하는 반도체 패키지 |
| KR102802969B1 (ko) * | 2022-10-24 | 2025-05-08 | 세메스 주식회사 | 반도체 기판 장치와, 반도체 처리 방법 및 반도체 처리 장치 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940004764A (ko) * | 1992-08-20 | 1994-03-15 | 문정환 | 솔더 범프 형성방법 |
| JP2003124255A (ja) * | 2001-10-17 | 2003-04-25 | Seiko Epson Corp | 半導体装置及びその製造方法、半導体チップ及び実装方法 |
| US6593221B1 (en) * | 2002-08-13 | 2003-07-15 | Micron Technology, Inc. | Selective passivation of exposed silicon |
| US6750133B2 (en) * | 2002-10-24 | 2004-06-15 | Intel Corporation | Selective ball-limiting metallurgy etching processes for fabrication of electroplated tin bumps |
| US6975040B2 (en) * | 2003-10-28 | 2005-12-13 | Agere Systems Inc | Fabricating semiconductor chips |
-
2007
- 2007-05-14 KR KR20070046768A patent/KR100809726B1/ko not_active Expired - Fee Related
-
2008
- 2008-05-13 JP JP2008126087A patent/JP2008283195A/ja active Pending
- 2008-05-13 TW TW97117550A patent/TW200903588A/zh unknown
- 2008-05-14 CN CN2008101714342A patent/CN101369572B/zh not_active Expired - Fee Related
- 2008-05-14 US US12/153,088 patent/US20080284048A1/en not_active Abandoned
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI512862B (zh) * | 2013-03-25 | 2015-12-11 | 東芝股份有限公司 | Manufacturing method of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| US20080284048A1 (en) | 2008-11-20 |
| KR100809726B1 (ko) | 2008-03-06 |
| JP2008283195A (ja) | 2008-11-20 |
| CN101369572B (zh) | 2011-10-12 |
| CN101369572A (zh) | 2009-02-18 |
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