TW200814068A - Nonvolatile semiconductor memory and activation method thereof - Google Patents

Nonvolatile semiconductor memory and activation method thereof Download PDF

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Publication number
TW200814068A
TW200814068A TW096125164A TW96125164A TW200814068A TW 200814068 A TW200814068 A TW 200814068A TW 096125164 A TW096125164 A TW 096125164A TW 96125164 A TW96125164 A TW 96125164A TW 200814068 A TW200814068 A TW 200814068A
Authority
TW
Taiwan
Prior art keywords
source
line
memory cell
semiconductor memory
layer
Prior art date
Application number
TW096125164A
Other languages
English (en)
Chinese (zh)
Inventor
Fujio Masuoka
Hiroki Nakamura
Original Assignee
Unisantis Electronics Jp Ltd
Univ Tohoku
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisantis Electronics Jp Ltd, Univ Tohoku filed Critical Unisantis Electronics Jp Ltd
Publication of TW200814068A publication Critical patent/TW200814068A/zh

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/689Vertical floating-gate IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/693Vertical IGFETs having charge trapping gate insulators
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • H10D30/684Floating-gate IGFETs having only two programming levels programmed by hot carrier injection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
TW096125164A 2006-07-12 2007-07-11 Nonvolatile semiconductor memory and activation method thereof TW200814068A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006191470A JP5088465B2 (ja) 2006-07-12 2006-07-12 不揮発性半導体メモリ
PCT/JP2007/063889 WO2008007731A1 (fr) 2006-07-12 2007-07-12 Mémoire à semiconducteur non volatile et procédé d'entraînement correspondant

Publications (1)

Publication Number Publication Date
TW200814068A true TW200814068A (en) 2008-03-16

Family

ID=38923287

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096125164A TW200814068A (en) 2006-07-12 2007-07-11 Nonvolatile semiconductor memory and activation method thereof

Country Status (7)

Country Link
US (1) US7940574B2 (enExample)
EP (2) EP2639825A3 (enExample)
JP (1) JP5088465B2 (enExample)
KR (1) KR101020846B1 (enExample)
CN (1) CN101490837B (enExample)
TW (1) TW200814068A (enExample)
WO (1) WO2008007731A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
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TWI458080B (zh) * 2010-07-29 2014-10-21 Unisantis Elect Singapore Pte 非揮發性半導體記憶體電晶體,及非揮發性半導體記憶體之製造方法

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US7906818B2 (en) * 2008-03-13 2011-03-15 Micron Technology, Inc. Memory array with a pair of memory-cell strings to a single conductive pillar
JP5209674B2 (ja) * 2010-07-27 2013-06-12 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 不揮発性半導体メモリトランジスタ、および、不揮発性半導体メモリの製造方法
US9041092B2 (en) 2012-09-07 2015-05-26 Unisantis Electronics Singapore Pte. Ltd. Semiconductor device and method for producing the same
KR102054181B1 (ko) 2013-02-26 2019-12-10 삼성전자주식회사 수직형 메모리 장치 및 그 제조 방법
JP5707003B1 (ja) * 2013-11-07 2015-04-22 ユニサンティス エレクトロニクス シンガポール プライベート リミテッドUnisantis Electronics Singapore Pte Ltd. 記憶装置、半導体装置、及び記憶装置、半導体装置の製造方法
WO2018182720A1 (en) * 2017-03-31 2018-10-04 Intel Corporation Technique for contact formation in a vertical transistor
CN109326604A (zh) * 2017-08-01 2019-02-12 华邦电子股份有限公司 三维存储器及其操作方法
JP7057032B1 (ja) * 2020-12-25 2022-04-19 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
KR20230012697A (ko) * 2021-07-16 2023-01-26 에스케이하이닉스 주식회사 비휘발성 메모리 장치에 데이터를 삭제하기 위한 장치 및 방법
CN118368901B (zh) * 2024-06-18 2024-08-30 杭州积海半导体有限公司 一种三维存储器

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US5386132A (en) 1992-11-02 1995-01-31 Wong; Chun C. D. Multimedia storage system with highly compact memory device
JP3743453B2 (ja) * 1993-01-27 2006-02-08 セイコーエプソン株式会社 不揮発性半導体記憶装置
JPH06296025A (ja) * 1993-04-08 1994-10-21 Nippon Steel Corp 不揮発性半導体メモリ装置
JP3392547B2 (ja) * 1994-11-21 2003-03-31 株式会社東芝 不揮発性半導体記憶装置
JPH09259591A (ja) 1996-03-21 1997-10-03 Ricoh Co Ltd 不揮発性半導体記憶装置
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KR100388179B1 (ko) * 1999-02-08 2003-06-19 가부시끼가이샤 도시바 불휘발성 반도체 메모리
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI458080B (zh) * 2010-07-29 2014-10-21 Unisantis Elect Singapore Pte 非揮發性半導體記憶體電晶體,及非揮發性半導體記憶體之製造方法

Also Published As

Publication number Publication date
US20090129171A1 (en) 2009-05-21
CN101490837B (zh) 2010-09-29
EP2043145A1 (en) 2009-04-01
WO2008007731A1 (fr) 2008-01-17
EP2639825A3 (en) 2013-10-16
KR101020846B1 (ko) 2011-03-09
JP2008021782A (ja) 2008-01-31
EP2639825A2 (en) 2013-09-18
JP5088465B2 (ja) 2012-12-05
US7940574B2 (en) 2011-05-10
CN101490837A (zh) 2009-07-22
KR20090031416A (ko) 2009-03-25
EP2043145A4 (en) 2010-11-10

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