TW200711003A - Method for fabricating low-defect-density changed orientation Si - Google Patents
Method for fabricating low-defect-density changed orientation SiInfo
- Publication number
- TW200711003A TW200711003A TW095100292A TW95100292A TW200711003A TW 200711003 A TW200711003 A TW 200711003A TW 095100292 A TW095100292 A TW 095100292A TW 95100292 A TW95100292 A TW 95100292A TW 200711003 A TW200711003 A TW 200711003A
- Authority
- TW
- Taiwan
- Prior art keywords
- orientation
- density changed
- atr
- recrystallization
- defect
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02598—Microstructure monocrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02609—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02672—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation enhancing elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02694—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/031,142 US7285473B2 (en) | 2005-01-07 | 2005-01-07 | Method for fabricating low-defect-density changed orientation Si |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200711003A true TW200711003A (en) | 2007-03-16 |
Family
ID=36653796
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095100292A TW200711003A (en) | 2005-01-07 | 2006-01-04 | Method for fabricating low-defect-density changed orientation Si |
Country Status (4)
Country | Link |
---|---|
US (2) | US7285473B2 (zh) |
JP (1) | JP5050185B2 (zh) |
CN (1) | CN100419135C (zh) |
TW (1) | TW200711003A (zh) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8138061B2 (en) * | 2005-01-07 | 2012-03-20 | International Business Machines Corporation | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide |
US7291539B2 (en) * | 2005-06-01 | 2007-11-06 | International Business Machines Corporation | Amorphization/templated recrystallization method for hybrid orientation substrates |
US20070215984A1 (en) * | 2006-03-15 | 2007-09-20 | Shaheen Mohamad A | Formation of a multiple crystal orientation substrate |
DE102006046363B4 (de) * | 2006-09-29 | 2009-04-16 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Verringern von Kristalldefekten in Transistoren mit wieder aufgewachsenen flachen Übergängen durch geeignetes Auswählen von Kristallorientierungen |
US7820501B2 (en) * | 2006-10-11 | 2010-10-26 | International Business Machines Corporation | Decoder for a stationary switch machine |
FR2907966B1 (fr) * | 2006-10-27 | 2009-01-30 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat. |
US20080128821A1 (en) * | 2006-12-04 | 2008-06-05 | Texas Instruments Incorporated | Semiconductor Device Manufactured Using Passivation of Crystal Domain Interfaces in Hybrid Orientation Technology |
JP5064841B2 (ja) * | 2007-03-06 | 2012-10-31 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
US7608522B2 (en) * | 2007-03-11 | 2009-10-27 | United Microelectronics Corp. | Method for fabricating a hybrid orientation substrate |
US9034102B2 (en) * | 2007-03-29 | 2015-05-19 | United Microelectronics Corp. | Method of fabricating hybrid orientation substrate and structure of the same |
US7537968B2 (en) * | 2007-06-19 | 2009-05-26 | Sandisk 3D Llc | Junction diode with reduced reverse current |
US7863712B2 (en) | 2007-10-30 | 2011-01-04 | International Business Machines Corporation | Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same |
US7989329B2 (en) * | 2007-12-21 | 2011-08-02 | Applied Materials, Inc. | Removal of surface dopants from a substrate |
DE102008011931B4 (de) * | 2008-02-29 | 2010-10-07 | Advanced Micro Devices, Inc., Sunnyvale | Verringerung der Speicherinstabilität durch lokale Anpassung der Rekristallisierungsbedingungen in einem Cache-Bereich eines Halbleiterbauelements |
CN101593674B (zh) * | 2008-05-26 | 2011-10-05 | 中芯国际集成电路制造(北京)有限公司 | 半导体衬底的形成方法以及太阳能电池的制作方法 |
JP2010072209A (ja) * | 2008-09-17 | 2010-04-02 | Fuji Xerox Co Ltd | 静電荷像現像用トナー、静電荷像現像用トナーの製造方法、静電荷像現像用現像剤および画像形成装置 |
US8252609B2 (en) * | 2009-04-09 | 2012-08-28 | Texas Instruments Incorporated | Curvature reduction for semiconductor wafers |
US8564063B2 (en) | 2010-12-07 | 2013-10-22 | United Microelectronics Corp. | Semiconductor device having metal gate and manufacturing method thereof |
US20120190137A1 (en) * | 2011-01-24 | 2012-07-26 | Sumitomo Electric Industries, Ltd. | Cross section observation method |
CN103632956A (zh) * | 2012-08-13 | 2014-03-12 | 上海华虹宏力半导体制造有限公司 | 防止半导体产品高温快速退火时产生缺陷的方法 |
CN106489187B (zh) * | 2014-07-10 | 2019-10-25 | 株式会社希克斯 | 半导体基板和半导体基板的制造方法 |
CN108257917B (zh) * | 2016-12-28 | 2021-02-02 | 中芯国际集成电路制造(上海)有限公司 | 半导体结构及其形成方法 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3900345A (en) * | 1973-08-02 | 1975-08-19 | Motorola Inc | Thin low temperature epi regions by conversion of an amorphous layer |
US4240843A (en) * | 1978-05-23 | 1980-12-23 | Western Electric Company, Inc. | Forming self-guarded p-n junctions by epitaxial regrowth of amorphous regions using selective radiation annealing |
JPS60154548A (ja) * | 1984-01-24 | 1985-08-14 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH0810669B2 (ja) * | 1986-04-11 | 1996-01-31 | 日本電気株式会社 | Soi膜の形成方法 |
JPS63137412A (ja) * | 1986-11-29 | 1988-06-09 | Sharp Corp | 半導体用基板の製造方法 |
JP2560716B2 (ja) * | 1987-03-25 | 1996-12-04 | 株式会社日本自動車部品総合研究所 | 半導体素子及びその製造方法 |
JPS63311718A (ja) * | 1987-06-15 | 1988-12-20 | Hitachi Ltd | ヘテロ構造単結晶半導体薄膜の製造方法 |
JPS6445166A (en) * | 1987-08-14 | 1989-02-17 | Toshiba Corp | Manufacture of semiconductor device |
JPH01162362A (ja) * | 1987-12-18 | 1989-06-26 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH04188612A (ja) * | 1990-11-19 | 1992-07-07 | Canon Inc | 結晶成長方法及び該方法によって得られた結晶物品 |
US5266504A (en) * | 1992-03-26 | 1993-11-30 | International Business Machines Corporation | Low temperature emitter process for high performance bipolar devices |
JPH07288228A (ja) * | 1994-02-23 | 1995-10-31 | Ricoh Co Ltd | 多結晶シリコン薄膜の形成方法 |
JP3545061B2 (ja) * | 1994-09-22 | 2004-07-21 | ソニー株式会社 | 配向性膜の形成方法 |
JPH08148424A (ja) * | 1994-11-18 | 1996-06-07 | Yamaha Corp | 半導体装置の製造方法 |
JP2755214B2 (ja) * | 1995-06-12 | 1998-05-20 | ソニー株式会社 | 半導体薄膜の形成方法 |
US6399458B1 (en) * | 1999-09-21 | 2002-06-04 | International Business Machines Corporation | Optimized reachthrough implant for simultaneously forming an MOS capacitor |
US6404038B1 (en) * | 2000-03-02 | 2002-06-11 | The United States Of America As Represented By The Secretary Of The Navy | Complementary vertical bipolar junction transistors fabricated of silicon-on-sapphire utilizing wide base PNP transistors |
US6793731B2 (en) * | 2002-03-13 | 2004-09-21 | Sharp Laboratories Of America, Inc. | Method for recrystallizing an amorphized silicon germanium film overlying silicon |
US6902962B2 (en) * | 2003-04-04 | 2005-06-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Silicon-on-insulator chip with multiple crystal orientations |
US7329923B2 (en) * | 2003-06-17 | 2008-02-12 | International Business Machines Corporation | High-performance CMOS devices on hybrid crystal oriented substrates |
US20050116290A1 (en) * | 2003-12-02 | 2005-06-02 | De Souza Joel P. | Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers |
US8138061B2 (en) | 2005-01-07 | 2012-03-20 | International Business Machines Corporation | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide |
-
2005
- 2005-01-07 US US11/031,142 patent/US7285473B2/en not_active Expired - Fee Related
- 2005-12-16 JP JP2005363826A patent/JP5050185B2/ja not_active Expired - Fee Related
-
2006
- 2006-01-04 TW TW095100292A patent/TW200711003A/zh unknown
- 2006-01-06 CN CNB200610005701XA patent/CN100419135C/zh not_active Expired - Fee Related
-
2007
- 2007-10-17 US US11/873,928 patent/US7550369B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1818155A (zh) | 2006-08-16 |
CN100419135C (zh) | 2008-09-17 |
US20060154429A1 (en) | 2006-07-13 |
JP2006191028A (ja) | 2006-07-20 |
US7285473B2 (en) | 2007-10-23 |
JP5050185B2 (ja) | 2012-10-17 |
US7550369B2 (en) | 2009-06-23 |
US20080057684A1 (en) | 2008-03-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200711003A (en) | Method for fabricating low-defect-density changed orientation Si | |
TWI234206B (en) | Method of fabricating Si1-x Gex films on silicon substrates | |
WO2006130360A3 (en) | Improved amorphization/templated recrystallization method for hybrid orientation substrates | |
JP2009535850A (ja) | insituまたはexsitu熱処理と組み合わされた改良型電界効果トランジスタ向けのイオン注入(FETデバイスを製造する方法およびFETデバイス) | |
JP5537102B2 (ja) | 半導体装置の製造方法 | |
EP1452619A4 (en) | THIN METAL OXIDE FILM AND MANUFACTURING METHOD THEREFOR | |
TW200524005A (en) | Process for producing monocrystal thin film and monocrystal thin film device | |
TW200612498A (en) | Method of making a semiconductor device having a strained semiconductor layer | |
JP2008518475A5 (zh) | ||
TWI298911B (en) | Sige/soi cmos and method of making the same | |
JP2006024946A (ja) | 多結晶シリコンの製造方法及びそれを利用する半導体素子の製造方法 | |
TW200707635A (en) | Method for manufacturing SIMOX wafer and SIMOX wafer | |
JP2008519428A (ja) | 歪み層を成長させる方法 | |
WO2007112432A3 (en) | Epitaxy of silicon-carbon substitutional solid solutions by ultra-fast annealing of amorphous material | |
TW200507076A (en) | Method for manufacturing semiconductor device | |
JP2006228763A (ja) | 単結晶SiC基板の製造方法 | |
TW200733204A (en) | Process for adjusting the strain on the surface or inside a substrate mad | |
JP2696818B2 (ja) | 半導体層の結晶成長方法 | |
WO2002059946A8 (en) | Method of producing soi materials | |
TWI242816B (en) | Method for monitoring low-temperature rapid thermal annealing process | |
JP3837527B2 (ja) | 歪み半導体単結晶の作製方法 | |
CN100459043C (zh) | 多晶硅膜的制造方法以及薄膜晶体管的制造方法 | |
JPS63185016A (ja) | 半導体薄膜の形成方法 | |
JPS60164316A (ja) | 半導体薄膜の形成方法 | |
TW200709418A (en) | Processing method of low temperature poly silicon |